dts/marvell/mmp2.dtsi

48 				clocks = <&soc_clocks MMP2_CLK_GPU_3D>,
49 					 <&soc_clocks MMP2_CLK_GPU_BUS>;
51 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
144 				clocks = <&soc_clocks MMP2_CLK_USB>;
154 				clocks = <&soc_clocks MMP2_CLK_SDH0>;
163 				clocks = <&soc_clocks MMP2_CLK_SDH1>;
172 				clocks = <&soc_clocks MMP2_CLK_SDH2>;
181 				clocks = <&soc_clocks MMP2_CLK_SDH3>;
191 				clocks = <&soc_clocks MMP2_CLK_CCIC0>;
202 				clocks = <&soc_clocks MMP2_CLK_CCIC1>;
231 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
232 					 <&soc_clocks MMP2_CLK_VCTCXO>,
233 					 <&soc_clocks MMP2_CLK_I2S0>,
234 					 <&soc_clocks MMP2_CLK_I2S1>;
235 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
246 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
248 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
259 				clocks = <&soc_clocks MMP2_CLK_AUDIO>,
261 				power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
288 				clocks = <&soc_clocks MMP2_CLK_TIMER>;
295 				clocks = <&soc_clocks MMP2_CLK_UART0>;
296 				resets = <&soc_clocks MMP2_CLK_UART0>;
305 				clocks = <&soc_clocks MMP2_CLK_UART1>;
306 				resets = <&soc_clocks MMP2_CLK_UART1>;
315 				clocks = <&soc_clocks MMP2_CLK_UART2>;
316 				resets = <&soc_clocks MMP2_CLK_UART2>;
325 				clocks = <&soc_clocks MMP2_CLK_UART3>;
326 				resets = <&soc_clocks MMP2_CLK_UART3>;
340 				clocks = <&soc_clocks MMP2_CLK_GPIO>;
341 				resets = <&soc_clocks MMP2_CLK_GPIO>;
375 				clocks = <&soc_clocks MMP2_CLK_TWSI0>;
376 				resets = <&soc_clocks MMP2_CLK_TWSI0>;
388 				clocks = <&soc_clocks MMP2_CLK_TWSI1>;
389 				resets = <&soc_clocks MMP2_CLK_TWSI1>;
400 				clocks = <&soc_clocks MMP2_CLK_TWSI2>;
401 				resets = <&soc_clocks MMP2_CLK_TWSI2>;
412 				clocks = <&soc_clocks MMP2_CLK_TWSI3>;
413 				resets = <&soc_clocks MMP2_CLK_TWSI3>;
425 				clocks = <&soc_clocks MMP2_CLK_TWSI4>;
426 				resets = <&soc_clocks MMP2_CLK_TWSI4>;
437 				clocks = <&soc_clocks MMP2_CLK_TWSI5>;
438 				resets = <&soc_clocks MMP2_CLK_TWSI5>;
450 				clocks = <&soc_clocks MMP2_CLK_RTC>;
451 				resets = <&soc_clocks MMP2_CLK_RTC>;
458 				clocks = <&soc_clocks MMP2_CLK_SSP0>;
468 				clocks = <&soc_clocks MMP2_CLK_SSP1>;
478 				clocks = <&soc_clocks MMP2_CLK_SSP2>;
488 				clocks = <&soc_clocks MMP2_CLK_SSP3>;
505 		soc_clocks: clocks {  label