Searched full:scg1 (Results 1 – 10 of 10) sorted by relevance
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx7ulp.dtsi | 132 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; 167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>; 186 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 223 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 224 <&scg1 IMX7ULP_CLK_NIC1_DIV>, 237 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 238 <&scg1 IMX7ULP_CLK_NIC1_DIV>, 247 scg1: clock-controller@403e0000 { label [all …]
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D | imx7ulp-com.dts | 41 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
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D | imx7ulp-evk.dts | 81 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | imx7ulp-pcc-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules. 95 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>, 96 <&scg1 IMX7ULP_CLK_NIC1_DIV>, 97 <&scg1 IMX7ULP_CLK_DDR_DIV>, 98 <&scg1 IMX7ULP_CLK_APLL_PFD2>, 99 <&scg1 IMX7ULP_CLK_APLL_PFD1>, 100 <&scg1 IMX7ULP_CLK_APLL_PFD0>, 101 <&scg1 IMX7ULP_CLK_UPLL>, 102 <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>, 103 <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>, [all …]
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D | imx7ulp-scg-clock.yaml | 24 A7 clock management consists of SCG1, PCC2, PCC3, and CMC1 modules. 42 const: fsl,imx7ulp-scg1 81 compatible = "fsl,imx7ulp-scg1";
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/linux-6.12.1/Documentation/devicetree/bindings/pwm/ |
D | imx-tpm-pwm.yaml | 56 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
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/linux-6.12.1/Documentation/devicetree/bindings/watchdog/ |
D | fsl-imx7ulp-wdt.yaml | 59 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC_BUS_CLK>;
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/linux-6.12.1/Documentation/devicetree/bindings/timer/ |
D | nxp,tpm-timer.yaml | 62 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
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/linux-6.12.1/include/dt-bindings/clock/ |
D | imx7ulp-clock.h | 11 /* SCG1 */
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/linux-6.12.1/drivers/clk/imx/ |
D | clk-imx7ulp.c | 68 /* SCG1 */ in imx7ulp_clk_scg1_init() 133 CLK_OF_DECLARE(imx7ulp_clk_scg1, "fsl,imx7ulp-scg1", imx7ulp_clk_scg1_init);
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