| /linux-6.12.1/arch/arm/boot/dts/samsung/ |
| D | s5pv210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
[all …]
|
| D | s5pv210-torbreck.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
12 * NOTE: This file is completely based on original board file for mach-torbreck
17 /dts-v1/;
18 #include <dt-bindings/input/input.h>
19 #include "s5pv210.dtsi"
22 model = "aESOP Torbreck based on S5PV210";
23 compatible = "aesop,torbreck", "samsung,s5pv210";
34 pmic_ap_clk: clock-0 {
[all …]
|
| D | s5pv210-smdkc110.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
12 * NOTE: This file is completely based on original board file for mach-smdkc110
17 /dts-v1/;
18 #include <dt-bindings/input/input.h>
19 #include "s5pv210.dtsi"
23 compatible = "yic,smdkc110", "samsung,s5pv210";
34 pmic_ap_clk: clock-0 {
35 /* Workaround for missing PMIC and its clock */
[all …]
|
| D | s5pv210-smdkv210.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
12 * NOTE: This file is completely based on original board file for mach-smdkv210
17 /dts-v1/;
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/input/input.h>
20 #include "s5pv210.dtsi"
23 model = "YIC System SMDKV210 based on S5PV210";
24 compatible = "yic,smdkv210", "samsung,s5pv210";
[all …]
|
| D | s5pv210-aquila.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/input/input.h>
16 #include "s5pv210.dtsi"
20 compatible = "samsung,aquila", "samsung,s5pv210";
35 pmic_ap_clk: clock-0 {
36 /* Workaround for missing clock on PMIC */
[all …]
|
| D | s5pv210-goni.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's S5PV210 SoC device tree source
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
13 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/input/input.h>
17 #include "s5pv210.dtsi"
21 compatible = "samsung,goni", "samsung,s5pv210";
38 pmic_ap_clk: clock-0 {
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | samsung,s5pv210-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,s5pv210-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5P6442/S5PC110/S5PV210 SoC clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching
[all …]
|
| D | samsung,s5pv210-audss-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/samsung,s5pv210-audss-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5Pv210 SoC Audio SubSystem clock controller
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Tomasz Figa <tomasz.figa@gmail.com>
17 include/dt-bindings/clock/s5pv210-audss.h header.
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/mtd/ |
| D | samsung,s5pv210-onenand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mtd/samsung,s5pv210-onenand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5Pv210 SoC OneNAND Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
15 - samsung,s5pv210-onenand
19 - description: Control registers
20 - description: OneNAND interface nCE[0]
21 - description: OneNAND interface nCE[1]
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | samsung,s5pv210-jpeg.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/samsung,s5pv210-jpeg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S5PV210 and Exynos SoC JPEG codec
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
13 - Andrzej Pietrasiewicz <andrzejtp2010@gmail.com>
18 - samsung,s5pv210-jpeg
[all …]
|
| D | samsung,exynos4210-fimc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
20 - samsung,exynos4210-fimc
21 - samsung,exynos4212-fimc
22 - samsung,s5pv210-fimc
30 clock-names:
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/gpu/ |
| D | samsung-g2d.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/gpu/samsung-g2d.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
15 - samsung,s5pv210-g2d # in S5PV210 & Exynos4210 SoC
16 - samsung,exynos4212-g2d # in Exynos4x12 SoCs
17 - samsung,exynos5250-g2d
29 clock-names:
37 power-domains:
[all …]
|
| /linux-6.12.1/arch/arm/mach-s5pv210/ |
| D | s5pv210.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Samsung's S5PC110/S5PV210 flattened device tree enabled machine.
5 // Copyright (c) 2013-2014 Samsung Electronics Co., Ltd.
17 #include "regs-clock.h"
26 if (!of_flat_dt_is_compatible(node, "samsung,s5pv210-clock")) in s5pv210_fdt_map_sys()
34 iodesc.length = be32_to_cpu(reg[1]) - 1; in s5pv210_fdt_map_sys()
56 platform_device_register_simple("s5pv210-cpufreq", -1, NULL, 0); in s5pv210_dt_init_late()
62 "samsung,s5pv210",
66 DT_MACHINE_START(S5PV210_DT, "Samsung S5PC110/S5PV210-based board")
|
| /linux-6.12.1/Documentation/devicetree/bindings/crypto/ |
| D | samsung-sss.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/crypto/samsung-sss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The SSS module in S5PV210 SoC supports the following:
14 -- Feeder (FeedCtrl)
15 -- Advanced Encryption Standard (AES)
16 -- Data Encryption Standard (DES)/3DES
17 -- Public Key Accelerator (PKA)
[all …]
|
| /linux-6.12.1/drivers/clk/samsung/ |
| D | clk-s5pv210-audss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on Exynos Audio Subsystem Clock Controller driver:
10 * Driver for Audio Subsystem Clock Controller of S5PV210-compatible SoCs.
15 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/s5pv210-audss.h>
76 clk_data = devm_kzalloc(&pdev->dev, in s5pv210_audss_clk_probe()
81 return -ENOMEM; in s5pv210_audss_clk_probe()
83 clk_data->num = AUDSS_MAX_CLKS; in s5pv210_audss_clk_probe()
84 clk_table = clk_data->hws; in s5pv210_audss_clk_probe()
86 hclk = devm_clk_get(&pdev->dev, "hclk"); in s5pv210_audss_clk_probe()
[all …]
|
| D | clk-s5pv210.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * Based on clock drivers for S3C64xx and Exynos4 SoCs.
8 * Common Clock Framework support for all S5PC110/S5PV210 SoCs.
11 #include <linux/clk-provider.h>
16 #include "clk-pll.h"
18 #include <dt-bindings/clock/s5pv210.h>
20 /* S5PC110/S5PV210 clock controller register offsets */
66 /* IDs of PLLs available on S5PV210/S5P6442 SoCs */
373 /* Common clock muxes. */
386 /* S5PV210-specific clock muxes. */
[all …]
|
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 bool "Samsung Exynos clock controller support" if COMPILE_TEST
18 bool "Samsung S3C64xx clock controller support" if COMPILE_TEST
21 Support for the clock controller present on the Samsung S3C64xx SoCs.
25 bool "Samsung S5Pv210 clock controller support" if COMPILE_TEST
28 Support for the clock controller present on the Samsung S5Pv210 SoCs.
32 bool "Samsung Exynos3250 clock controller support" if COMPILE_TEST
35 Support for the clock controller present on the Samsung
39 bool "Samsung Exynos4 clock controller support" if COMPILE_TEST
42 Support for the clock controller present on the Samsung
[all …]
|
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 # Samsung Clock specific Makefile
6 obj-$(CONFIG_COMMON_CLK) += clk.o clk-pll.o clk-cpu.o
7 obj-$(CONFIG_EXYNOS_3250_COMMON_CLK) += clk-exynos3250.o
8 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4.o
9 obj-$(CONFIG_EXYNOS_4_COMMON_CLK) += clk-exynos4412-isp.o
10 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5250.o
11 obj-$(CONFIG_EXYNOS_5250_COMMON_CLK) += clk-exynos5-subcmu.o
12 obj-$(CONFIG_EXYNOS_5260_COMMON_CLK) += clk-exynos5260.o
13 obj-$(CONFIG_EXYNOS_5410_COMMON_CLK) += clk-exynos5410.o
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/sound/ |
| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
14 - $ref: dai-common.yaml#
19 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
21 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 secondary FIFO, s/w reset control and internal mux for root clock
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/soc/samsung/ |
| D | exynos-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
18 - google,gs101-pmu
19 - samsung,exynos3250-pmu
20 - samsung,exynos4210-pmu
21 - samsung,exynos4212-pmu
22 - samsung,exynos4412-pmu
[all …]
|
| /linux-6.12.1/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 * CPU frequency scaling for S5PC110/S5PV210
169 * Clock divider value for following
238 ret = -EINVAL; in s5pv210_target()
242 old_freq = policy->cur; in s5pv210_target()
267 /* Check if there need to change System bus clock */ in s5pv210_target()
274 * temporary clock while changing divider. in s5pv210_target()
275 * expected clock is 83Mhz : 7.8usec/(1/83Mhz) = 0x287 in s5pv210_target()
287 * APLL -> MPLL(for stable transition) -> APLL in s5pv210_target()
288 * Some clock source's clock API are not prepared. in s5pv210_target()
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/input/ |
| D | samsung,s3c6410-keypad.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/input/samsung,s3c6410-keypad.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Samsung SoC Keypad controller is used to interface a SoC with a matrix-type
13 The keypad controller can sense a key-press and key-release and report the
17 - Krzysztof Kozlowski <krzk@kernel.org>
22 - samsung,s3c6410-keypad
23 - samsung,s5pv210-keypad
31 clock-names:
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/serial/ |
| D | samsung_uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 node, according to serialN format, where N is the port number (non-negative
21 - enum:
22 - apple,s5l-uart
23 - axis,artpec8-uart
24 - google,gs101-uart
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/spi/ |
| D | samsung,spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
19 - enum:
20 - google,gs101-spi
21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
22 - samsung,s3c6410-spi
23 - samsung,s5pv210-spi # for S5PV210 and S5PC110
24 - samsung,exynos4210-spi
[all …]
|
| /linux-6.12.1/Documentation/arch/arm/samsung/ |
| D | overview.rst | 6 ------------
15 - S3C64XX: S3C6400 and S3C6410
16 - S5PC110 / S5PV210
20 -------------
26 - S5PC110 specific default configuration
28 - S5PV210 specific default configuration
32 ------
38 plat-samsung provides the base for all the implementations, and is the
40 specific information. It contains the base clock, GPIO and device definitions
43 plat-s5p is for s5p specific builds, and contains common support for the
[all …]
|