Lines Matching +full:s5pv210 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Based on clock drivers for S3C64xx and Exynos4 SoCs.
8 * Common Clock Framework support for all S5PC110/S5PV210 SoCs.
11 #include <linux/clk-provider.h>
16 #include "clk-pll.h"
18 #include <dt-bindings/clock/s5pv210.h>
20 /* S5PC110/S5PV210 clock controller register offsets */
66 /* IDs of PLLs available on S5PV210/S5P6442 SoCs */
373 /* Common clock muxes. */
386 /* S5PV210-specific clock muxes. */
431 /* S5P6442-specific clock muxes. */
463 /* S5PV210-specific fixed rate clocks generated inside the SoC. */
471 /* S5P6442-specific fixed rate clocks generated inside the SoC. */
476 /* Common clock dividers. */
508 /* S5PV210-specific clock dividers. */
537 /* S5P6442-specific clock dividers. */
545 /* Common clock gates. */
625 /* S5PV210-specific clock gates. */
687 /* S5P6442-specific clock gates. */
705 * Clock aliases for legacy clkdev look-up.
714 /* S5PV210-specific PLLs. */
726 /* S5P6442-specific PLLs. */
747 hws = ctx->clk_data.hws; in __s5pv210_clk_init()
793 is_s5p6442 ? "S5P6442" : "S5PV210", in __s5pv210_clk_init()
808 CLK_OF_DECLARE(s5pv210_clk, "samsung,s5pv210-clock", s5pv210_clk_dt_init);
818 CLK_OF_DECLARE(s5p6442_clk, "samsung,s5p6442-clock", s5p6442_clk_dt_init);