Lines Matching +full:s5pv210 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
6 * CPU frequency scaling for S5PC110/S5PV210
169 * Clock divider value for following
238 ret = -EINVAL; in s5pv210_target()
242 old_freq = policy->cur; in s5pv210_target()
267 /* Check if there need to change System bus clock */ in s5pv210_target()
274 * temporary clock while changing divider. in s5pv210_target()
275 * expected clock is 83Mhz : 7.8usec/(1/83Mhz) = 0x287 in s5pv210_target()
287 * APLL -> MPLL(for stable transition) -> APLL in s5pv210_target()
288 * Some clock source's clock API are not prepared. in s5pv210_target()
289 * Do not use clock API in below code. in s5pv210_target()
294 * SCLKA2M(200/1=200)->(200/4=50)Mhz in s5pv210_target()
309 * (200/4=50)->(667/4=166)Mhz in s5pv210_target()
329 /* 4. SCLKAPLL -> SCLKMPLL */ in s5pv210_target()
380 * 6-1. Set PMS values in s5pv210_target()
381 * 6-2. Wait until the PLL is locked in s5pv210_target()
393 * 7. Change source clock from SCLKMPLL(667Mhz) in s5pv210_target()
395 * (667/4=166)->(200/4=50)Mhz in s5pv210_target()
409 * (200/4=50)->(200/1=200)Mhz in s5pv210_target()
442 * L4 level needs to change memory bus speed, hence ONEDRAM clock in s5pv210_target()
503 policy->clk = clk_get(NULL, "armclk"); in s5pv210_cpu_init()
504 if (IS_ERR(policy->clk)) in s5pv210_cpu_init()
505 return PTR_ERR(policy->clk); in s5pv210_cpu_init()
519 if (policy->cpu != 0) { in s5pv210_cpu_init()
520 ret = -EINVAL; in s5pv210_cpu_init()
532 ret = -EINVAL; in s5pv210_cpu_init()
543 policy->suspend_freq = SLEEP_FREQ; in s5pv210_cpu_init()
550 clk_put(policy->clk); in s5pv210_cpu_init()
582 .name = "s5pv210",
593 struct device *dev = &pdev->dev; in s5pv210_cpufreq_probe()
598 * HACK: This is a temporary workaround to get access to clock in s5pv210_cpufreq_probe()
601 * S5PV210 multi-platform support and will be removed together with in s5pv210_cpufreq_probe()
602 * this whole driver as soon as S5PV210 gets migrated to use in s5pv210_cpufreq_probe()
603 * cpufreq-dt driver. in s5pv210_cpufreq_probe()
617 np = of_find_compatible_node(NULL, NULL, "samsung,s5pv210-clock"); in s5pv210_cpufreq_probe()
619 dev_err(dev, "failed to find clock controller DT node\n"); in s5pv210_cpufreq_probe()
620 result = -ENODEV; in s5pv210_cpufreq_probe()
627 dev_err(dev, "failed to map clock registers\n"); in s5pv210_cpufreq_probe()
628 result = -EFAULT; in s5pv210_cpufreq_probe()
632 for_each_compatible_node(np, NULL, "samsung,s5pv210-dmc") { in s5pv210_cpufreq_probe()
645 result = -EFAULT; in s5pv210_cpufreq_probe()
653 result = -ENODEV; in s5pv210_cpufreq_probe()
683 .name = "s5pv210-cpufreq",