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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmdio-mux-mmioreg.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-mmioreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Properties for an MDIO bus multiplexer controlled by a memory-mapped device
10 - Andrew Lunn <andrew@lunn.ch>
13 This is a special case of a MDIO bus multiplexer. A memory-mapped device,
14 like an FPGA, is used to control which child bus is connected. The mdio-mux
15 node must be a child of the memory-mapped device. The driver currently only
16 supports devices with 8, 16 or 32-bit registers.
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/linux-6.12.1/drivers/net/mdio/
Dmdio-mux-mmioreg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Simple memory-mapped device MDIO MUX driver
11 #include <linux/mdio-mux.h>
26 * MDIO multiplexing switch function
28 * This function is called by the mdio-mux layer when it thinks the mdio bus
31 * 'current_child' is the current value of the mux register (masked via
32 * s->mask).
34 * 'desired_child' is the value of the 'reg' property of the target child MDIO
37 * The first time this function is called, current_child == -1.
39 * If current_child == desired_child, then the mux is already set to the
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux MDIO bus drivers
4 obj-$(CONFIG_ACPI_MDIO) += acpi_mdio.o
5 obj-$(CONFIG_FWNODE_MDIO) += fwnode_mdio.o
6 obj-$(CONFIG_OF_MDIO) += of_mdio.o
8 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
9 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
10 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
11 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
12 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dp5040ds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "p5040si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
74 reserved-memory {
75 #address-cells = <2>;
76 #size-cells = <2>;
79 bman_fbpr: bman-fbpr {
83 qman_fqd: qman-fqd {
[all …]
Dt2080qds.dts4 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
35 /include/ "t208xsi-pre.dtsi"
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
66 phy-handle = <&phy_sgmii_s3_1e>;
67 phy-connection-type = "xgmii";
71 phy-handle = <&phy_sgmii_s3_1f>;
72 phy-connection-type = "xgmii";
76 phy-handle = <&rgmii_phy1>;
[all …]
Dt2081qds.dts4 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
35 /include/ "t208xsi-pre.dtsi"
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
58 phy-handle = <&phy_sgmii_s7_1c>;
59 phy-connection-type = "sgmii";
63 phy-handle = <&phy_sgmii_s7_1d>;
64 phy-connection-type = "sgmii";
68 phy-handle = <&rgmii_phy1>;
[all …]
Dt104xqds.dtsi4 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
37 #address-cells = <2>;
38 #size-cells = <2>;
39 interrupt-parent = <&mpic>;
68 reserved-memory {
69 #address-cells = <2>;
70 #size-cells = <2>;
73 bman_fbpr: bman-fbpr {
77 qman_fqd: qman-fqd {
81 qman_pfdr: qman-pfdr {
[all …]
Dp3041ds.dts4 * Copyright 2010 - 2015 Freescale Semiconductor Inc.
35 /include/ "p3041si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
[all …]
Dp5020ds.dts4 * Copyright 2010 - 2015 Freescale Semiconductor Inc.
35 /include/ "p5020si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
[all …]
Dt4240qds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "t4240si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "cfi-flash";
94 bank-width = <2>;
95 device-width = <1>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/board/
Dfsl,fpga-qixis.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/board/fsl,fpga-qixis.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale on-board FPGA/CPLD
10 - Frank Li <Frank.Li@nxp.com>
15 - items:
16 - const: fsl,p1022ds-fpga
17 - const: fsl,fpga-ngpixis
18 - items:
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dfsl-ls208xa-qds.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 phy-handle = <&mdio0_phy12>;
15 phy-connection-type = "sgmii";
19 phy-handle = <&mdio0_phy13>;
20 phy-connection-type = "sgmii";
24 phy-handle = <&mdio0_phy14>;
25 phy-connection-type = "sgmii";
29 phy-handle = <&mdio0_phy15>;
30 phy-connection-type = "sgmii";
34 mmc-hs200-1_8v;
[all …]
Dfsl-ls1043a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
6 * Copyright 2018-2021 NXP
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
27 sgmii-riser-s1-p1 = &sgmii_phy_s1_p1;
28 sgmii-riser-s2-p1 = &sgmii_phy_s2_p1;
29 sgmii-riser-s3-p1 = &sgmii_phy_s3_p1;
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Dfsl-ls1046a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2018-2019 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
20 emi1-slot1 = &ls1046mdio_s1;
21 emi1-slot2 = &ls1046mdio_s2;
22 emi1-slot4 = &ls1046mdio_s4;
27 qsgmii-s2-p1 = &qsgmii_phy_s2_p1;
[all …]
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm958625-meraki-alamo.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
8 #include "bcm958625-meraki-mx6x-common.dtsi"
12 compatible = "gpio-keys-polled";
14 poll-interval = <20>;
16 button-reset {
24 compatible = "gpio-leds";
26 led-0 {
27 /* green:wan1-left */
29 function-enumerator = <0>;
[all …]
Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
[all …]
Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
7 /dts-v1/;
12 compatible = "fsl,ls1021a-qds", "fsl,ls1021a";
22 sys_mclk: clock-mclk {
23 compatible = "fixed-clock";
24 #clock-cells = <0>;
25 clock-frequency = <24576000>;
29 compatible = "regulator-fixed";
30 regulator-name = "3P3V";
[all …]