/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | fsl,imx6q-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 PCIe RC/EP controller 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 14 Generic Freescale i.MX PCIe Root Port and Endpoint controller 22 clock-names: 26 num-lanes: [all …]
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D | fsl,imx6q-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 PCIe host controller 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 14 This PCIe host controller is based on the Synopsys DesignWare PCIe IP 15 and thus inherits all the common properties defined in snps,dw-pcie.yaml. 19 See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree [all …]
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D | fsl,imx6q-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 PCIe Endpoint controller 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 14 This PCIe controller is based on the Synopsys DesignWare PCIe IP and 15 thus inherits all the common properties defined in snps,dw-pcie-ep.yaml. 22 - fsl,imx8mm-pcie-ep [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
D | imx6q-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2022 Toradex 8 /dts-v1/; 10 #include "imx6q-apalis-eval.dtsi" 13 model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board"; 14 compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q", 15 "fsl,imx6q"; 17 reg_pcie_switch: regulator-pcie-switch { 18 compatible = "regulator-fixed"; 19 enable-active-high; [all …]
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D | imx6qp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 #include "imx6q.dtsi" 10 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 19 compatible = "mmio-sram"; 22 #address-cells = <1>; 23 #size-cells = <1>; 29 compatible = "fsl,imx6qp-pre"; 33 clock-names = "axi"; [all …]
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D | imx6q-phytec-mira-rdk-nand.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include "imx6q.dtsi" 9 #include "imx6qdl-phytec-phycore-som.dtsi" 10 #include "imx6qdl-phytec-mira.dtsi" 11 #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" 12 #include "imx6qdl-phytec-mira-peb-av-02.dtsi" 13 #include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi" 16 model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with NAND"; 17 compatible = "phytec,imx6q-pbac06-nand", "phytec,imx6q-pbac06", [all …]
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D | imx6q-phytec-mira-rdk-emmc.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 8 #include "imx6q.dtsi" 9 #include "imx6qdl-phytec-phycore-som.dtsi" 10 #include "imx6qdl-phytec-mira.dtsi" 11 #include "imx6qdl-phytec-mira-peb-eval-01.dtsi" 12 #include "imx6qdl-phytec-mira-peb-av-02.dtsi" 13 #include "imx6qdl-phytec-mira-peb-wlbt-05.dtsi" 16 model = "PHYTEC phyBOARD-Mira Quad Carrier-Board with eMMC"; 17 compatible = "phytec,imx6q-pbac06-emmc", "phytec,imx6q-pbac06", [all …]
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D | imx6qdl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx6qdl-clock.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 * pre-existing /chosen node to be available to insert the 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <32768>; [all …]
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D | imx6q-cm-fx6.dts | 6 * This file is dual-licensed: you can use it either under the terms 44 /dts-v1/; 45 #include <dt-bindings/gpio/gpio.h> 46 #include <dt-bindings/sound/fsl-imx-audmux.h> 47 #include "imx6q.dtsi" 50 model = "CompuLab CM-FX6"; 51 compatible = "compulab,cm-fx6", "fsl,imx6q"; 59 compatible = "gpio-leds"; 61 heartbeat-led { 64 linux,default-trigger = "heartbeat"; [all …]
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D | imx6q-gw5400-a.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 7 #include <dt-bindings/gpio/gpio.h> 8 #include "imx6q.dtsi" 11 model = "Gateworks Ventana GW5400-A"; 12 compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q"; 33 compatible = "gpio-leds"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_gpio_leds>; 37 led0: led-user1 { [all …]
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D | imx6q-apalis-ixora.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2022 Toradex 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include "imx6q.dtsi" 14 #include "imx6qdl-apalis.dtsi" 17 model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board"; 18 compatible = "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q", [all …]
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D | imx6q-apalis-eval-v1.2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 6 /dts-v1/; 8 #include "imx6q-apalis-eval.dtsi" 11 model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board v1.2"; 12 compatible = "toradex,apalis_imx6q-eval-v1.2", "toradex,apalis_imx6q", 13 "fsl,imx6q"; 15 reg_3v3_mmc: regulator-3v3-mmc { 16 compatible = "regulator-fixed"; 17 enable-active-high; 19 off-on-delay-us = <100000>; [all …]
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D | imx6sx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/clock/imx6sx-clock.h> 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include "imx6sx-pinfunc.h" 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 60 #address-cells = <1>; [all …]
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D | imx6q-apalis-ixora-v1.2.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2022 Toradex 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include "imx6q.dtsi" 14 #include "imx6qdl-apalis.dtsi" 17 model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2"; 18 compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q", [all …]
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D | imx6q-utilite-pro.dts | 10 * This file is dual-licensed: you can use it either under the terms 49 #include <dt-bindings/input/input.h> 50 #include "imx6q-cm-fx6.dts" 54 compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q"; 66 #address-cells = <1>; 67 #size-cells = <0>; 73 remote-endpoint = <¶llel_display_out>; 81 remote-endpoint = <&hdmi_connector_in>; 87 gpio-keys { 88 compatible = "gpio-keys"; [all …]
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D | imx6q-dmo-edmqmx6.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "imx6q.dtsi" 12 model = "Data Modul eDM-QMX6 Board"; 13 compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q"; 16 stdout-path = &uart2; 22 stmpe-i2c0 = &stmpe1; 23 stmpe-i2c1 = &stmpe2; 31 reg_3p3v: regulator-3p3v { [all …]
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D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 18 clock-frequency = <996000000>; 19 operating-points-v2 = <&cpu0_opp_table>; 20 #cooling-cells = <2>; 21 nvmem-cells = <&fuse_grade>; 22 nvmem-cell-names = "speed_grade"; 26 compatible = "arm,cortex-a7"; 29 clock-frequency = <996000000>; 30 operating-points-v2 = <&cpu0_opp_table>; [all …]
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D | imx6q-tbs2910.dts | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 5 /dts-v1/; 7 #include "imx6q.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 13 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; 16 stdout-path = &uart1; 23 /delete-property/ mmc3; 32 compatible = "gpio-fan"; 33 pinctrl-names = "default"; [all …]
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D | imx6q-apalis-eval.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright 2014-2024 Toradex 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/input/input.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include "imx6q.dtsi" 10 #include "imx6qdl-apalis.dtsi" 22 stdout-path = "serial0:115200n8"; 25 reg_3v3_sw: regulator-3v3-sw { 26 compatible = "regulator-fixed"; [all …]
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D | imx6q-novena.dts | 2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 49 /dts-v1/; 50 #include "imx6q.dtsi" 51 #include <dt-bindings/gpio/gpio.h> 52 #include <dt-bindings/input/input.h> 56 compatible = "kosagi,imx6q-novena", "fsl,imx6q"; 65 stdout-path = &uart2; 69 compatible = "pwm-backlight"; [all …]
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D | imx6qdl-nitrogen6_max.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/input/input.h> 10 stdout-path = &uart2; 18 reg_1p8v: regulator-1p8v { 19 compatible = "regulator-fixed"; 20 regulator-name = "1P8V"; 21 regulator-min-microvolt = <1800000>; 22 regulator-max-microvolt = <1800000>; 23 regulator-always-on; [all …]
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D | imx6qdl-phytec-pfla02.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/gpio/gpio.h> 9 model = "Phytec phyFLEX-i.MX6 Quad"; 10 compatible = "phytec,imx6q-pfla02", "fsl,imx6q"; 17 reg_usb_otg_vbus: regulator-usb-otg-vbus { 18 compatible = "regulator-fixed"; 19 regulator-name = "usb_otg_vbus"; 20 regulator-min-microvolt = <5000000>; 21 regulator-max-microvolt = <5000000>; 23 enable-active-high; [all …]
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D | imx6q-bx50v3.dtsi | 5 * This file is dual-licensed: you can use it either under the terms 43 #include "imx6q-ba16.dtsi" 46 mclk: clock-mclk { 47 compatible = "fixed-clock"; 48 #clock-cells = <0>; 49 clock-frequency = <22000000>; 52 gpio-poweroff { 53 compatible = "gpio-poweroff"; 58 reg_wl18xx_vmmc: regulator-wl18xx { 59 compatible = "regulator-fixed"; [all …]
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/linux-6.12.1/drivers/pci/controller/dwc/ |
D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PCIe host controller driver for Freescale i.MX6 SoCs 17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h> 31 #include <linux/phy/pcie.h> 36 #include "pcie-designware.h" 58 #define to_imx_pcie(x) dev_get_drvdata((x)->dev) 61 IMX6Q, enumerator 86 #define imx_check_flag(pci, val) (pci->drvdata->flags & val) 106 int (*init_phy)(struct imx_pcie *pcie); [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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