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/linux-6.12.1/drivers/net/ethernet/atheros/atlx/
Datlx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* atlx_hw.h -- common hardware definitions for Attansic network drivers
4 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
5 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
6 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
10 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
149 /* IRQ Anti-Lost Timer Initial Value Register */
228 /* MAC Half-Duplex Control Register */
246 /* Wake-On-Lan control register */
303 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
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/linux-6.12.1/include/uapi/linux/
Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
59 /* Media-dependent registers. */
60 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
61 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
62 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
63 * Lanes B-D are numbered 134-136. */
64 #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
65 #define MDIO_PMA_10GBR_FECABLE 170 /* 10GBASE-R FEC ability */
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/linux-6.12.1/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
36 #define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
52 #define MII_SR_AUTONEG_CAPS 0x0008 /* Auto Neg Capable */
57 #define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
58 #define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
59 #define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
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/linux-6.12.1/Documentation/driver-api/serial/
Dserial-rs485.rst8 EIA-485, also known as TIA/EIA-485 or RS-485, is a standard defining the
15 2. Hardware-related Considerations
18 Some CPUs/UARTs (e.g., Atmel AT91 or 16C950 UART) contain a built-in
19 half-duplex mode capable of automatically controlling line direction by
21 half-duplex hardware like an RS485 transceiver or any RS232-connected
22 half-duplex devices like some modems.
24 For these microcontrollers, the Linux driver should be made capable of
26 available at user-level to allow switching from one mode to the other, and
37 [#DT-bindings]_. The serial core fills the struct serial_rs485 from the
41 Any driver for devices capable of working both as RS232 and RS485 should
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/linux-6.12.1/Documentation/devicetree/bindings/serial/
Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: The RTS signal is capable of automatically controlling line
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/3com/
D3c509.rst1 .. SPDX-License-Identifier: GPL-2.0
21 ethercards in Linux. These cards are commonly known by the most widely-used
22 card's 3Com model number, 3c509. They are all 10mb/s ISA-bus cards and shouldn't
23 be (but sometimes are) confused with the similarly-numbered PCI-bus "3c905"
28 - 3c509 (original ISA card)
29 - 3c509B (later revision of the ISA card; supports full-duplex)
30 - 3c589 (PCMCIA)
31 - 3c589B (later revision of the 3c589; supports full-duplex)
32 - 3c579 (EISA)
45 The driver allows boot- or load-time overriding of the card's detected IOADDR,
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/linux-6.12.1/drivers/net/ethernet/intel/e1000/
De1000_hw.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
277 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 * speed, u16 * duplex);
422 /* MAC decode size is 128K - This is the size of BAR0 */
443 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)
486 * E1000_RAR_ENTRIES - 1 multicast addresses.
503 /* Receive Descriptor - Extended */
529 /* Receive Descriptor - Packet Split */
553 __le16 length[3]; /* length of buffers 1-3 */
567 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
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De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Md Danish Anwar <danishanwar@ti.com>
13 Ethernet based on the Programmable Real-Time Unit and Industrial
19 - ti,am642-icssg-prueth # for AM64x SoC family
20 - ti,am654-icssg-prueth # for AM65x SoC family
21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
32 dma-names:
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/linux-6.12.1/drivers/net/ethernet/intel/igc/
Digc_phy.c1 // SPDX-License-Identifier: GPL-2.0
8 * igc_check_reset_block - Check if PHY reset is blocked
26 * igc_get_phy_id - Retrieve the PHY ID and revision
34 struct igc_phy_info *phy = &hw->phy; in igc_get_phy_id()
38 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igc_get_phy_id()
42 phy->id = (u32)(phy_id << 16); in igc_get_phy_id()
44 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igc_get_phy_id()
48 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in igc_get_phy_id()
49 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in igc_get_phy_id()
56 * igc_phy_has_link - Polls PHY for link
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Digc_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
90 /* Loop limit on how long we wait for auto-negotiation to complete */
137 #define IGC_CTRL_FRCDPX 0x00001000 /* Force Duplex */
161 #define NWAY_AR_10T_HD_CAPS 0x0020 /* 10T Half Duplex Capable */
162 #define NWAY_AR_10T_FD_CAPS 0x0040 /* 10T Full Duplex Capable */
163 #define NWAY_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
164 #define NWAY_AR_100TX_FD_CAPS 0x0100 /* 100TX Full Duplex Capable */
172 /* 1000BASE-T Control Register */
176 /* 1000BASE-T Status Register */
223 #define IGC_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */
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/linux-6.12.1/drivers/staging/octeon/
Dethernet-mdio.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2003-2007 Cavium Networks
15 #include "octeon-ethernet.h"
16 #include "ethernet-defines.h"
17 #include "ethernet-mdio.h"
18 #include "ethernet-util.h"
23 strscpy(info->driver, KBUILD_MODNAME, sizeof(info->driver)); in cvm_oct_get_drvinfo()
24 strscpy(info->bus_info, "Builtin", sizeof(info->bus_info)); in cvm_oct_get_drvinfo()
29 if (!capable(CAP_NET_ADMIN)) in cvm_oct_nway_reset()
30 return -EPERM; in cvm_oct_nway_reset()
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/linux-6.12.1/drivers/net/ethernet/ti/icssg/
Dicssg_prueth_sr1.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
26 #include "../k3-cppi-desc-pool.h"
34 * situation. So use Q0-Q2 as data queues and Q3 as management queue
62 config.addr_lo = cpu_to_le32(lower_32_bits(prueth->msmcram.pa)); in icssg_config_sr1()
63 config.addr_hi = cpu_to_le32(upper_32_bits(prueth->msmcram.pa)); in icssg_config_sr1()
64 config.rx_flow_id = cpu_to_le32(emac->rx_flow_id_base); /* flow id for host port */ in icssg_config_sr1()
65 config.rx_mgr_flow_id = cpu_to_le32(emac->rx_mgm_flow_id_base); /* for mgm ch */ in icssg_config_sr1()
69 index = i - PRUETH_EMAC_BUF_POOL_START_SR1; in icssg_config_sr1()
73 va = prueth->shram.va + slice * ICSSG_CONFIG_OFFSET_SLICE1; in icssg_config_sr1()
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Dicssg_prueth.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
12 #include <linux/dma-mapping.h>
13 #include <linux/dma/ti-cppi5.h>
19 #include <linux/io-64-nonatomic-hi-lo.h>
37 #include "../k3-cppi-desc-pool.h"
56 struct prueth *prueth = emac->prueth; in emac_get_tx_ts()
65 memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp)); in emac_get_tx_ts()
89 !emac->tx_ts_skb[tsr.cookie]) { in tx_ts_work()
90 netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n", in tx_ts_work()
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/linux-6.12.1/drivers/net/bonding/
Dbond_procfs.c1 // SPDX-License-Identifier: GPL-2.0
14 struct bonding *bond = pde_data(file_inode(seq->file)); in bond_info_seq_start()
33 struct bonding *bond = pde_data(file_inode(seq->file)); in bond_info_seq_next()
60 struct bonding *bond = pde_data(file_inode(seq->file)); in bond_info_show_master()
65 curr = rcu_dereference(bond->curr_active_slave); in bond_info_show_master()
71 bond->params.fail_over_mac) { in bond_info_show_master()
73 bond->params.fail_over_mac); in bond_info_show_master()
74 seq_printf(seq, " (fail_over_mac %s)", optval->string); in bond_info_show_master()
81 bond->params.xmit_policy); in bond_info_show_master()
83 optval->string, bond->params.xmit_policy); in bond_info_show_master()
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/linux-6.12.1/drivers/net/
Dsungem_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
10 * - Add support for PHYs that provide an IRQ line
11 * - Eventually moved the entire polling state machine in
14 * - On LXT971 & BCM5201, Apple uses some chip specific regs
17 * - Apple has some additional power management code for some
38 { 0, 0, 0 }, /* 10BT Half Duplex */
39 { 1, 0, 0 }, /* 10BT Full Duplex */
40 { 0, 1, 0 }, /* 100BT Half Duplex */
41 { 0, 1, 0 }, /* 100BT Half Duplex */
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/linux-6.12.1/drivers/net/ethernet/intel/igb/
De1000_defines.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
62 /* Interrupt acknowledge Auto-mask */
118 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
119 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
181 #define E1000_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */
184 #define E1000_CTRL_ASDE 0x00000020 /* Auto-speed detect enable */
186 #define E1000_CTRL_ILOS 0x00000080 /* Invert Loss-Of Signal */
191 #define E1000_CTRL_FRCDPX 0x00001000 /* Force Duplex */
239 #define E1000_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */
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De1000_phy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
31 * igb_check_reset_block - Check if PHY reset is blocked
48 * igb_get_phy_id - Retrieve the PHY ID and revision
56 struct e1000_phy_info *phy = &hw->phy; in igb_get_phy_id()
61 if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) in igb_get_phy_id()
62 phy->ops.write_reg(hw, I347AT4_PAGE_SELECT, 0); in igb_get_phy_id()
64 ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id); in igb_get_phy_id()
68 phy->id = (u32)(phy_id << 16); in igb_get_phy_id()
70 ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id); in igb_get_phy_id()
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/linux-6.12.1/drivers/net/phy/
Dphy-core.c1 // SPDX-License-Identifier: GPL-2.0+
10 * phy_speed_to_str - Return a string representing the PHY link speed
57 return "Unsupported (update phy-core.c)"; in phy_speed_to_str()
63 * phy_duplex_to_str - Return string describing the duplex
65 * @duplex: Duplex setting to describe
67 const char *phy_duplex_to_str(unsigned int duplex) in phy_duplex_to_str() argument
69 if (duplex == DUPLEX_HALF) in phy_duplex_to_str()
70 return "Half"; in phy_duplex_to_str()
71 if (duplex == DUPLEX_FULL) in phy_duplex_to_str()
73 if (duplex == DUPLEX_UNKNOWN) in phy_duplex_to_str()
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/linux-6.12.1/Documentation/networking/
Dphy.rst26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
83 internal delay by itself, it assumes that either the Ethernet MAC (if capable)
84 or the PCB traces insert the correct 1.5-2ns delay
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
109 For cases where the PHY is not capable of providing this delay, but the
110 Ethernet MAC driver is capable of doing so, the correct phy_interface_t value
115 PHY_INTERFACE_MODE_RGMII, it should make sure that the MAC-level delays are
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/linux-6.12.1/drivers/net/ethernet/marvell/
Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
266 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
268 CHIP_REV_YU_LITE_A1 = 3, /* Chip Rev. for YUKON-Lite A1,A2 */
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/linux-6.12.1/drivers/net/ethernet/dlink/
Ddl2k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
4 Copyright (c) 2001, 2002 by D-Link Corporation
6 Created 03-May-2001, base on Linux' sundance.c.
11 #include <linux/dma-mapping.h>
25 static int tx_flow=-1;
26 static int rx_flow=-1;
34 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
54 void __iomem *ioaddr = np->ioaddr; in dl2k_enable_int()
108 int chip_idx = ent->driver_data; in rio_probe1()
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/linux-6.12.1/Documentation/spi/
Dspi-summary.rst5 02-Feb-2012
8 ------------
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
20 are used though; not every protocol uses those full duplex capabilities.
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
36 or both of them at the same time (full duplex).
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
41 - Words are usually sent with their most significant bit (MSB) first,
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/linux-6.12.1/include/uapi/linux/can/
Disotp.h1 /* SPDX-License-Identifier: ((GPL-2.0-only WITH Linux-syscall-note) OR BSD-3-Clause) */
5 * Definitions for ISO 15765-2 CAN transport protocol sockets
98 /* 0x00 - 0x7F : 0 - 127 ms */
99 /* 0x80 - 0xF0 : reserved */
100 /* 0xF1 - 0xF9 : 100 us - 900 us */
101 /* 0xFA - 0xFF : reserved */
111 /* CAN_MTU (16) -> standard CAN 2.0 */
112 /* CANFD_MTU (72) -> CAN FD frame */
133 #define CAN_ISOTP_HALF_DUPLEX 0x0040 /* half duplex error state handling */
138 #define CAN_ISOTP_SF_BROADCAST 0x0800 /* 1-to-N functional addressing */
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/linux-6.12.1/drivers/net/ethernet/intel/e1000e/
Dphy.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
37 * e1000e_check_reset_block_generic - Check if PHY reset is blocked
54 * e1000e_get_phy_id - Retrieve the PHY ID and revision
62 struct e1000_phy_info *phy = &hw->phy; in e1000e_get_phy_id()
67 if (!phy->ops.read_reg) in e1000e_get_phy_id()
75 phy->id = (u32)(phy_id << 16); in e1000e_get_phy_id()
81 phy->id |= (u32)(phy_id & PHY_REVISION_MASK); in e1000e_get_phy_id()
82 phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK); in e1000e_get_phy_id()
84 if (phy->id != 0 && phy->id != PHY_REVISION_MASK) in e1000e_get_phy_id()
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