Lines Matching +full:half +full:- +full:duplex +full:- +full:capable
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
107 hw->mac_type == e1000_82541_rev_2 || in e1000_set_phy_type()
108 hw->mac_type == e1000_82547 || in e1000_set_phy_type()
109 hw->mac_type == e1000_82547_rev_2) in e1000_set_phy_type()
110 hw->phy_type = e1000_phy_igp; in e1000_set_phy_type()
113 hw->phy_type = e1000_phy_8211; in e1000_set_phy_type()
116 hw->phy_type = e1000_phy_8201; in e1000_set_phy_type()
120 hw->phy_type = e1000_phy_undefined; in e1000_set_phy_type()
121 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
128 * e1000_phy_init_script - IGP phy init script - initializes the GbE PHY
135 if (hw->phy_init_script) { in e1000_phy_init_script()
150 switch (hw->mac_type) { in e1000_phy_init_script()
178 if (hw->mac_type == e1000_82547) { in e1000_phy_init_script()
197 coarse -= in e1000_phy_init_script()
199 fine -= IGP01E1000_ANALOG_FUSE_FINE_1; in e1000_phy_init_script()
202 fine -= IGP01E1000_ANALOG_FUSE_FINE_10; in e1000_phy_init_script()
222 * e1000_set_mac_type - Set the mac type member in the hw struct.
227 switch (hw->device_id) { in e1000_set_mac_type()
229 switch (hw->revision_id) { in e1000_set_mac_type()
231 hw->mac_type = e1000_82542_rev2_0; in e1000_set_mac_type()
234 hw->mac_type = e1000_82542_rev2_1; in e1000_set_mac_type()
238 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
243 hw->mac_type = e1000_82543; in e1000_set_mac_type()
249 hw->mac_type = e1000_82544; in e1000_set_mac_type()
256 hw->mac_type = e1000_82540; in e1000_set_mac_type()
260 hw->mac_type = e1000_82545; in e1000_set_mac_type()
265 hw->mac_type = e1000_82545_rev_3; in e1000_set_mac_type()
270 hw->mac_type = e1000_82546; in e1000_set_mac_type()
278 hw->mac_type = e1000_82546_rev_3; in e1000_set_mac_type()
283 hw->mac_type = e1000_82541; in e1000_set_mac_type()
289 hw->mac_type = e1000_82541_rev_2; in e1000_set_mac_type()
293 hw->mac_type = e1000_82547; in e1000_set_mac_type()
296 hw->mac_type = e1000_82547_rev_2; in e1000_set_mac_type()
299 hw->mac_type = e1000_ce4100; in e1000_set_mac_type()
303 return -E1000_ERR_MAC_TYPE; in e1000_set_mac_type()
306 switch (hw->mac_type) { in e1000_set_mac_type()
311 hw->asf_firmware_present = true; in e1000_set_mac_type()
320 if (hw->mac_type == e1000_82543) in e1000_set_mac_type()
321 hw->bad_tx_carr_stats_fd = true; in e1000_set_mac_type()
323 if (hw->mac_type > e1000_82544) in e1000_set_mac_type()
324 hw->has_smbus = true; in e1000_set_mac_type()
330 * e1000_set_media_type - Set media type and TBI compatibility.
337 if (hw->mac_type != e1000_82543) { in e1000_set_media_type()
339 hw->tbi_compatibility_en = false; in e1000_set_media_type()
342 switch (hw->device_id) { in e1000_set_media_type()
345 hw->media_type = e1000_media_type_internal_serdes; in e1000_set_media_type()
348 switch (hw->mac_type) { in e1000_set_media_type()
351 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
354 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
359 hw->media_type = e1000_media_type_fiber; in e1000_set_media_type()
361 hw->tbi_compatibility_en = false; in e1000_set_media_type()
363 hw->media_type = e1000_media_type_copper; in e1000_set_media_type()
371 * e1000_reset_hw - reset the hardware completely
385 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
403 hw->tbi_compatibility_on = false; in e1000_reset_hw()
413 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
421 * the current PCI configuration. The global reset bit is self- in e1000_reset_hw()
426 switch (hw->mac_type) { in e1000_reset_hw()
433 /* These controllers can't ack the 64-bit write when issuing the in e1000_reset_hw()
434 * reset, so use IO-mapping as a workaround to issue the reset in e1000_reset_hw()
449 /* After MAC reset, force reload of EEPROM to restore power-on settings in e1000_reset_hw()
453 switch (hw->mac_type) { in e1000_reset_hw()
483 if (hw->mac_type >= e1000_82540) { in e1000_reset_hw()
489 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_reset_hw()
507 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_reset_hw()
508 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_reset_hw()
516 * e1000_init_hw - Performs basic configuration of the adapter.
520 * post-reset uninitialized state. Initializes the receive address registers,
522 * configuration and flow control settings. Clears all on-chip counters. Leaves
545 if (hw->mac_type < e1000_82545_rev_3) in e1000_init_hw()
550 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
559 * Receive Address Registers (RARs 0 - 15). in e1000_init_hw()
564 if (hw->mac_type == e1000_82542_rev2_0) { in e1000_init_hw()
568 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE) in e1000_init_hw()
588 if (hw->dma_fairness && hw->mac_type <= e1000_82543) { in e1000_init_hw()
593 switch (hw->mac_type) { in e1000_init_hw()
598 /* Workaround for PCI-X problem when BIOS sets MMRBC in e1000_init_hw()
601 if (hw->bus_type == e1000_bus_type_pcix && in e1000_init_hw()
610 /* Set the transmit descriptor write-back policy */ in e1000_init_hw()
611 if (hw->mac_type > e1000_82544) { in e1000_init_hw()
626 if (hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER || in e1000_init_hw()
627 hw->device_id == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3) { in e1000_init_hw()
640 * e1000_adjust_serdes_amplitude - Adjust SERDES output amplitude based on EEPROM setting.
648 if (hw->media_type != e1000_media_type_internal_serdes) in e1000_adjust_serdes_amplitude()
651 switch (hw->mac_type) { in e1000_adjust_serdes_amplitude()
677 * e1000_setup_link - Configures flow control and link settings.
680 * Determines which flow control settings to use. Calls the appropriate media-
695 * disabling auto-negotiation, and the direction of the in e1000_setup_link()
696 * SW defined pins. If there is no SW over-ride of the flow in e1000_setup_link()
697 * control setting, then the variable hw->fc will in e1000_setup_link()
700 if (hw->fc == E1000_FC_DEFAULT) { in e1000_setup_link()
705 return -E1000_ERR_EEPROM; in e1000_setup_link()
708 hw->fc = E1000_FC_NONE; in e1000_setup_link()
711 hw->fc = E1000_FC_TX_PAUSE; in e1000_setup_link()
713 hw->fc = E1000_FC_FULL; in e1000_setup_link()
720 if (hw->mac_type == e1000_82542_rev2_0) in e1000_setup_link()
721 hw->fc &= (~E1000_FC_TX_PAUSE); in e1000_setup_link()
723 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) in e1000_setup_link()
724 hw->fc &= (~E1000_FC_RX_PAUSE); in e1000_setup_link()
726 hw->original_fc = hw->fc; in e1000_setup_link()
728 e_dbg("After fix-ups FlowControl is now = %x\n", hw->fc); in e1000_setup_link()
737 if (hw->mac_type == e1000_82543) { in e1000_setup_link()
742 return -E1000_ERR_EEPROM; in e1000_setup_link()
750 ret_val = (hw->media_type == e1000_media_type_copper) ? in e1000_setup_link()
764 ew32(FCTTV, hw->fc_pause_time); in e1000_setup_link()
772 if (!(hw->fc & E1000_FC_TX_PAUSE)) { in e1000_setup_link()
780 if (hw->fc_send_xon) { in e1000_setup_link()
781 ew32(FCRTL, (hw->fc_low_water | E1000_FCRTL_XONE)); in e1000_setup_link()
782 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
784 ew32(FCRTL, hw->fc_low_water); in e1000_setup_link()
785 ew32(FCRTH, hw->fc_high_water); in e1000_setup_link()
792 * e1000_setup_fiber_serdes_link - prepare fiber or serdes link
815 if (hw->media_type == e1000_media_type_fiber) in e1000_setup_fiber_serdes_link()
816 signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; in e1000_setup_fiber_serdes_link()
833 * the device accordingly. If auto-negotiation is enabled, then in e1000_setup_fiber_serdes_link()
835 * the Tranmsit Config Word Register (TXCW) and re-start in e1000_setup_fiber_serdes_link()
836 * auto-negotiation. However, if auto-negotiation is disabled, then in e1000_setup_fiber_serdes_link()
848 switch (hw->fc) { in e1000_setup_fiber_serdes_link()
850 /* Flow ctrl is completely disabled by a software over-ride */ in e1000_setup_fiber_serdes_link()
855 * a software over-ride. Since there really isn't a way to in e1000_setup_fiber_serdes_link()
856 * advertise that we are capable of Rx Pause ONLY, we will in e1000_setup_fiber_serdes_link()
865 * by a software over-ride. in e1000_setup_fiber_serdes_link()
871 * over-ride. in e1000_setup_fiber_serdes_link()
877 return -E1000_ERR_CONFIG; in e1000_setup_fiber_serdes_link()
880 /* Since auto-negotiation is enabled, take the link out of reset (the in e1000_setup_fiber_serdes_link()
882 * will restart auto-negotiation. If auto-negotiation is successful in e1000_setup_fiber_serdes_link()
883 * then the link-up status bit will be set and the flow control enable in e1000_setup_fiber_serdes_link()
886 e_dbg("Auto-negotiation enabled\n"); in e1000_setup_fiber_serdes_link()
892 hw->txcw = txcw; in e1000_setup_fiber_serdes_link()
896 * "Link-Up" indication in the Device Status Register. Time-out if a in e1000_setup_fiber_serdes_link()
897 * link isn't seen in 500 milliseconds seconds (Auto-negotiation should in e1000_setup_fiber_serdes_link()
902 if (hw->media_type == e1000_media_type_internal_serdes || in e1000_setup_fiber_serdes_link()
912 e_dbg("Never got a valid link from auto-neg!!!\n"); in e1000_setup_fiber_serdes_link()
913 hw->autoneg_failed = 1; in e1000_setup_fiber_serdes_link()
917 * communicate with non-autonegotiating link partners. in e1000_setup_fiber_serdes_link()
924 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
926 hw->autoneg_failed = 0; in e1000_setup_fiber_serdes_link()
936 * e1000_copper_link_rtl_setup - Copper link setup for e1000_phy_rtl series.
960 switch (hw->phy_type) { in gbe_dhg_phy_setup()
997 * e1000_copper_link_preconfig - early configuration for copper
1009 /* With 82543, we need to force speed and duplex on the MAC equal to in e1000_copper_link_preconfig()
1010 * what the PHY speed and duplex configuration is. In addition, we need in e1000_copper_link_preconfig()
1013 if (hw->mac_type > e1000_82543) { in e1000_copper_link_preconfig()
1032 e_dbg("Phy ID = %x\n", hw->phy_id); in e1000_copper_link_preconfig()
1039 if ((hw->mac_type == e1000_82545_rev_3) || in e1000_copper_link_preconfig()
1040 (hw->mac_type == e1000_82546_rev_3)) { in e1000_copper_link_preconfig()
1048 if (hw->mac_type <= e1000_82543 || in e1000_copper_link_preconfig()
1049 hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || in e1000_copper_link_preconfig()
1050 hw->mac_type == e1000_82541_rev_2 || in e1000_copper_link_preconfig()
1051 hw->mac_type == e1000_82547_rev_2) in e1000_copper_link_preconfig()
1052 hw->phy_reset_disable = false; in e1000_copper_link_preconfig()
1058 * e1000_copper_link_igp_setup - Copper link setup for e1000_phy_igp series.
1067 if (hw->phy_reset_disable) in e1000_copper_link_igp_setup()
1085 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_igp_setup()
1094 /* Configure mdi-mdix settings */ in e1000_copper_link_igp_setup()
1099 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_copper_link_igp_setup()
1100 hw->dsp_config_state = e1000_dsp_config_disabled; in e1000_copper_link_igp_setup()
1105 hw->mdix = 1; in e1000_copper_link_igp_setup()
1108 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1111 switch (hw->mdix) { in e1000_copper_link_igp_setup()
1128 /* set auto-master slave resolution settings */ in e1000_copper_link_igp_setup()
1129 if (hw->autoneg) { in e1000_copper_link_igp_setup()
1130 e1000_ms_type phy_ms_setting = hw->master_slave; in e1000_copper_link_igp_setup()
1132 if (hw->ffe_config_state == e1000_ffe_config_active) in e1000_copper_link_igp_setup()
1133 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_copper_link_igp_setup()
1135 if (hw->dsp_config_state == e1000_dsp_config_activated) in e1000_copper_link_igp_setup()
1136 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_copper_link_igp_setup()
1142 if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { in e1000_copper_link_igp_setup()
1172 hw->original_master_slave = (phy_data & CR_1000T_MS_ENABLE) ? in e1000_copper_link_igp_setup()
1200 * e1000_copper_link_mgp_setup - Copper link setup for e1000_phy_m88 series.
1208 if (hw->phy_reset_disable) in e1000_copper_link_mgp_setup()
1211 /* Enable CRS on TX. This must be set for half-duplex operation. */ in e1000_copper_link_mgp_setup()
1219 * MDI/MDI-X = 0 (default) in e1000_copper_link_mgp_setup()
1220 * 0 - Auto for all speeds in e1000_copper_link_mgp_setup()
1221 * 1 - MDI mode in e1000_copper_link_mgp_setup()
1222 * 2 - MDI-X mode in e1000_copper_link_mgp_setup()
1223 * 3 - Auto for 1000Base-T only (MDI-X for 10/100Base-T modes) in e1000_copper_link_mgp_setup()
1227 switch (hw->mdix) { in e1000_copper_link_mgp_setup()
1246 * 0 - Disabled in e1000_copper_link_mgp_setup()
1247 * 1 - Enabled in e1000_copper_link_mgp_setup()
1250 if (hw->disable_polarity_correction == 1) in e1000_copper_link_mgp_setup()
1256 if (hw->phy_revision < M88E1011_I_REV_4) { in e1000_copper_link_mgp_setup()
1268 if ((hw->phy_revision == E1000_REVISION_2) && in e1000_copper_link_mgp_setup()
1269 (hw->phy_id == M88E1111_I_PHY_ID)) { in e1000_copper_link_mgp_setup()
1303 * e1000_copper_link_autoneg - setup auto-neg
1306 * Setup auto-negotiation and flow control advertisements,
1307 * and then perform auto-negotiation.
1314 /* Perform some bounds checking on the hw->autoneg_advertised in e1000_copper_link_autoneg()
1317 hw->autoneg_advertised &= AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1322 if (hw->autoneg_advertised == 0) in e1000_copper_link_autoneg()
1323 hw->autoneg_advertised = AUTONEG_ADVERTISE_SPEED_DEFAULT; in e1000_copper_link_autoneg()
1326 if (hw->phy_type == e1000_phy_8201) in e1000_copper_link_autoneg()
1327 hw->autoneg_advertised &= AUTONEG_ADVERTISE_10_100_ALL; in e1000_copper_link_autoneg()
1329 e_dbg("Reconfiguring auto-neg advertisement params\n"); in e1000_copper_link_autoneg()
1332 e_dbg("Error Setting up Auto-Negotiation\n"); in e1000_copper_link_autoneg()
1335 e_dbg("Restarting Auto-Neg\n"); in e1000_copper_link_autoneg()
1337 /* Restart auto-negotiation by setting the Auto Neg Enable bit and in e1000_copper_link_autoneg()
1349 /* Does the user want to wait for Auto-Neg to complete here, or in e1000_copper_link_autoneg()
1352 if (hw->wait_autoneg_complete) { in e1000_copper_link_autoneg()
1361 hw->get_link_status = true; in e1000_copper_link_autoneg()
1367 * e1000_copper_link_postconfig - post link setup
1371 * 1) Set up the MAC to the current PHY speed/duplex
1383 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) { in e1000_copper_link_postconfig()
1399 if (hw->phy_type == e1000_phy_igp) { in e1000_copper_link_postconfig()
1411 * e1000_setup_copper_link - phy/speed/duplex setting
1414 * Detects which PHY is present and sets up the speed and duplex
1427 if (hw->phy_type == e1000_phy_igp) { in e1000_setup_copper_link()
1431 } else if (hw->phy_type == e1000_phy_m88) { in e1000_setup_copper_link()
1443 if (hw->autoneg) { in e1000_setup_copper_link()
1454 e_dbg("Forcing speed and duplex\n"); in e1000_setup_copper_link()
1457 e_dbg("Error Forcing Speed and Duplex\n"); in e1000_setup_copper_link()
1490 * e1000_phy_setup_autoneg - phy settings
1501 /* Read the MII Auto-Neg Advertisement Register (Address 4). */ in e1000_phy_setup_autoneg()
1506 /* Read the MII 1000Base-T Control Register (Address 9). */ in e1000_phy_setup_autoneg()
1510 else if (hw->phy_type == e1000_phy_8201) in e1000_phy_setup_autoneg()
1520 /* First we clear all the 10/100 mb speed bits in the Auto-Neg in e1000_phy_setup_autoneg()
1522 * the 1000Base-T Control Register (Address 9). in e1000_phy_setup_autoneg()
1527 e_dbg("autoneg_advertised %x\n", hw->autoneg_advertised); in e1000_phy_setup_autoneg()
1529 /* Do we want to advertise 10 Mb Half Duplex? */ in e1000_phy_setup_autoneg()
1530 if (hw->autoneg_advertised & ADVERTISE_10_HALF) { in e1000_phy_setup_autoneg()
1531 e_dbg("Advertise 10mb Half duplex\n"); in e1000_phy_setup_autoneg()
1535 /* Do we want to advertise 10 Mb Full Duplex? */ in e1000_phy_setup_autoneg()
1536 if (hw->autoneg_advertised & ADVERTISE_10_FULL) { in e1000_phy_setup_autoneg()
1537 e_dbg("Advertise 10mb Full duplex\n"); in e1000_phy_setup_autoneg()
1541 /* Do we want to advertise 100 Mb Half Duplex? */ in e1000_phy_setup_autoneg()
1542 if (hw->autoneg_advertised & ADVERTISE_100_HALF) { in e1000_phy_setup_autoneg()
1543 e_dbg("Advertise 100mb Half duplex\n"); in e1000_phy_setup_autoneg()
1547 /* Do we want to advertise 100 Mb Full Duplex? */ in e1000_phy_setup_autoneg()
1548 if (hw->autoneg_advertised & ADVERTISE_100_FULL) { in e1000_phy_setup_autoneg()
1549 e_dbg("Advertise 100mb Full duplex\n"); in e1000_phy_setup_autoneg()
1553 /* We do not allow the Phy to advertise 1000 Mb Half Duplex */ in e1000_phy_setup_autoneg()
1554 if (hw->autoneg_advertised & ADVERTISE_1000_HALF) { in e1000_phy_setup_autoneg()
1556 ("Advertise 1000mb Half duplex requested, request denied!\n"); in e1000_phy_setup_autoneg()
1559 /* Do we want to advertise 1000 Mb Full Duplex? */ in e1000_phy_setup_autoneg()
1560 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) { in e1000_phy_setup_autoneg()
1561 e_dbg("Advertise 1000mb Full duplex\n"); in e1000_phy_setup_autoneg()
1567 * auto-negotiation is enabled, then software will have to set the in e1000_phy_setup_autoneg()
1568 * "PAUSE" bits to the correct value in the Auto-Negotiation in e1000_phy_setup_autoneg()
1569 * Advertisement Register (PHY_AUTONEG_ADV) and re-start in e1000_phy_setup_autoneg()
1570 * auto-negotiation. in e1000_phy_setup_autoneg()
1582 switch (hw->fc) { in e1000_phy_setup_autoneg()
1585 * software over-ride. in e1000_phy_setup_autoneg()
1591 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1594 * capable of RX Pause ONLY, we will advertise that we in e1000_phy_setup_autoneg()
1603 * disabled, by a software over-ride. in e1000_phy_setup_autoneg()
1610 * over-ride. in e1000_phy_setup_autoneg()
1616 return -E1000_ERR_CONFIG; in e1000_phy_setup_autoneg()
1623 e_dbg("Auto-Neg Advertising %x\n", mii_autoneg_adv_reg); in e1000_phy_setup_autoneg()
1625 if (hw->phy_type == e1000_phy_8201) { in e1000_phy_setup_autoneg()
1638 * e1000_phy_force_speed_duplex - force link settings
1641 * Force PHY speed and duplex settings to hw->forced_speed_duplex
1652 /* Turn off Flow control if we are forcing speed and duplex. */ in e1000_phy_force_speed_duplex()
1653 hw->fc = E1000_FC_NONE; in e1000_phy_force_speed_duplex()
1655 e_dbg("hw->fc = %d\n", hw->fc); in e1000_phy_force_speed_duplex()
1660 /* Set the bits to Force Speed and Duplex in the Device Ctrl Reg. */ in e1000_phy_force_speed_duplex()
1672 /* We need to disable autoneg in order to force link and duplex. */ in e1000_phy_force_speed_duplex()
1676 /* Are we forcing Full or Half Duplex? */ in e1000_phy_force_speed_duplex()
1677 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1678 hw->forced_speed_duplex == e1000_10_full) { in e1000_phy_force_speed_duplex()
1679 /* We want to force full duplex so we SET the full duplex bits in e1000_phy_force_speed_duplex()
1684 e_dbg("Full Duplex\n"); in e1000_phy_force_speed_duplex()
1686 /* We want to force half duplex so we CLEAR the full duplex bits in e1000_phy_force_speed_duplex()
1691 e_dbg("Half Duplex\n"); in e1000_phy_force_speed_duplex()
1695 if (hw->forced_speed_duplex == e1000_100_full || in e1000_phy_force_speed_duplex()
1696 hw->forced_speed_duplex == e1000_100_half) { in e1000_phy_force_speed_duplex()
1715 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1721 /* Clear Auto-Crossover to force MDI manually. M88E1000 requires in e1000_phy_force_speed_duplex()
1722 * MDI forced whenever speed are duplex are forced. in e1000_phy_force_speed_duplex()
1735 /* Disable MDI-X support for 10/100 */ in e1000_phy_force_speed_duplex()
1737 /* Clear Auto-Crossover to force MDI manually. IGP requires MDI in e1000_phy_force_speed_duplex()
1738 * forced whenever speed or duplex are forced. in e1000_phy_force_speed_duplex()
1762 * Since we are forcing speed and duplex, Auto-Neg is not enabled. in e1000_phy_force_speed_duplex()
1768 if (hw->wait_autoneg_complete) { in e1000_phy_force_speed_duplex()
1770 e_dbg("Waiting for forced speed/duplex link.\n"); in e1000_phy_force_speed_duplex()
1774 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1775 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1792 if ((i == 0) && (hw->phy_type == e1000_phy_m88)) { in e1000_phy_force_speed_duplex()
1802 /* This loop will early-out if the link condition has been in e1000_phy_force_speed_duplex()
1805 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_phy_force_speed_duplex()
1809 /* Read the MII Status Register and wait for Auto-Neg in e1000_phy_force_speed_duplex()
1824 if (hw->phy_type == e1000_phy_m88) { in e1000_phy_force_speed_duplex()
1825 /* Because we reset the PHY above, we need to re-force TX_CLK in in e1000_phy_force_speed_duplex()
1844 * enable CRS on Tx. This must be set for both full and half in e1000_phy_force_speed_duplex()
1845 * duplex operation. in e1000_phy_force_speed_duplex()
1858 if ((hw->mac_type == e1000_82544 || in e1000_phy_force_speed_duplex()
1859 hw->mac_type == e1000_82543) && in e1000_phy_force_speed_duplex()
1860 (!hw->autoneg) && in e1000_phy_force_speed_duplex()
1861 (hw->forced_speed_duplex == e1000_10_full || in e1000_phy_force_speed_duplex()
1862 hw->forced_speed_duplex == e1000_10_half)) { in e1000_phy_force_speed_duplex()
1872 * e1000_config_collision_dist - set collision distance register
1876 * Link should have been established previously. Reads the speed and duplex
1883 if (hw->mac_type < e1000_82543) in e1000_config_collision_dist()
1898 * e1000_config_mac_to_phy - sync phy and mac settings
1901 * Sets MAC speed and duplex settings to reflect the those in the PHY
1912 * MAC speed/duplex configuration. in e1000_config_mac_to_phy()
1914 if ((hw->mac_type >= e1000_82544) && (hw->mac_type != e1000_ce4100)) in e1000_config_mac_to_phy()
1918 * and Duplex. in e1000_config_mac_to_phy()
1924 switch (hw->phy_type) { in e1000_config_mac_to_phy()
1943 /* Set up duplex in the Device Control and Transmit Control in e1000_config_mac_to_phy()
1974 * e1000_force_mac_fc - force flow control settings
1991 /* Because we didn't get link via the internal auto-negotiation in e1000_force_mac_fc()
1993 * auto-neg), we have to manually enable/disable transmit an in e1000_force_mac_fc()
1997 * according to the "hw->fc" parameter. in e1000_force_mac_fc()
2009 switch (hw->fc) { in e1000_force_mac_fc()
2026 return -E1000_ERR_CONFIG; in e1000_force_mac_fc()
2030 if (hw->mac_type == e1000_82542_rev2_0) in e1000_force_mac_fc()
2038 * e1000_config_fc_after_link_up - configure flow control after autoneg
2055 u16 duplex; in e1000_config_fc_after_link_up() local
2057 /* Check for the case where we have fiber media and auto-neg failed in e1000_config_fc_after_link_up()
2061 if (((hw->media_type == e1000_media_type_fiber) && in e1000_config_fc_after_link_up()
2062 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2063 ((hw->media_type == e1000_media_type_internal_serdes) && in e1000_config_fc_after_link_up()
2064 (hw->autoneg_failed)) || in e1000_config_fc_after_link_up()
2065 ((hw->media_type == e1000_media_type_copper) && in e1000_config_fc_after_link_up()
2066 (!hw->autoneg))) { in e1000_config_fc_after_link_up()
2074 /* Check for the case where we have copper media and auto-neg is in e1000_config_fc_after_link_up()
2075 * enabled. In this case, we need to check and see if Auto-Neg in e1000_config_fc_after_link_up()
2079 if ((hw->media_type == e1000_media_type_copper) && hw->autoneg) { in e1000_config_fc_after_link_up()
2119 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2138 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2151 if (hw->original_fc == E1000_FC_FULL) { in e1000_config_fc_after_link_up()
2152 hw->fc = E1000_FC_FULL; in e1000_config_fc_after_link_up()
2155 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2164 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2172 hw->fc = E1000_FC_TX_PAUSE; in e1000_config_fc_after_link_up()
2180 *-------|---------|-------|---------|------------------ in e1000_config_fc_after_link_up()
2188 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2214 else if ((hw->original_fc == E1000_FC_NONE || in e1000_config_fc_after_link_up()
2215 hw->original_fc == E1000_FC_TX_PAUSE) || in e1000_config_fc_after_link_up()
2216 hw->fc_strict_ieee) { in e1000_config_fc_after_link_up()
2217 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2220 hw->fc = E1000_FC_RX_PAUSE; in e1000_config_fc_after_link_up()
2225 /* Now we need to do one last check... If we auto- in e1000_config_fc_after_link_up()
2226 * negotiated to HALF DUPLEX, flow control should not be in e1000_config_fc_after_link_up()
2230 e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_config_fc_after_link_up()
2233 ("Error getting link speed and duplex\n"); in e1000_config_fc_after_link_up()
2237 if (duplex == HALF_DUPLEX) in e1000_config_fc_after_link_up()
2238 hw->fc = E1000_FC_NONE; in e1000_config_fc_after_link_up()
2258 * e1000_check_for_serdes_link_generic - Check for link (Serdes)
2275 /* If we don't have link (auto-negotiation failed or link partner in e1000_check_for_serdes_link_generic()
2276 * cannot auto-negotiate), and our link partner is not trying to in e1000_check_for_serdes_link_generic()
2277 * auto-negotiate with us (we are receiving idles or data), in e1000_check_for_serdes_link_generic()
2278 * we need to force link up. We also need to give auto-negotiation in e1000_check_for_serdes_link_generic()
2283 if (hw->autoneg_failed == 0) { in e1000_check_for_serdes_link_generic()
2284 hw->autoneg_failed = 1; in e1000_check_for_serdes_link_generic()
2289 /* Disable auto-negotiation in the TXCW register */ in e1000_check_for_serdes_link_generic()
2290 ew32(TXCW, (hw->txcw & ~E1000_TXCW_ANE)); in e1000_check_for_serdes_link_generic()
2292 /* Force link-up and also force full-duplex. */ in e1000_check_for_serdes_link_generic()
2305 * sets, re-enable auto-negotiation in the TXCW register in e1000_check_for_serdes_link_generic()
2307 * in an attempt to auto-negotiate with our link partner. in e1000_check_for_serdes_link_generic()
2310 ew32(TXCW, hw->txcw); in e1000_check_for_serdes_link_generic()
2313 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2315 /* If we force link for non-auto-negotiation switch, check in e1000_check_for_serdes_link_generic()
2324 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2325 e_dbg("SERDES: Link up - forced.\n"); in e1000_check_for_serdes_link_generic()
2328 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2329 e_dbg("SERDES: Link down - force failed.\n"); in e1000_check_for_serdes_link_generic()
2341 hw->serdes_has_link = true; in e1000_check_for_serdes_link_generic()
2342 e_dbg("SERDES: Link up - autoneg " in e1000_check_for_serdes_link_generic()
2345 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2346 e_dbg("SERDES: Link down - invalid" in e1000_check_for_serdes_link_generic()
2350 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2351 e_dbg("SERDES: Link down - no sync.\n"); in e1000_check_for_serdes_link_generic()
2354 hw->serdes_has_link = false; in e1000_check_for_serdes_link_generic()
2355 e_dbg("SERDES: Link down - autoneg failed\n"); in e1000_check_for_serdes_link_generic()
2385 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2386 (hw->media_type == e1000_media_type_internal_serdes)) { in e1000_check_for_link()
2389 if (hw->media_type == e1000_media_type_fiber) { in e1000_check_for_link()
2391 hw->get_link_status = false; in e1000_check_for_link()
2396 * registers to see if Auto-Neg has completed and/or if our link in e1000_check_for_link()
2401 if ((hw->media_type == e1000_media_type_copper) && hw->get_link_status) { in e1000_check_for_link()
2403 * link. If so, then we want to get the current speed/duplex in e1000_check_for_link()
2415 hw->get_link_status = false; in e1000_check_for_link()
2417 * immediately after link-up in e1000_check_for_link()
2421 /* If we are on 82544 or 82543 silicon and speed/duplex in e1000_check_for_link()
2430 if ((hw->mac_type == e1000_82544 || in e1000_check_for_link()
2431 hw->mac_type == e1000_82543) && in e1000_check_for_link()
2432 (!hw->autoneg) && in e1000_check_for_link()
2433 (hw->forced_speed_duplex == e1000_10_full || in e1000_check_for_link()
2434 hw->forced_speed_duplex == e1000_10_half)) { in e1000_check_for_link()
2449 /* If we are forcing speed/duplex, then we simply return since in e1000_check_for_link()
2452 if (!hw->autoneg) in e1000_check_for_link()
2453 return -E1000_ERR_CONFIG; in e1000_check_for_link()
2458 /* We have a M88E1000 PHY and Auto-Neg is enabled. If we in e1000_check_for_link()
2460 * Speed Detection takes care of MAC speed/duplex in e1000_check_for_link()
2463 * speed/duplex on the MAC to the current PHY speed/duplex in e1000_check_for_link()
2466 if ((hw->mac_type >= e1000_82544) && in e1000_check_for_link()
2467 (hw->mac_type != e1000_ce4100)) in e1000_check_for_link()
2478 /* Configure Flow Control now that Auto-Neg has completed. in e1000_check_for_link()
2480 * because we may have had to re-autoneg with a different link in e1000_check_for_link()
2490 * auto-negotiated link. These are conditions for checking the in e1000_check_for_link()
2497 if (hw->tbi_compatibility_en) { in e1000_check_for_link()
2498 u16 speed, duplex; in e1000_check_for_link() local
2501 e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_check_for_link()
2505 ("Error getting link speed and duplex\n"); in e1000_check_for_link()
2512 if (hw->tbi_compatibility_on) { in e1000_check_for_link()
2519 hw->tbi_compatibility_on = false; in e1000_check_for_link()
2528 if (!hw->tbi_compatibility_on) { in e1000_check_for_link()
2529 hw->tbi_compatibility_on = true; in e1000_check_for_link()
2538 if ((hw->media_type == e1000_media_type_fiber) || in e1000_check_for_link()
2539 (hw->media_type == e1000_media_type_internal_serdes)) in e1000_check_for_link()
2549 * @duplex: Duplex setting of the connection
2551 * Detects the current speed and duplex settings of the hardware.
2553 s32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex) in e1000_get_speed_and_duplex() argument
2559 if (hw->mac_type >= e1000_82543) { in e1000_get_speed_and_duplex()
2573 *duplex = FULL_DUPLEX; in e1000_get_speed_and_duplex()
2574 e_dbg("Full Duplex\n"); in e1000_get_speed_and_duplex()
2576 *duplex = HALF_DUPLEX; in e1000_get_speed_and_duplex()
2577 e_dbg(" Half Duplex\n"); in e1000_get_speed_and_duplex()
2580 e_dbg("1000 Mbs, Full Duplex\n"); in e1000_get_speed_and_duplex()
2582 *duplex = FULL_DUPLEX; in e1000_get_speed_and_duplex()
2585 /* IGP01 PHY may advertise full duplex operation after speed downgrade in e1000_get_speed_and_duplex()
2586 * even if it is operating at half duplex. Here we set the duplex in e1000_get_speed_and_duplex()
2587 * settings to match the duplex in the link partner's capabilities. in e1000_get_speed_and_duplex()
2589 if (hw->phy_type == e1000_phy_igp && hw->speed_downgraded) { in e1000_get_speed_and_duplex()
2595 *duplex = HALF_DUPLEX; in e1000_get_speed_and_duplex()
2605 *duplex = HALF_DUPLEX; in e1000_get_speed_and_duplex()
2624 e_dbg("Waiting for Auto-Neg to complete.\n"); in e1000_wait_autoneg()
2627 for (i = PHY_AUTO_NEG_TIME; i > 0; i--) { in e1000_wait_autoneg()
2628 /* Read the MII Status Register and wait for Auto-Neg in e1000_wait_autoneg()
2646 * e1000_raise_mdi_clk - Raises the Management Data Clock
2661 * e1000_lower_mdi_clk - Lowers the Management Data Clock
2676 * e1000_shift_out_mdi_bits - Shifts data bits out to the PHY
2693 mask <<= (count - 1); in e1000_shift_out_mdi_bits()
2724 * e1000_shift_in_mdi_bits - Shifts data bits in from the PHY
2777 * e1000_read_phy_reg - read a phy register
2792 if ((hw->phy_type == e1000_phy_igp) && in e1000_read_phy_reg()
2813 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_read_phy_reg_ex()
2817 return -E1000_ERR_PARAM; in e1000_read_phy_reg_ex()
2820 if (hw->mac_type > e1000_82543) { in e1000_read_phy_reg_ex()
2821 /* Set up Op-code, Phy Address, and register address in the MDI in e1000_read_phy_reg_ex()
2825 if (hw->mac_type == e1000_ce4100) { in e1000_read_phy_reg_ex()
2845 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2851 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2872 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2876 return -E1000_ERR_PHY; in e1000_read_phy_reg_ex()
2905 * need to "shift in" the 16-bit value (18 total bits) of the in e1000_read_phy_reg_ex()
2914 * e1000_write_phy_reg - write a phy register
2929 if ((hw->phy_type == e1000_phy_igp) && in e1000_write_phy_reg()
2951 const u32 phy_addr = (hw->mac_type == e1000_ce4100) ? hw->phy_addr : 1; in e1000_write_phy_reg_ex()
2955 return -E1000_ERR_PARAM; in e1000_write_phy_reg_ex()
2958 if (hw->mac_type > e1000_82543) { in e1000_write_phy_reg_ex()
2959 /* Set up Op-code, Phy Address, register address, and data in e1000_write_phy_reg_ex()
2964 if (hw->mac_type == e1000_ce4100) { in e1000_write_phy_reg_ex()
2984 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3005 return -E1000_ERR_PHY; in e1000_write_phy_reg_ex()
3034 * e1000_phy_hw_reset - reset the phy, hardware style
3037 * Returns the PHY to the power-on reset state
3046 if (hw->mac_type > e1000_82543) { in e1000_phy_hw_reset()
3050 * and de-assert. in e1000_phy_hw_reset()
3078 if ((hw->mac_type == e1000_82541) || (hw->mac_type == e1000_82547)) { in e1000_phy_hw_reset()
3091 * e1000_phy_reset - reset the phy to commit settings
3102 switch (hw->phy_type) { in e1000_phy_reset()
3122 if (hw->phy_type == e1000_phy_igp) in e1000_phy_reset()
3129 * e1000_detect_gig_phy - check the phy type
3140 if (hw->phy_id != 0) in e1000_detect_gig_phy()
3148 hw->phy_id = (u32)(phy_id_high << 16); in e1000_detect_gig_phy()
3154 hw->phy_id |= (u32)(phy_id_low & PHY_REVISION_MASK); in e1000_detect_gig_phy()
3155 hw->phy_revision = (u32)phy_id_low & ~PHY_REVISION_MASK; in e1000_detect_gig_phy()
3157 switch (hw->mac_type) { in e1000_detect_gig_phy()
3159 if (hw->phy_id == M88E1000_E_PHY_ID) in e1000_detect_gig_phy()
3163 if (hw->phy_id == M88E1000_I_PHY_ID) in e1000_detect_gig_phy()
3171 if (hw->phy_id == M88E1011_I_PHY_ID) in e1000_detect_gig_phy()
3175 if ((hw->phy_id == RTL8211B_PHY_ID) || in e1000_detect_gig_phy()
3176 (hw->phy_id == RTL8201N_PHY_ID) || in e1000_detect_gig_phy()
3177 (hw->phy_id == M88E1118_E_PHY_ID)) in e1000_detect_gig_phy()
3184 if (hw->phy_id == IGP01E1000_I_PHY_ID) in e1000_detect_gig_phy()
3188 e_dbg("Invalid MAC type %d\n", hw->mac_type); in e1000_detect_gig_phy()
3189 return -E1000_ERR_CONFIG; in e1000_detect_gig_phy()
3194 e_dbg("PHY ID 0x%X detected\n", hw->phy_id); in e1000_detect_gig_phy()
3197 e_dbg("Invalid PHY ID 0x%X\n", hw->phy_id); in e1000_detect_gig_phy()
3198 return -E1000_ERR_PHY; in e1000_detect_gig_phy()
3202 * e1000_phy_reset_dsp - reset DSP
3228 * e1000_phy_igp_get_info - get igp specific registers
3242 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_igp_get_info()
3244 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_igp_get_info()
3247 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_normal; in e1000_phy_igp_get_info()
3250 phy_info->polarity_correction = e1000_polarity_reversal_enabled; in e1000_phy_igp_get_info()
3257 phy_info->cable_polarity = polarity; in e1000_phy_igp_get_info()
3263 phy_info->mdix_mode = in e1000_phy_igp_get_info()
3275 phy_info->local_rx = FIELD_GET(SR_1000T_LOCAL_RX_STATUS, in e1000_phy_igp_get_info()
3278 phy_info->remote_rx = FIELD_GET(SR_1000T_REMOTE_RX_STATUS, in e1000_phy_igp_get_info()
3291 phy_info->cable_length = e1000_cable_length_50; in e1000_phy_igp_get_info()
3293 phy_info->cable_length = e1000_cable_length_50_80; in e1000_phy_igp_get_info()
3295 phy_info->cable_length = e1000_cable_length_80_110; in e1000_phy_igp_get_info()
3297 phy_info->cable_length = e1000_cable_length_110_140; in e1000_phy_igp_get_info()
3299 phy_info->cable_length = e1000_cable_length_140; in e1000_phy_igp_get_info()
3306 * e1000_phy_m88_get_info - get m88 specific registers
3320 * and it stored in the hw->speed_downgraded parameter. in e1000_phy_m88_get_info()
3322 phy_info->downshift = (e1000_downshift) hw->speed_downgraded; in e1000_phy_m88_get_info()
3328 phy_info->extended_10bt_distance = in e1000_phy_m88_get_info()
3333 phy_info->polarity_correction = in e1000_phy_m88_get_info()
3341 phy_info->cable_polarity = polarity; in e1000_phy_m88_get_info()
3347 phy_info->mdix_mode = in e1000_phy_m88_get_info()
3354 phy_info->cable_length = in e1000_phy_m88_get_info()
3362 phy_info->local_rx = FIELD_GET(SR_1000T_LOCAL_RX_STATUS, in e1000_phy_m88_get_info()
3365 phy_info->remote_rx = FIELD_GET(SR_1000T_REMOTE_RX_STATUS, in e1000_phy_m88_get_info()
3374 * e1000_phy_get_info - request phy info
3385 phy_info->cable_length = e1000_cable_length_undefined; in e1000_phy_get_info()
3386 phy_info->extended_10bt_distance = e1000_10bt_ext_dist_enable_undefined; in e1000_phy_get_info()
3387 phy_info->cable_polarity = e1000_rev_polarity_undefined; in e1000_phy_get_info()
3388 phy_info->downshift = e1000_downshift_undefined; in e1000_phy_get_info()
3389 phy_info->polarity_correction = e1000_polarity_reversal_undefined; in e1000_phy_get_info()
3390 phy_info->mdix_mode = e1000_auto_x_mode_undefined; in e1000_phy_get_info()
3391 phy_info->local_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3392 phy_info->remote_rx = e1000_1000t_rx_status_undefined; in e1000_phy_get_info()
3394 if (hw->media_type != e1000_media_type_copper) { in e1000_phy_get_info()
3396 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3409 return -E1000_ERR_CONFIG; in e1000_phy_get_info()
3412 if (hw->phy_type == e1000_phy_igp) in e1000_phy_get_info()
3414 else if ((hw->phy_type == e1000_phy_8211) || in e1000_phy_get_info()
3415 (hw->phy_type == e1000_phy_8201)) in e1000_phy_get_info()
3423 if (!hw->autoneg && (hw->mdix == 0 || hw->mdix == 3)) { in e1000_validate_mdi_setting()
3425 hw->mdix = 1; in e1000_validate_mdi_setting()
3426 return -E1000_ERR_CONFIG; in e1000_validate_mdi_setting()
3432 * e1000_init_eeprom_params - initialize sw eeprom vars
3440 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_init_eeprom_params()
3445 switch (hw->mac_type) { in e1000_init_eeprom_params()
3450 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3451 eeprom->word_size = 64; in e1000_init_eeprom_params()
3452 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3453 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3454 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3461 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3462 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3463 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3465 eeprom->word_size = 256; in e1000_init_eeprom_params()
3466 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3468 eeprom->word_size = 64; in e1000_init_eeprom_params()
3469 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3477 eeprom->type = e1000_eeprom_spi; in e1000_init_eeprom_params()
3478 eeprom->opcode_bits = 8; in e1000_init_eeprom_params()
3479 eeprom->delay_usec = 1; in e1000_init_eeprom_params()
3481 eeprom->page_size = 32; in e1000_init_eeprom_params()
3482 eeprom->address_bits = 16; in e1000_init_eeprom_params()
3484 eeprom->page_size = 8; in e1000_init_eeprom_params()
3485 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3488 eeprom->type = e1000_eeprom_microwire; in e1000_init_eeprom_params()
3489 eeprom->opcode_bits = 3; in e1000_init_eeprom_params()
3490 eeprom->delay_usec = 50; in e1000_init_eeprom_params()
3492 eeprom->word_size = 256; in e1000_init_eeprom_params()
3493 eeprom->address_bits = 8; in e1000_init_eeprom_params()
3495 eeprom->word_size = 64; in e1000_init_eeprom_params()
3496 eeprom->address_bits = 6; in e1000_init_eeprom_params()
3504 if (eeprom->type == e1000_eeprom_spi) { in e1000_init_eeprom_params()
3509 eeprom->word_size = 64; in e1000_init_eeprom_params()
3522 eeprom->word_size = 1 << (eeprom_size + EEPROM_WORD_SIZE_SHIFT); in e1000_init_eeprom_params()
3528 * e1000_raise_ee_clk - Raises the EEPROM's clock input.
3540 udelay(hw->eeprom.delay_usec); in e1000_raise_ee_clk()
3544 * e1000_lower_ee_clk - Lowers the EEPROM's clock input.
3556 udelay(hw->eeprom.delay_usec); in e1000_lower_ee_clk()
3560 * e1000_shift_out_ee_bits - Shift data bits out to the EEPROM.
3567 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_shift_out_ee_bits()
3575 mask = 0x01 << (count - 1); in e1000_shift_out_ee_bits()
3577 if (eeprom->type == e1000_eeprom_microwire) in e1000_shift_out_ee_bits()
3579 else if (eeprom->type == e1000_eeprom_spi) in e1000_shift_out_ee_bits()
3597 udelay(eeprom->delay_usec); in e1000_shift_out_ee_bits()
3612 * e1000_shift_in_ee_bits - Shift data bits in from the EEPROM
3651 * e1000_acquire_eeprom - Prepares EEPROM for access
3659 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_acquire_eeprom()
3665 if (hw->mac_type > e1000_82544) { in e1000_acquire_eeprom()
3679 return -E1000_ERR_EEPROM; in e1000_acquire_eeprom()
3685 if (eeprom->type == e1000_eeprom_microwire) { in e1000_acquire_eeprom()
3693 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_acquire_eeprom()
3705 * e1000_standby_eeprom - Returns EEPROM to a "standby" state
3710 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_standby_eeprom()
3715 if (eeprom->type == e1000_eeprom_microwire) { in e1000_standby_eeprom()
3719 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3725 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3731 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3737 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3738 } else if (eeprom->type == e1000_eeprom_spi) { in e1000_standby_eeprom()
3743 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3747 udelay(eeprom->delay_usec); in e1000_standby_eeprom()
3752 * e1000_release_eeprom - drop chip select
3763 if (hw->eeprom.type == e1000_eeprom_spi) { in e1000_release_eeprom()
3770 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3771 } else if (hw->eeprom.type == e1000_eeprom_microwire) { in e1000_release_eeprom()
3774 /* CS on Microwire is active-high */ in e1000_release_eeprom()
3783 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3789 udelay(hw->eeprom.delay_usec); in e1000_release_eeprom()
3793 if (hw->mac_type > e1000_82544) { in e1000_release_eeprom()
3800 * e1000_spi_eeprom_ready - Reads a 16 bit word from the EEPROM.
3816 hw->eeprom.opcode_bits); in e1000_spi_eeprom_ready()
3827 /* ATMEL SPI write time could vary from 0-20mSec on 3.3V devices (and in e1000_spi_eeprom_ready()
3828 * only 0-5mSec on 5V devices) in e1000_spi_eeprom_ready()
3832 return -E1000_ERR_EEPROM; in e1000_spi_eeprom_ready()
3839 * e1000_read_eeprom - Reads a 16 bit word from the EEPROM.
3858 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_read_eeprom()
3861 if (hw->mac_type == e1000_ce4100) { in e1000_do_read_eeprom()
3870 if ((offset >= eeprom->word_size) || in e1000_do_read_eeprom()
3871 (words > eeprom->word_size - offset) || in e1000_do_read_eeprom()
3874 "size = %d\n", offset, eeprom->word_size); in e1000_do_read_eeprom()
3875 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3878 /* EEPROM's that don't use EERD to read require us to bit-bang the SPI in e1000_do_read_eeprom()
3882 /* Prepare the EEPROM for bit-bang reading */ in e1000_do_read_eeprom()
3884 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3886 /* Set up the SPI or Microwire EEPROM for bit-bang reading. We have in e1000_do_read_eeprom()
3889 if (eeprom->type == e1000_eeprom_spi) { in e1000_do_read_eeprom()
3895 return -E1000_ERR_EEPROM; in e1000_do_read_eeprom()
3903 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_do_read_eeprom()
3907 e1000_shift_out_ee_bits(hw, read_opcode, eeprom->opcode_bits); in e1000_do_read_eeprom()
3909 eeprom->address_bits); in e1000_do_read_eeprom()
3913 * overhead of eeprom setup and tear-down. The address counter in e1000_do_read_eeprom()
3922 } else if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_read_eeprom()
3927 eeprom->opcode_bits); in e1000_do_read_eeprom()
3929 eeprom->address_bits); in e1000_do_read_eeprom()
3932 * overhead of eeprom setup and tear-down. in e1000_do_read_eeprom()
3947 * e1000_validate_eeprom_checksum - Verifies that the EEPROM has a valid checksum
3962 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3969 if ((hw->subsystem_vendor_id == 0x103C) && (eeprom_data == 0x16d6)) in e1000_validate_eeprom_checksum()
3977 return -E1000_ERR_EEPROM; in e1000_validate_eeprom_checksum()
3982 * e1000_update_eeprom_checksum - Calculates/writes the EEPROM checksum
3996 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4000 checksum = (u16)EEPROM_SUM - checksum; in e1000_update_eeprom_checksum()
4003 return -E1000_ERR_EEPROM; in e1000_update_eeprom_checksum()
4009 * e1000_write_eeprom - write words to the different EEPROM types.
4031 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_do_write_eeprom()
4034 if (hw->mac_type == e1000_ce4100) { in e1000_do_write_eeprom()
4043 if ((offset >= eeprom->word_size) || in e1000_do_write_eeprom()
4044 (words > eeprom->word_size - offset) || in e1000_do_write_eeprom()
4047 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4052 return -E1000_ERR_EEPROM; in e1000_do_write_eeprom()
4054 if (eeprom->type == e1000_eeprom_microwire) { in e1000_do_write_eeprom()
4068 * e1000_write_eeprom_spi - Writes a 16 bit word to a given offset in an SPI EEPROM.
4077 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_spi()
4084 return -E1000_ERR_EEPROM; in e1000_write_eeprom_spi()
4091 eeprom->opcode_bits); in e1000_write_eeprom_spi()
4098 if ((eeprom->address_bits == 8) && (offset >= 128)) in e1000_write_eeprom_spi()
4101 /* Send the Write command (8-bit opcode + addr) */ in e1000_write_eeprom_spi()
4102 e1000_shift_out_ee_bits(hw, write_opcode, eeprom->opcode_bits); in e1000_write_eeprom_spi()
4105 eeprom->address_bits); in e1000_write_eeprom_spi()
4119 /* Some larger eeprom sizes are capable of a 32-byte in e1000_write_eeprom_spi()
4121 * capable of an 8-byte PAGE WRITE operation. Break the in e1000_write_eeprom_spi()
4124 if ((((offset + widx) * 2) % eeprom->page_size) == 0) { in e1000_write_eeprom_spi()
4135 * e1000_write_eeprom_microwire - Writes a 16 bit word to a given offset in a Microwire EEPROM.
4144 struct e1000_eeprom_info *eeprom = &hw->eeprom; in e1000_write_eeprom_microwire()
4149 /* Send the write enable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4150 * 6/8-bit dummy address beginning with 11). It's less work to include in e1000_write_eeprom_microwire()
4156 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4158 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4164 /* Send the Write command (3-bit opcode + addr) */ in e1000_write_eeprom_microwire()
4166 eeprom->opcode_bits); in e1000_write_eeprom_microwire()
4169 eeprom->address_bits); in e1000_write_eeprom_microwire()
4192 return -E1000_ERR_EEPROM; in e1000_write_eeprom_microwire()
4202 /* Send the write disable command to the EEPROM (3-bit opcode plus in e1000_write_eeprom_microwire()
4203 * 6/8-bit dummy address beginning with 10). It's less work to include in e1000_write_eeprom_microwire()
4209 (u16)(eeprom->opcode_bits + 2)); in e1000_write_eeprom_microwire()
4211 e1000_shift_out_ee_bits(hw, 0, (u16)(eeprom->address_bits - 2)); in e1000_write_eeprom_microwire()
4217 * e1000_read_mac_addr - read the adapters MAC from eeprom
4232 return -E1000_ERR_EEPROM; in e1000_read_mac_addr()
4234 hw->perm_mac_addr[i] = (u8)(eeprom_data & 0x00FF); in e1000_read_mac_addr()
4235 hw->perm_mac_addr[i + 1] = (u8)(eeprom_data >> 8); in e1000_read_mac_addr()
4238 switch (hw->mac_type) { in e1000_read_mac_addr()
4244 hw->perm_mac_addr[5] ^= 0x01; in e1000_read_mac_addr()
4249 hw->mac_addr[i] = hw->perm_mac_addr[i]; in e1000_read_mac_addr()
4254 * e1000_init_rx_addrs - Initializes receive address filters.
4269 e1000_rar_set(hw, hw->mac_addr, 0); in e1000_init_rx_addrs()
4276 e_dbg("Clearing RAR[1-14]\n"); in e1000_init_rx_addrs()
4286 * e1000_hash_mc_addr - Hashes an address to determine its location in the multicast table
4297 switch (hw->mc_filter_type) { in e1000_hash_mc_addr()
4325 * e1000_rar_set - Puts an ethernet address into a receive address register.
4353 * addresses and undo the re-direction to manageability. in e1000_rar_set()
4356 * configure the Rx unit. Last, we re-enable the AV bits and continue in e1000_rar_set()
4359 switch (hw->mac_type) { in e1000_rar_set()
4373 * e1000_write_vfta - Writes a value to the specified offset in the VLAN filter table.
4382 if ((hw->mac_type == e1000_82544) && ((offset & 0x1) == 1)) { in e1000_write_vfta()
4383 temp = E1000_READ_REG_ARRAY(hw, VFTA, (offset - 1)); in e1000_write_vfta()
4386 E1000_WRITE_REG_ARRAY(hw, VFTA, (offset - 1), temp); in e1000_write_vfta()
4395 * e1000_clear_vfta - Clears the VLAN filter table
4417 if (hw->mac_type < e1000_82540) { in e1000_id_led_init()
4423 hw->ledctl_default = ledctl; in e1000_id_led_init()
4424 hw->ledctl_mode1 = hw->ledctl_default; in e1000_id_led_init()
4425 hw->ledctl_mode2 = hw->ledctl_default; in e1000_id_led_init()
4429 return -E1000_ERR_EEPROM; in e1000_id_led_init()
4443 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4444 hw->ledctl_mode1 |= ledctl_on << (i << 3); in e1000_id_led_init()
4449 hw->ledctl_mode1 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4450 hw->ledctl_mode1 |= ledctl_off << (i << 3); in e1000_id_led_init()
4460 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4461 hw->ledctl_mode2 |= ledctl_on << (i << 3); in e1000_id_led_init()
4466 hw->ledctl_mode2 &= ~(ledctl_mask << (i << 3)); in e1000_id_led_init()
4467 hw->ledctl_mode2 |= ledctl_off << (i << 3); in e1000_id_led_init()
4488 switch (hw->mac_type) { in e1000_setup_led()
4501 &hw->phy_spd_default); in e1000_setup_led()
4505 (u16)(hw->phy_spd_default & in e1000_setup_led()
4511 if (hw->media_type == e1000_media_type_fiber) { in e1000_setup_led()
4514 hw->ledctl_default = ledctl; in e1000_setup_led()
4522 } else if (hw->media_type == e1000_media_type_copper) in e1000_setup_led()
4523 ew32(LEDCTL, hw->ledctl_mode1); in e1000_setup_led()
4531 * e1000_cleanup_led - Restores the saved state of the SW controlable LED.
4538 switch (hw->mac_type) { in e1000_cleanup_led()
4551 hw->phy_spd_default); in e1000_cleanup_led()
4557 ew32(LEDCTL, hw->ledctl_default); in e1000_cleanup_led()
4565 * e1000_led_on - Turns on the software controllable LED
4572 switch (hw->mac_type) { in e1000_led_on()
4581 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4592 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_on()
4596 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_on()
4597 ew32(LEDCTL, hw->ledctl_mode2); in e1000_led_on()
4609 * e1000_led_off - Turns off the software controllable LED
4616 switch (hw->mac_type) { in e1000_led_off()
4625 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4636 if (hw->media_type == e1000_media_type_fiber) { in e1000_led_off()
4640 } else if (hw->media_type == e1000_media_type_copper) { in e1000_led_off()
4641 ew32(LEDCTL, hw->ledctl_mode1); in e1000_led_off()
4653 * e1000_clear_hw_cntrs - Clears all hardware statistics counters.
4712 if (hw->mac_type < e1000_82543) in e1000_clear_hw_cntrs()
4722 if (hw->mac_type <= e1000_82544) in e1000_clear_hw_cntrs()
4731 * e1000_reset_adaptive - Resets Adaptive IFS to its default state.
4735 * hw->ifs_params_forced to true. However, you must initialize hw->
4741 if (hw->adaptive_ifs) { in e1000_reset_adaptive()
4742 if (!hw->ifs_params_forced) { in e1000_reset_adaptive()
4743 hw->current_ifs_val = 0; in e1000_reset_adaptive()
4744 hw->ifs_min_val = IFS_MIN; in e1000_reset_adaptive()
4745 hw->ifs_max_val = IFS_MAX; in e1000_reset_adaptive()
4746 hw->ifs_step_size = IFS_STEP; in e1000_reset_adaptive()
4747 hw->ifs_ratio = IFS_RATIO; in e1000_reset_adaptive()
4749 hw->in_ifs_mode = false; in e1000_reset_adaptive()
4757 * e1000_update_adaptive - update adaptive IFS
4765 if (hw->adaptive_ifs) { in e1000_update_adaptive()
4766 if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) { in e1000_update_adaptive()
4767 if (hw->tx_packet_delta > MIN_NUM_XMITS) { in e1000_update_adaptive()
4768 hw->in_ifs_mode = true; in e1000_update_adaptive()
4769 if (hw->current_ifs_val < hw->ifs_max_val) { in e1000_update_adaptive()
4770 if (hw->current_ifs_val == 0) in e1000_update_adaptive()
4771 hw->current_ifs_val = in e1000_update_adaptive()
4772 hw->ifs_min_val; in e1000_update_adaptive()
4774 hw->current_ifs_val += in e1000_update_adaptive()
4775 hw->ifs_step_size; in e1000_update_adaptive()
4776 ew32(AIT, hw->current_ifs_val); in e1000_update_adaptive()
4780 if (hw->in_ifs_mode && in e1000_update_adaptive()
4781 (hw->tx_packet_delta <= MIN_NUM_XMITS)) { in e1000_update_adaptive()
4782 hw->current_ifs_val = 0; in e1000_update_adaptive()
4783 hw->in_ifs_mode = false; in e1000_update_adaptive()
4802 switch (hw->mac_type) { in e1000_get_bus_info()
4805 hw->bus_type = e1000_bus_type_pci; in e1000_get_bus_info()
4806 hw->bus_speed = e1000_bus_speed_unknown; in e1000_get_bus_info()
4807 hw->bus_width = e1000_bus_width_unknown; in e1000_get_bus_info()
4811 hw->bus_type = (status & E1000_STATUS_PCIX_MODE) ? in e1000_get_bus_info()
4814 if (hw->device_id == E1000_DEV_ID_82546EB_QUAD_COPPER) { in e1000_get_bus_info()
4815 hw->bus_speed = (hw->bus_type == e1000_bus_type_pci) ? in e1000_get_bus_info()
4817 } else if (hw->bus_type == e1000_bus_type_pci) { in e1000_get_bus_info()
4818 hw->bus_speed = (status & E1000_STATUS_PCI66) ? in e1000_get_bus_info()
4823 hw->bus_speed = e1000_bus_speed_66; in e1000_get_bus_info()
4826 hw->bus_speed = e1000_bus_speed_100; in e1000_get_bus_info()
4829 hw->bus_speed = e1000_bus_speed_133; in e1000_get_bus_info()
4832 hw->bus_speed = e1000_bus_speed_reserved; in e1000_get_bus_info()
4836 hw->bus_width = (status & E1000_STATUS_BUS64) ? in e1000_get_bus_info()
4853 unsigned long io_addr = hw->io_base; in e1000_write_reg_io()
4854 unsigned long io_data = hw->io_base + 4; in e1000_write_reg_io()
4861 * e1000_get_cable_length - Estimates the cable length.
4866 * returns: - E1000_ERR_XXX
4885 if (hw->phy_type == e1000_phy_m88) { in e1000_get_cable_length()
4915 return -E1000_ERR_PHY; in e1000_get_cable_length()
4917 } else if (hw->phy_type == e1000_phy_igp) { /* For IGP PHY */ in e1000_get_cable_length()
4937 IGP01E1000_AGC_LENGTH_TABLE_SIZE - 1) || in e1000_get_cable_length()
4939 return -E1000_ERR_PHY; in e1000_get_cable_length()
4951 agc_value -= min_agc_value; in e1000_get_cable_length()
4954 agc_value /= (IGP01E1000_PHY_CHANNEL_NUM - 1); in e1000_get_cable_length()
4961 *min_length = ((e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4963 (e1000_igp_cable_length_table[agc_value] - in e1000_get_cable_length()
4973 * e1000_check_polarity - Check the cable polarity
4975 * @polarity: output parameter : 0 - Polarity is not reversed
4976 * 1 - Polarity is reversed.
4978 * returns: - E1000_ERR_XXX
4993 if (hw->phy_type == e1000_phy_m88) { in e1000_check_polarity()
5002 } else if (hw->phy_type == e1000_phy_igp) { in e1000_check_polarity()
5039 * e1000_check_downshift - Check if Downshift occurred
5042 * returns: - E1000_ERR_XXX
5055 if (hw->phy_type == e1000_phy_igp) { in e1000_check_downshift()
5061 hw->speed_downgraded = in e1000_check_downshift()
5063 } else if (hw->phy_type == e1000_phy_m88) { in e1000_check_downshift()
5069 hw->speed_downgraded = FIELD_GET(M88E1000_PSSR_DOWNSHIFT, in e1000_check_downshift()
5093 if (hw->dsp_config_state != e1000_dsp_config_enabled) in e1000_1000Mb_check_cable_length()
5110 hw->dsp_config_state = e1000_dsp_config_activated; in e1000_1000Mb_check_cable_length()
5129 hw->ffe_config_state = e1000_ffe_config_active; in e1000_1000Mb_check_cable_length()
5153 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5163 u16 phy_data, phy_saved_data, speed, duplex, i; in e1000_config_dsp_after_link_change() local
5165 if (hw->phy_type != e1000_phy_igp) in e1000_config_dsp_after_link_change()
5169 ret_val = e1000_get_speed_and_duplex(hw, &speed, &duplex); in e1000_config_dsp_after_link_change()
5171 e_dbg("Error getting link speed and duplex\n"); in e1000_config_dsp_after_link_change()
5181 if (hw->dsp_config_state == e1000_dsp_config_activated) { in e1000_config_dsp_after_link_change()
5234 hw->dsp_config_state = e1000_dsp_config_enabled; in e1000_config_dsp_after_link_change()
5237 if (hw->ffe_config_state == e1000_ffe_config_active) { in e1000_config_dsp_after_link_change()
5279 hw->ffe_config_state = e1000_ffe_config_enabled; in e1000_config_dsp_after_link_change()
5286 * e1000_set_phy_mode - Set PHY to class A mode
5291 * 2. Restart auto-negotiation or force link.
5298 if ((hw->mac_type == e1000_82545_rev_3) && in e1000_set_phy_mode()
5299 (hw->media_type == e1000_media_type_copper)) { in e1000_set_phy_mode()
5319 hw->phy_reset_disable = false; in e1000_set_phy_mode()
5327 * e1000_set_d3_lplu_state - set d3 link power state
5336 * returns: - E1000_ERR_PHY if fail to read/write the PHY
5344 if (hw->phy_type != e1000_phy_igp) in e1000_set_d3_lplu_state()
5351 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5352 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5360 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5361 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5375 if (hw->smart_speed == e1000_smart_speed_on) { in e1000_set_d3_lplu_state()
5388 } else if (hw->smart_speed == e1000_smart_speed_off) { in e1000_set_d3_lplu_state()
5402 } else if ((hw->autoneg_advertised == AUTONEG_ADVERTISE_SPEED_DEFAULT) || in e1000_set_d3_lplu_state()
5403 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_ALL) || in e1000_set_d3_lplu_state()
5404 (hw->autoneg_advertised == AUTONEG_ADVERTISE_10_100_ALL)) { in e1000_set_d3_lplu_state()
5405 if (hw->mac_type == e1000_82541_rev_2 || in e1000_set_d3_lplu_state()
5406 hw->mac_type == e1000_82547_rev_2) { in e1000_set_d3_lplu_state()
5444 switch (hw->mac_type) { in e1000_set_vco_speed()
5496 * e1000_enable_mng_pass_thru - check for bmc pass through
5500 * returns: - true/false
5506 if (hw->asf_firmware_present) { in e1000_enable_mng_pass_thru()
5539 /* This loop will early-out if the NO link condition has been met. */ in e1000_polarity_reversal_workaround()
5540 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5561 /* Now we will re-enable th transmitter on the PHY */ in e1000_polarity_reversal_workaround()
5583 /* This loop will early-out if the link condition has been met. */ in e1000_polarity_reversal_workaround()
5584 for (i = PHY_FORCE_TIME; i > 0; i--) { in e1000_polarity_reversal_workaround()
5609 * returns: - E1000_ERR_RESET if fail to reset MAC
5623 * returns: - E1000_ERR_RESET if fail to reset MAC