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/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Dvsc8211.c2 * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
53 VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
60 VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
133 unsigned int bmcr, status, lpa, adv; in vsc8211_get_link_status() local
134 int err, sp = -1, dplx = -1, pause = 0; in vsc8211_get_link_status()
144 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it in vsc8211_get_link_status()
179 &lpa); in vsc8211_get_link_status()
186 if (lpa & adv & ADVERTISE_PAUSE_CAP) in vsc8211_get_link_status()
[all …]
/linux-6.12.1/drivers/net/phy/
Dlxt.c1 // SPDX-License-Identifier: GPL-2.0+
34 #define MII_LXT970_IER 17 /* Interrupt Enable Register */
44 /* ------------------------------------------------------------------------- */
48 #define MII_LXT971_IER 18 /* Interrupt Enable Register */
83 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt970_config_intr()
147 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in lxt971_config_intr()
206 } while (status >= 0 && retry-- && status == control); in lxt973a2_update_link()
212 phydev->link = 0; in lxt973a2_update_link()
214 phydev->link = 1; in lxt973a2_update_link()
223 int lpa; in lxt973a2_read_status() local
[all …]
Dmeson-gxl.c1 // SPDX-License-Identifier: GPL-2.0+
45 /* Enable Analog and DSP register Bank access by in meson_gxl_open_banks()
117 /* Enable fractional PLL */ in meson_gxl_config_init()
138 * - Early failures: MII_LPA is just 0x0001. if MII_EXPANSION reports that
141 * - Late failures: MII_LPA is filled with a value which seems to make sense
143 * can detect this using a magic bit in the WOL bank (reg 12 - bit 12).
153 int ret, wol, lpa, exp; in meson_gxl_read_status() local
155 if (phydev->autoneg == AUTONEG_ENABLE) { in meson_gxl_read_status()
167 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status()
168 if (lpa < 0) in meson_gxl_read_status()
[all …]
Dmotorcomm.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: Frank <Frank.Sae@motor-comm.com>
22 * ------------------------------------------------------------
26 * ------------------------------------------------------------
28 * ------------------------------------------------------------
39 * 2b11 Enable automatic crossover for all modes *default*
67 /* Interrupt enable Register */
104 /* FIBER Auto-Negotiation link partner ability */
125 /* TX Gig-E Delay is bits 7:4, default 0x5
126 * TX Fast-E Delay is bits 15:12, default 0xf
[all …]
Dphy-c45.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "mdio-open-alliance.h"
14 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities
21 if (phydev->pma_extable == -ENODATA) { in genphy_c45_baset1_able()
26 phydev->pma_extable = val; in genphy_c45_baset1_able()
29 return !!(phydev->pma_extable & MDIO_PMA_EXTABLE_BT1); in genphy_c45_baset1_able()
33 * genphy_c45_pma_can_sleep - checks if the PMA have sleep support
48 * genphy_c45_pma_resume - wakes up the PMA module
54 return -EOPNOTSUPP; in genphy_c45_pma_resume()
62 * genphy_c45_pma_suspend - suspends the PMA module
[all …]
Dmarvell.c1 // SPDX-License-Identifier: GPL-2.0+
142 /* Copper Specific Interrupt Enable Register */
144 /* WOL Event Interrupt Enable */
188 /* RGMII to 1000BASE-X */
190 /* RGMII to 100BASE-FX */
390 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in marvell_config_intr()
454 err = marvell_set_polarity(phydev, phydev->mdix_ctrl); in marvell_config_aneg()
469 if (phydev->autoneg != AUTONEG_ENABLE || changed) { in marvell_config_aneg()
519 * marvell,reg-init property stored in the of_node for the phydev.
521 * marvell,reg-init = <reg-page reg mask value>,...;
[all …]
Dphy_device.c1 // SPDX-License-Identifier: GPL-2.0+
33 #include <linux/pse-pd/pse.h>
252 put_device(&phydev->mdio.dev); in phy_device_free()
266 fwnode_handle_put(dev->fwnode); in phy_device_release()
294 struct device_driver *drv = phydev->mdio.dev.driver; in mdio_bus_phy_may_suspend()
296 struct net_device *netdev = phydev->attached_dev; in mdio_bus_phy_may_suspend()
298 if (!drv || !phydrv->suspend) in mdio_bus_phy_may_suspend()
308 * suspended as part of a prior call to phy_disconnect() -> in mdio_bus_phy_may_suspend()
309 * phy_detach() -> phy_suspend() because the parent netdev might be the in mdio_bus_phy_may_suspend()
315 if (netdev->ethtool->wol_enabled) in mdio_bus_phy_may_suspend()
[all …]
Dphylink.c1 // SPDX-License-Identifier: GPL-2.0
4 * technologies such as SFP cages where the PHY is hot-pluggable.
44 * struct phylink - internal data type for phylink
60 u8 link_port; /* The current non-phy ethtool port */
93 if ((pl)->config->type == PHYLINK_NETDEV) \
94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
95 else if ((pl)->config->type == PHYLINK_DEV) \
96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
108 if ((pl)->config->type == PHYLINK_NETDEV) \
109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dfsl,rpmsg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
18 Cortex-A and Cortex-M.
21 - $ref: sound-card-common.yaml#
26 - fsl,imx7ulp-rpmsg-audio
27 - fsl,imx8mn-rpmsg-audio
28 - fsl,imx8mm-rpmsg-audio
29 - fsl,imx8mp-rpmsg-audio
[all …]
/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dpcs-6352.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 mutex_lock(&mpcs->mdio.bus->mdio_lock); in marvell_c22_pcs_set_fiber_page()
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE); in marvell_c22_pcs_set_fiber_page()
47 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
49 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_set_fiber_page()
58 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_set_fiber_page()
60 mpcs->name, ERR_PTR(err)); in marvell_c22_pcs_set_fiber_page()
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE, in marvell_c22_pcs_restore_page()
76 dev_err(mpcs->mdio.dev.parent, in marvell_c22_pcs_restore_page()
[all …]
Dpcs-639x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
35 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum); in mv88e639x_read()
46 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val); in mv88e639x_write()
52 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask, in mv88e639x_modify()
59 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, in mv88e639x_modify_changed()
73 mpcs->mdio.dev.parent = dev; in mv88e639x_pcs_alloc()
74 mpcs->mdio.bus = bus; in mv88e639x_pcs_alloc()
75 mpcs->mdio.addr = addr; in mv88e639x_pcs_alloc()
77 snprintf(mpcs->name, sizeof(mpcs->name), in mv88e639x_pcs_alloc()
78 "mv88e6xxx-%s-serdes-%d", dev_name(dev), port); in mv88e639x_pcs_alloc()
[all …]
/linux-6.12.1/sound/soc/fsl/
Dimx-rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2017-2020 NXP
14 #include <sound/soc-dapm.h>
15 #include "imx-pcm-rpmsg.h"
21 bool lpa; member
36 struct snd_soc_pcm_runtime *rtd = list_first_entry(&card->rtd_list, in imx_rpmsg_late_probe()
39 struct device *dev = card->dev; in imx_rpmsg_late_probe()
42 if (data->lpa) { in imx_rpmsg_late_probe()
48 codec_np = data->dai.codecs->of_node; in imx_rpmsg_late_probe()
55 codec_dev = &codec_i2c->dev; in imx_rpmsg_late_probe()
[all …]
Dfsl_rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018-2021 NXP
5 #include <linux/clk-provider.h>
18 #include "imx-pcm.h"
44 struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL; in fsl_rpmsg_hw_params()
49 while (p && rpmsg->pll8k && rpmsg->pll11k) { in fsl_rpmsg_hw_params()
52 if (clk_is_match(pp, rpmsg->pll8k) || in fsl_rpmsg_hw_params()
53 clk_is_match(pp, rpmsg->pll11k)) { in fsl_rpmsg_hw_params()
62 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); in fsl_rpmsg_hw_params()
66 dev_warn(dai->dev, "failed to set parent %s: %d\n", in fsl_rpmsg_hw_params()
[all …]
/linux-6.12.1/drivers/net/pcs/
Dpcs-xpcs.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pcs/pcs-xpcs.h>
17 #include "pcs-xpcs.h"
169 const struct dw_xpcs_compat *compat = &desc->compat[i]; in xpcs_find_compat()
171 for (j = 0; j < compat->num_interfaces; j++) in xpcs_find_compat()
172 if (compat->interface[j] == interface) in xpcs_find_compat()
183 compat = xpcs_find_compat(xpcs->desc, interface); in xpcs_get_an_mode()
185 return -ENODEV; in xpcs_get_an_mode()
187 return compat->an_mode; in xpcs_get_an_mode()
196 for (i = 0; compat->supported[i] != __ETHTOOL_LINK_MODE_MASK_NBITS; i++) in __xpcs_linkmode_supported()
[all …]
/linux-6.12.1/arch/parisc/include/asm/
Dspecial_insns.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #define lpa(va) ({ \ macro
35 #define CR_EIEM 15 /* External Interrupt Enable Mask */
/linux-6.12.1/drivers/net/ethernet/dec/tulip/
Dmedia.c5 Written/copyright 1994-2001 by Donald Becker.
21 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
25 /* Read and write the MII registers using software-generated serial
41 Read and write the MII registers using software-generated serial
43 See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
53 void __iomem *ioaddr = tp->base_addr; in tulip_mdio_read()
60 if (tp->chip_id == COMET && phy_id == 30) { in tulip_mdio_read()
66 spin_lock_irqsave(&tp->mii_lock, flags); in tulip_mdio_read()
67 if (tp->chip_id == LC82C168) { in tulip_mdio_read()
71 for (i = 1000; i >= 0; --i) { in tulip_mdio_read()
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/falcon/
Dtenxpress.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2007-2011 Solarflare Communications Inc.
150 /* Enable 312.5 MHz clock */ in tenxpress_init()
170 return -ENOMEM; in tenxpress_phy_probe()
171 efx->phy_data = phy_data; in tenxpress_phy_probe()
172 phy_data->phy_mode = efx->phy_mode; in tenxpress_phy_probe()
174 efx->mdio.mmds = TENXPRESS_REQUIRED_DEVS; in tenxpress_phy_probe()
175 efx->mdio.mode_support = MDIO_SUPPORTS_C45; in tenxpress_phy_probe()
177 efx->loopback_modes = SFX7101_LOOPBACKS | FALCON_XMAC_LOOPBACKS; in tenxpress_phy_probe()
179 efx->link_advertising = (ADVERTISED_TP | ADVERTISED_Autoneg | in tenxpress_phy_probe()
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Dstmmac_pcs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
25 #define GMAC_AN_CTRL_RAN BIT(9) /* Restart Auto-Negotiation */
26 #define GMAC_AN_CTRL_ANE BIT(12) /* Auto-Negotiation Enable */
27 #define GMAC_AN_CTRL_ELE BIT(14) /* External Loopback Enable */
28 #define GMAC_AN_CTRL_ECD BIT(16) /* Enable Comma Detect */
34 #define GMAC_AN_STATUS_ANA BIT(3) /* Auto-Negotiation Ability */
35 #define GMAC_AN_STATUS_ANC BIT(5) /* Auto-Negotiation Complete */
38 /* ADV and LPA defines */
48 * dwmac_pcs_isr - TBI, RTBI, or SGMII PHY ISR
53 * Description: it is the ISR for PCS events: Auto-Negotiation Completed and
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
23 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
31 rc = -EIO; in efx_mcdi_get_phy_cfg()
35 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
36 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
37 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
39 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
40 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
41 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
42 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
[all …]
/linux-6.12.1/drivers/net/
Dsungem_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
10 * - Add support for PHYs that provide an IRQ line
11 * - Eventually moved the entire polling state machine in
14 * - On LXT971 & BCM5201, Apple uses some chip specific regs
17 * - Apple has some additional power management code for some
49 return phy->mdio_read(phy->dev, id, reg); in __sungem_phy_read()
54 phy->mdio_write(phy->dev, id, reg, val); in __sungem_phy_write()
59 return phy->mdio_read(phy->dev, phy->mii_id, reg); in sungem_phy_read()
64 phy->mdio_write(phy->dev, phy->mii_id, reg, val); in sungem_phy_write()
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/
Dmcdi_port_common.c1 // SPDX-License-Identifier: GPL-2.0-only
22 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name)); in efx_mcdi_get_phy_cfg()
30 rc = -EIO; in efx_mcdi_get_phy_cfg()
34 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS); in efx_mcdi_get_phy_cfg()
35 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE); in efx_mcdi_get_phy_cfg()
36 cfg->supported_cap = in efx_mcdi_get_phy_cfg()
38 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL); in efx_mcdi_get_phy_cfg()
39 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT); in efx_mcdi_get_phy_cfg()
40 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK); in efx_mcdi_get_phy_cfg()
41 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME), in efx_mcdi_get_phy_cfg()
[all …]
/linux-6.12.1/drivers/net/usb/
Drtl8150.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #define DRIVER_DESC "rtl8150 based usb-ethernet driver"
155 return usb_control_msg_recv(dev->udev, 0, RTL8150_REQ_GET_REGS, in get_registers()
162 return usb_control_msg_send(dev->udev, 0, RTL8150_REQ_SET_REGS, in set_registers()
169 struct async_req *req = (struct async_req *)urb->context; in async_set_reg_cb()
170 int status = urb->status; in async_set_reg_cb()
173 dev_dbg(&urb->dev->dev, "%s failed with %d", __func__, status); in async_set_reg_cb()
180 int res = -ENOMEM; in async_set_registers()
192 req->rx_creg = cpu_to_le16(reg); in async_set_registers()
193 req->dr.bRequestType = RTL8150_REQT_WRITE; in async_set_registers()
[all …]
/linux-6.12.1/drivers/net/ethernet/broadcom/
Dbcm63xx_enet.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/dma-mapping.h>
38 return bcm_readl(priv->base + off); in enet_readl()
44 bcm_writel(val, priv->base + off); in enet_writel()
52 return bcm_readl(priv->base + off); in enetsw_readl()
58 bcm_writel(val, priv->base + off); in enetsw_writel()
63 return bcm_readw(priv->base + off); in enetsw_readw()
69 bcm_writew(val, priv->base + off); in enetsw_writew()
74 return bcm_readb(priv->base + off); in enetsw_readb()
80 bcm_writeb(val, priv->base + off); in enetsw_writeb()
[all …]
/linux-6.12.1/drivers/net/ethernet/marvell/
Dskge.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * of the original driver such as link fail-over and link management because
28 #include <linux/dma-mapping.h>
60 MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
68 static int debug = -1; /* defaults above */
76 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4300) }, /* SK-9xx */
78 { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x4320) }, /* SK-98xx V2.0 */
79 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b01) }, /* D-Link DGE-530T (rev.B) */
80 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4c00) }, /* D-Link DGE-530T */
81 { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4302) }, /* D-Link DGE-530T Rev C1 */
[all …]
/linux-6.12.1/drivers/soc/samsung/
Dexynos5250-pmu.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2011-2015 Samsung Electronics Co., Ltd.
6 // Exynos5250 - CPU PMU (Power Management Unit) support
8 #include <linux/soc/samsung/exynos-regs-pmu.h>
9 #include <linux/soc/samsung/exynos-pmu.h>
11 #include "exynos-pmu.h"
14 /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
160 * Enable both SC_FEEDBACK and SC_COUNTER in exynos5_powerdown_conf()
170 * SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable in exynos5_powerdown_conf()

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