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/linux-6.12.1/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
36 led-hps0 {
[all …]
Dsocfpga_cyclone5_sockit.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
36 linux,default-trigger = "heartbeat";
42 linux,default-trigger = "heartbeat";
48 linux,default-trigger = "heartbeat";
54 linux,default-trigger = "heartbeat";
58 gpio-keys {
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Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
3 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
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/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
[all …]
Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
[all …]
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
5 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6qdl-dhcom-pdk2.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
4 * Copyright (C) 2018 Marek Vasut <marex@denx.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
14 stdout-path = "serial0:115200n8";
17 clk_ext_audio_codec: clock-codec {
18 #clock-cells = <0>;
[all …]
Dimx6qdl-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Author: Christian Hemp <c.hemp@phytec.de>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/regulator/dlg,da9063-regulator.h>
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpioleds_som>;
30 som-led-green {
33 linux,default-trigger = "heartbeat";
39 pinctrl-names = "default";
[all …]
Dimx6qdl-aristainetos2.dtsi4 * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
6 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/clock/imx6qdl-clock.h>
48 compatible = "pwm-backlight";
50 brightness-levels = <0 4 8 16 32 64 128 255>;
51 default-brightness-level = <7>;
52 enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
55 reg_2p5v: regulator-2p5v {
56 compatible = "regulator-fixed";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dti,tfp410.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
11 - Jyri Sarha <jsarha@ti.com>
21 powerdown-gpios:
26 Data de-skew value in 350ps increments, from 0 to 7, as configured
27 through the DK[3:1] pins. The de-skew multiplier is computed as
28 (DK[3:1] - 4), so it ranges from -4 to 3.
38 $ref: /schemas/graph.yaml#/$defs/port-base
[all …]
/linux-6.12.1/drivers/staging/sm750fb/
Dddk750_sii164.c1 // SPDX-License-Identifier: GPL-2.0
79 * edge_select - Edge Select:
84 * bus_select - Input Bus Select:
85 * 0 = Input data bus is 12-bits wide
86 * 1 = Input data bus is 24-bits wide
87 * dual_edge_clk_select - Dual Edge Clock Select
90 * hsync_enable - Horizontal Sync Enable:
93 * vsync_enable - Vertical Sync Enable:
96 * deskew_enable - De-skewing Enable:
97 * 0 = De-skew disabled
[all …]
/linux-6.12.1/sound/core/seq/
Dseq_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
24 tmr->tempo_base == 1000 ? 1000000 : 10000; in snd_seq_timer_set_tick_resolution()
26 if (tmr->tempo < threshold) in snd_seq_timer_set_tick_resolution()
27 tmr->tick.resolution = (tmr->tempo * tmr->tempo_base) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
31 s = tmr->tempo % tmr->ppq; in snd_seq_timer_set_tick_resolution()
32 s = (s * tmr->tempo_base) / tmr->ppq; in snd_seq_timer_set_tick_resolution()
33 tmr->tick.resolution = (tmr->tempo / tmr->ppq) * tmr->tempo_base; in snd_seq_timer_set_tick_resolution()
34 tmr->tick.resolution += s; in snd_seq_timer_set_tick_resolution()
36 if (tmr->tick.resolution <= 0) in snd_seq_timer_set_tick_resolution()
[all …]
Dseq_timer.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
37 unsigned int skew; member
57 if (tick->resolution > 0) { in snd_seq_timer_update_tick()
58 tick->fraction += resolution; in snd_seq_timer_update_tick()
59 tick->cur_tick += (unsigned int)(tick->fraction / tick->resolution); in snd_seq_timer_update_tick()
60 tick->fraction %= tick->resolution; in snd_seq_timer_update_tick()
76 if (a->tv_sec > b->tv_sec) in snd_seq_compare_real_time()
78 if ((a->tv_sec == b->tv_sec) && (a->tv_nsec >= b->tv_nsec)) in snd_seq_compare_real_time()
86 while (tm->tv_nsec >= 1000000000) { in snd_seq_sanity_real_time()
[all …]
Dseq_queue.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
7 * Nov. 13, 1999 Takashi Iwai <iwai@ww.uni-erlangen.de>
8 * - Queues are allocated dynamically via ioctl.
9 * - When owner client is deleted, all owned queues are deleted, too.
10 * - Owner of unlocked queue is kept unmodified even if it is
12 * - Owner field in SET_QUEUE_OWNER ioctl must be identical with the
17 * - Queues are managed in static array again, but with better way.
19 * - The queue is locked when struct snd_seq_queue pointer is returned via
22 * - Addition of experimental sync support.
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
[all …]
/linux-6.12.1/include/drm/i2c/
Dsil164.h36 * See "http://www.siliconimage.com/docs/SiI-DS-0021-E-164.pdf".
60 int input_skew; /** < Allowed range [-4, 3], use 0 for no de-skew. */
61 int duallink_skew; /** < Allowed range [-4, 3]. */
/linux-6.12.1/include/uapi/sound/
Dasequencer.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
4 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
5 * (c) 1998-1999 by Jaroslav Kysela <perex@perex.cz>
39 #define SNDRV_SEQ_EVENT_PITCHBEND 13 /**< from -8192 to 8191 */
64 #define SNDRV_SEQ_EVENT_QUEUE_SKEW 38 /* skew queue tempo */
70 #define SNDRV_SEQ_EVENT_RESET 41 /* reset to power-on state */
95 /* 70-89: synthesizer events - obsoleted */
97 /** user-defined events with fixed length
111 /* 100-118: instrument layer - obsoleted */
112 /* 119-129: reserved */
[all …]
/linux-6.12.1/drivers/video/fbdev/
Dbt431.h4 * Copyright 2003 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
5 * Copyright 2016 Maciej W. Rozycki <macro@linux-mips.org>
16 * Bt431 cursor generator registers, 32-bit aligned.
17 * Two twin Bt431 are used on the DECstation's PMAG-AA.
82 volatile u16 *lo = &(regs->addr_lo); in bt431_select_reg()
83 volatile u16 *hi = &(regs->addr_hi); in bt431_select_reg()
98 volatile u16 *r = &(regs->addr_reg); in bt431_read_reg_inc()
110 volatile u16 *r = &(regs->addr_reg); in bt431_write_reg_inc()
135 volatile u16 *r = &(regs->addr_cmap); in bt431_read_cmap_inc()
147 volatile u16 *r = &(regs->addr_cmap); in bt431_write_cmap_inc()
[all …]
/linux-6.12.1/drivers/net/phy/
Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
126 * The value is calculated as following: (1/1000000)/((2^-32)/4)
132 * The value is calculated as following: (1/1000000)/((2^-32)/8)
525 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
529 if (type && type->interrupt_level_mask) in kszphy_config_intr()
530 mask = type->interrupt_level_mask; in kszphy_config_intr()
542 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { in kszphy_config_intr()
605 return -EINVAL; in kszphy_setup_led()
625 * unique (non-broadcast) address on a shared bus.
[all …]
/linux-6.12.1/crypto/
Djitterentropy.c2 * Non-physical true random number generator based on timing jitter --
5 * Copyright Stephan Mueller <smueller@chronox.de>, 2015 - 2023
10 * See https://www.chronox.de/jent.html
32 * the restrictions contained in a BSD-style copyright.)
50 * version 3.4.0 provided at https://www.chronox.de/jent.html
54 … be compiled with optimizations. See documentation. Use the compiler switch -O0 for compiling jitt…
65 /* SHA3-256 is used as conditioner */
99 #define JENT_APT_WORD_MASK (JENT_APT_LSB - 1)
113 /* -- error codes for init function -- */
138 * output entropy (that is what SP 800-90B Section 3.1.5.1.2 attempts to bound).
[all …]
/linux-6.12.1/fs/ufs/
Dufs_fs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Adrian Rodriguez (adrian@franklins-tower.rutgers.edu)
12 * 64-bit clean thanks to Maciej W. Rozycki <macro@ds2.pg.gda.pl>
16 * on code by Martin von Loewis <martin@mira.isdn.cs.tu-berlin.de>.
63 * A filesystem is described by its super-block, which in turn
64 * describes the cylinder groups. The super-block is critical
67 * super-block data does not change, so the copies need not be
72 * [fs->fs_sblkno] Super-block
73 * [fs->fs_cblkno] Cylinder group block
74 * [fs->fs_iblkno] Inode blocks
[all …]
/linux-6.12.1/net/dccp/
Doutput.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Arnaldo Carvalho de Melo <acme@conectiva.com.br>
31 WARN_ON(sk->sk_send_head); in dccp_skb_entail()
32 sk->sk_send_head = skb; in dccp_skb_entail()
33 return skb_clone(sk->sk_send_head, gfp_any()); in dccp_skb_entail()
53 dccp_packet_hdr_len(dcb->dccpd_type); in dccp_transmit_skb()
55 u64 ackno = dp->dccps_gsr; in dccp_transmit_skb()
60 dcb->dccpd_seq = ADD48(dp->dccps_gss, 1); in dccp_transmit_skb()
62 switch (dcb->dccpd_type) { in dccp_transmit_skb()
72 /* Use ISS on the first (non-retransmitted) Request. */ in dccp_transmit_skb()
[all …]
/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/
Drt2800mmio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
6 * Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
29 struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; in rt2800mmio_get_dma_done()
33 switch (queue->qid) { in rt2800mmio_get_dma_done()
38 qid = queue->qid; in rt2800mmio_get_dma_done()
46 idx = entry->entry_idx; in rt2800mmio_get_dma_done()
63 return (__le32 *) entry->skb->data; in rt2800mmio_get_txwi()
70 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); in rt2800mmio_write_tx_desc()
71 struct queue_entry_priv_mmio *entry_priv = entry->priv_data; in rt2800mmio_write_tx_desc()
[all …]
/linux-6.12.1/include/linux/mtd/
Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
5 * Thomas Gleixner <tglx@linutronix.de>
75 #define NAND_CMD_NONE -1
84 #define NAND_DATA_IFACE_CHECK_ONLY -1
98 * ecc.correct() returns -EBADMSG.
124 * Chip requires ready check on read (for auto-incremented sequential read).
142 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
174 * In case your controller is implementing ->legacy.cmd_ctrl() and is relying
175 * on the default ->cmdfunc() implementation, you may want to let the core
[all …]

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