1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*	Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
6  *	Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
29 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_get_dma_done()
33 	switch (queue->qid) {  in rt2800mmio_get_dma_done()
38 		qid = queue->qid;  in rt2800mmio_get_dma_done()
46 		idx = entry->entry_idx;  in rt2800mmio_get_dma_done()
63 	return (__le32 *) entry->skb->data;  in rt2800mmio_get_txwi()
70 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);  in rt2800mmio_write_tx_desc()
71 	struct queue_entry_priv_mmio *entry_priv = entry->priv_data;  in rt2800mmio_write_tx_desc()
72 	__le32 *txd = entry_priv->desc;  in rt2800mmio_write_tx_desc()
74 	const unsigned int txwi_size = entry->queue->winfo_size;  in rt2800mmio_write_tx_desc()
88 	rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);  in rt2800mmio_write_tx_desc()
92 	rt2x00_set_field32(&word, TXD_W1_SD_LEN1, entry->skb->len);  in rt2800mmio_write_tx_desc()
94 			   !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));  in rt2800mmio_write_tx_desc()
96 			   test_bit(ENTRY_TXD_BURST, &txdesc->flags));  in rt2800mmio_write_tx_desc()
104 			   skbdesc->skb_dma + txwi_size);  in rt2800mmio_write_tx_desc()
109 			   !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));  in rt2800mmio_write_tx_desc()
116 	skbdesc->desc = txd;  in rt2800mmio_write_tx_desc()
117 	skbdesc->desc_len = TXD_DESC_SIZE;  in rt2800mmio_write_tx_desc()
127 	struct queue_entry_priv_mmio *entry_priv = entry->priv_data;  in rt2800mmio_fill_rxdone()
128 	__le32 *rxd = entry_priv->desc;  in rt2800mmio_fill_rxdone()
134 		rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;  in rt2800mmio_fill_rxdone()
141 	rxdesc->cipher_status = rt2x00_get_field32(word, RXD_W3_CIPHER_ERROR);  in rt2800mmio_fill_rxdone()
150 		rxdesc->flags |= RX_FLAG_IV_STRIPPED;  in rt2800mmio_fill_rxdone()
156 		rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;  in rt2800mmio_fill_rxdone()
158 		if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS) {  in rt2800mmio_fill_rxdone()
159 			rxdesc->flags |= RX_FLAG_DECRYPTED;  in rt2800mmio_fill_rxdone()
160 		} else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC) {  in rt2800mmio_fill_rxdone()
167 			rxdesc->flags |= RX_FLAG_DECRYPTED;  in rt2800mmio_fill_rxdone()
169 			rxdesc->flags |= RX_FLAG_MMIC_ERROR;  in rt2800mmio_fill_rxdone()
174 		rxdesc->dev_flags |= RXDONE_MY_BSS;  in rt2800mmio_fill_rxdone()
177 		rxdesc->dev_flags |= RXDONE_L2PAD;  in rt2800mmio_fill_rxdone()
206 	spin_lock_irq(&rt2x00dev->irqmask_lock);  in rt2800mmio_enable_interrupt()
210 	spin_unlock_irq(&rt2x00dev->irqmask_lock);  in rt2800mmio_enable_interrupt()
218 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_pretbtt_tasklet()
226 	struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;  in rt2800mmio_tbtt_tasklet()
231 	if (rt2x00dev->intf_ap_count) {  in rt2800mmio_tbtt_tasklet()
234 		 * causing beacon skew and as a result causing problems with  in rt2800mmio_tbtt_tasklet()
238 		if (drv_data->tbtt_tick == (BCN_TBTT_OFFSET - 2)) {  in rt2800mmio_tbtt_tasklet()
241 					   (rt2x00dev->beacon_int * 16) - 1);  in rt2800mmio_tbtt_tasklet()
243 		} else if (drv_data->tbtt_tick == (BCN_TBTT_OFFSET - 1)) {  in rt2800mmio_tbtt_tasklet()
246 					   (rt2x00dev->beacon_int * 16));  in rt2800mmio_tbtt_tasklet()
249 		drv_data->tbtt_tick++;  in rt2800mmio_tbtt_tasklet()
250 		drv_data->tbtt_tick %= BCN_TBTT_OFFSET;  in rt2800mmio_tbtt_tasklet()
253 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_tbtt_tasklet()
263 		tasklet_schedule(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_rxdone_tasklet()
264 	else if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_rxdone_tasklet()
274 	if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_autowake_tasklet()
300 	spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_fetch_txstatus()
302 	while (!kfifo_is_full(&rt2x00dev->txstatus_fifo)) {  in rt2800mmio_fetch_txstatus()
307 		kfifo_put(&rt2x00dev->txstatus_fifo, status);  in rt2800mmio_fetch_txstatus()
310 	spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_fetch_txstatus()
320 	if (!kfifo_is_empty(&rt2x00dev->txstatus_fifo))  in rt2800mmio_txstatus_tasklet()
321 		tasklet_schedule(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_txstatus_tasklet()
338 	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_interrupt()
351 		if (!kfifo_is_empty(&rt2x00dev->txstatus_fifo))  in rt2800mmio_interrupt()
352 			tasklet_schedule(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_interrupt()
356 		tasklet_hi_schedule(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_interrupt()
359 		tasklet_hi_schedule(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_interrupt()
362 		tasklet_schedule(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_interrupt()
365 		tasklet_schedule(&rt2x00dev->autowake_tasklet);  in rt2800mmio_interrupt()
371 	spin_lock(&rt2x00dev->irqmask_lock);  in rt2800mmio_interrupt()
375 	spin_unlock(&rt2x00dev->irqmask_lock);  in rt2800mmio_interrupt()
396 	spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_toggle_irq()
406 	spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);  in rt2800mmio_toggle_irq()
412 		tasklet_kill(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_toggle_irq()
413 		tasklet_kill(&rt2x00dev->rxdone_tasklet);  in rt2800mmio_toggle_irq()
414 		tasklet_kill(&rt2x00dev->autowake_tasklet);  in rt2800mmio_toggle_irq()
415 		tasklet_kill(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_toggle_irq()
416 		tasklet_kill(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_toggle_irq()
426 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_start_queue()
429 	switch (queue->qid) {  in rt2800mmio_start_queue()
457 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_kick_queue()
460 	switch (queue->qid) {  in rt2800mmio_kick_queue()
467 		rt2x00mmio_register_write(rt2x00dev, TX_CTX_IDX(queue->qid),  in rt2800mmio_kick_queue()
468 					  entry->entry_idx);  in rt2800mmio_kick_queue()
469 		hrtimer_start(&rt2x00dev->txstatus_timer,  in rt2800mmio_kick_queue()
475 					  entry->entry_idx);  in rt2800mmio_kick_queue()
485 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_flush_queue()
489 	switch (queue->qid) {  in rt2800mmio_flush_queue()
516 			queue_work(rt2x00dev->workqueue, &rt2x00dev->txdone_work);  in rt2800mmio_flush_queue()
529 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_stop_queue()
532 	switch (queue->qid) {  in rt2800mmio_stop_queue()
554 		tasklet_kill(&rt2x00dev->tbtt_tasklet);  in rt2800mmio_stop_queue()
555 		tasklet_kill(&rt2x00dev->pretbtt_tasklet);  in rt2800mmio_stop_queue()
566 	struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;  in rt2800mmio_queue_init()
571 	switch (queue->qid) {  in rt2800mmio_queue_init()
573 		queue->limit = 128;  in rt2800mmio_queue_init()
574 		queue->data_size = AGGREGATION_SIZE;  in rt2800mmio_queue_init()
575 		queue->desc_size = RXD_DESC_SIZE;  in rt2800mmio_queue_init()
576 		queue->winfo_size = rxwi_size;  in rt2800mmio_queue_init()
577 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt2800mmio_queue_init()
584 		queue->limit = 64;  in rt2800mmio_queue_init()
585 		queue->data_size = AGGREGATION_SIZE;  in rt2800mmio_queue_init()
586 		queue->desc_size = TXD_DESC_SIZE;  in rt2800mmio_queue_init()
587 		queue->winfo_size = txwi_size;  in rt2800mmio_queue_init()
588 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt2800mmio_queue_init()
592 		queue->limit = 8;  in rt2800mmio_queue_init()
593 		queue->data_size = 0; /* No DMA required for beacons */  in rt2800mmio_queue_init()
594 		queue->desc_size = TXD_DESC_SIZE;  in rt2800mmio_queue_init()
595 		queue->winfo_size = txwi_size;  in rt2800mmio_queue_init()
596 		queue->priv_size = sizeof(struct queue_entry_priv_mmio);  in rt2800mmio_queue_init()
612 	struct queue_entry_priv_mmio *entry_priv = entry->priv_data;  in rt2800mmio_get_entry_state()
615 	if (entry->queue->qid == QID_RX) {  in rt2800mmio_get_entry_state()
616 		word = rt2x00_desc_read(entry_priv->desc, 1);  in rt2800mmio_get_entry_state()
620 		word = rt2x00_desc_read(entry_priv->desc, 1);  in rt2800mmio_get_entry_state()
629 	struct queue_entry_priv_mmio *entry_priv = entry->priv_data;  in rt2800mmio_clear_entry()
630 	struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);  in rt2800mmio_clear_entry()
631 	struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;  in rt2800mmio_clear_entry()
634 	if (entry->queue->qid == QID_RX) {  in rt2800mmio_clear_entry()
635 		word = rt2x00_desc_read(entry_priv->desc, 0);  in rt2800mmio_clear_entry()
636 		rt2x00_set_field32(&word, RXD_W0_SDP0, skbdesc->skb_dma);  in rt2800mmio_clear_entry()
637 		rt2x00_desc_write(entry_priv->desc, 0, word);  in rt2800mmio_clear_entry()
639 		word = rt2x00_desc_read(entry_priv->desc, 1);  in rt2800mmio_clear_entry()
641 		rt2x00_desc_write(entry_priv->desc, 1, word);  in rt2800mmio_clear_entry()
648 					  entry->entry_idx);  in rt2800mmio_clear_entry()
650 		word = rt2x00_desc_read(entry_priv->desc, 1);  in rt2800mmio_clear_entry()
652 		rt2x00_desc_write(entry_priv->desc, 1, word);  in rt2800mmio_clear_entry()
655 		if (entry->queue->length == 1)  in rt2800mmio_clear_entry()
656 			hrtimer_cancel(&rt2x00dev->txstatus_timer);  in rt2800mmio_clear_entry()
668 	entry_priv = rt2x00dev->tx[0].entries[0].priv_data;  in rt2800mmio_init_queues()
670 				  entry_priv->desc_dma);  in rt2800mmio_init_queues()
672 				  rt2x00dev->tx[0].limit);  in rt2800mmio_init_queues()
676 	entry_priv = rt2x00dev->tx[1].entries[0].priv_data;  in rt2800mmio_init_queues()
678 				  entry_priv->desc_dma);  in rt2800mmio_init_queues()
680 				  rt2x00dev->tx[1].limit);  in rt2800mmio_init_queues()
684 	entry_priv = rt2x00dev->tx[2].entries[0].priv_data;  in rt2800mmio_init_queues()
686 				  entry_priv->desc_dma);  in rt2800mmio_init_queues()
688 				  rt2x00dev->tx[2].limit);  in rt2800mmio_init_queues()
692 	entry_priv = rt2x00dev->tx[3].entries[0].priv_data;  in rt2800mmio_init_queues()
694 				  entry_priv->desc_dma);  in rt2800mmio_init_queues()
696 				  rt2x00dev->tx[3].limit);  in rt2800mmio_init_queues()
710 	entry_priv = rt2x00dev->rx->entries[0].priv_data;  in rt2800mmio_init_queues()
712 				  entry_priv->desc_dma);  in rt2800mmio_init_queues()
714 				  rt2x00dev->rx[0].limit);  in rt2800mmio_init_queues()
716 				  rt2x00dev->rx[0].limit - 1);  in rt2800mmio_init_queues()
786 		return -EIO;  in rt2800mmio_enable_radio()
797 	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_work_txdone()
800 	while (!kfifo_is_empty(&rt2x00dev->txstatus_fifo) ||  in rt2800mmio_work_txdone()
803 		tasklet_disable(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_work_txdone()
806 		tasklet_enable(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_work_txdone()
810 		hrtimer_start(&rt2x00dev->txstatus_timer,  in rt2800mmio_work_txdone()
819 	if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))  in rt2800mmio_tx_sta_fifo_timeout()
826 	if (!kfifo_is_empty(&rt2x00dev->txstatus_fifo))  in rt2800mmio_tx_sta_fifo_timeout()
827 		tasklet_schedule(&rt2x00dev->txstatus_tasklet);  in rt2800mmio_tx_sta_fifo_timeout()
829 		queue_work(rt2x00dev->workqueue, &rt2x00dev->txdone_work);  in rt2800mmio_tx_sta_fifo_timeout()
845 	rt2x00dev->txstatus_timer.function = rt2800mmio_tx_sta_fifo_timeout;  in rt2800mmio_probe_hw()
850 	INIT_WORK(&rt2x00dev->txdone_work, rt2800mmio_work_txdone);  in rt2800mmio_probe_hw()