| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | pci-msi.txt | 16 MSIs may be distinguished in part through the use of sideband data accompanying
17 writes. In the case of PCI devices, this sideband data may be derived from the
19 controllers it can address, and the sideband data that will be associated with
23 Documentation/devicetree/bindings/interrupt-controller/msi.txt.
30 -------------------
32 - msi-map: Maps a Requester ID to an MSI controller and associated
33 msi-specifier data. The property is an arbitrary number of tuples of
34 (rid-base,msi-controller,msi-base,length), where:
36 * rid-base is a single cell describing the first RID matched by the entry.
38 * msi-controller is a single phandle to an MSI controller
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| /linux-6.12.1/drivers/pinctrl/samsung/ |
| D | pinctrl-exynos-arm64.c | 1 // SPDX-License-Identifier: GPL-2.0+
17 #include <linux/soc/samsung/exynos-regs-pmu.h>
19 #include "pinctrl-samsung.h"
20 #include "pinctrl-exynos.h"
44 * Bank type for non-alive type. Bit fields:
64 /* pin banks of exynos5433 pin-controller - ALIVE */
78 /* pin banks of exynos5433 pin-controller - AUD */
85 /* pin banks of exynos5433 pin-controller - CPIF */
91 /* pin banks of exynos5433 pin-controller - eSE */
97 /* pin banks of exynos5433 pin-controller - FINGER */
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| D | pinctrl-exynos-arm.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/soc/samsung/exynos-regs-pmu.h>
22 #include "pinctrl-samsung.h"
23 #include "pinctrl-exynos.h"
35 /* Retention control for S5PV210 are located at the end of clock controller */
49 unsigned int *pud_val = drvdata->pud_val; in s5pv210_pud_value_init()
58 void __iomem *clk_base = (void __iomem *)drvdata->retention_ctrl->priv; in s5pv210_retention_disable()
69 const struct samsung_retention_data *data) in s5pv210_retention_init() argument
75 ctrl = devm_kzalloc(drvdata->dev, sizeof(*ctrl), GFP_KERNEL); in s5pv210_retention_init()
77 return ERR_PTR(-ENOMEM); in s5pv210_retention_init()
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| /linux-6.12.1/include/linux/ |
| D | mailbox_controller.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * struct mbox_chan_ops - methods to control mailbox channels
16 * @send_data: The API asks the MBOX controller driver, in atomic
18 * data is accepted for transmission, -EBUSY while rejecting
19 * if the remote hasn't yet read the last data sent. Actual
20 * transmission of data is reported by the controller via
24 * the context doesn't allow sleeping. Typically the controller
25 * will implement a busy loop waiting for the data to flush out.
26 * @startup: Called when a client requests the chan. The controller
29 * block. After this call the Controller must forward any
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| D | mhi_ep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/dma-direction.h>
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
19 * @dir: Direction that data may flow on this channel
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info
59 * @cb: Callback to be executed by controller drivers after transfer completion (async)
74 * struct mhi_ep_cntrl - MHI Endpoint controller structure
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| D | mhi.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
10 #include <linux/dma-direction.h>
27 * enum mhi_callback - MHI callback
29 * @MHI_CB_PENDING_DATA: New data available for client to process
51 * enum mhi_flags - Transfer flags
63 * enum mhi_device_type - Device types
64 * @MHI_DEVICE_XFER: Handles data transfer
73 * enum mhi_ch_type - Channel types
89 * struct image_info - Firmware and RDDM table
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| /linux-6.12.1/Documentation/devicetree/bindings/gpio/ |
| D | gpio-ep9301.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: EP93xx GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
12 - Nikita Shubin <nikita.shubin@maquefel.me>
17 - const: cirrus,ep9301-gpio
18 - items:
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| /linux-6.12.1/drivers/input/joystick/ |
| D | xpad.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2002 Marko Friedemann <mfr@bmx-chemnitz.de>
16 * - information from http://euc.jp/periphs/xbox-controller.ja.html
17 * - the iForce driver drivers/char/joystick/iforce.c
18 * - the skeleton-driver drivers/usb/usb-skeleton.c
19 * - Xbox 360 information http://www.free60.org/wiki/Gamepad
20 * - Xbox One information https://github.com/quantus/xbox-one-controller-protocol
23 * - ITO Takayuki for providing essential xpad information on his website
24 * - Vojtech Pavlik - iforce driver / input subsystem
25 * - Greg Kroah-Hartman - usb-skeleton driver
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| /linux-6.12.1/drivers/usb/musb/ |
| D | ux500_dma.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2011 ST-Ericsson SA
18 #include <linux/dma-mapping.h>
22 #include <linux/platform_data/usb-musb-ux500.h>
32 struct ux500_dma_controller *controller; member
43 struct dma_controller controller; member
54 struct ux500_dma_channel *ux500_channel = channel->private_data; in ux500_dma_callback()
55 struct musb_hw_ep *hw_ep = ux500_channel->hw_ep; in ux500_dma_callback()
56 struct musb *musb = hw_ep->musb; in ux500_dma_callback()
59 dev_dbg(musb->controller, "DMA rx transfer done on hw_ep=%d\n", in ux500_dma_callback()
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| /linux-6.12.1/Documentation/driver-api/usb/ |
| D | writing_musb_glue_layer.rst | 12 use Universal Host Controller Interface (UHCI) or Open Host Controller
15 Instead, these embedded UDC rely on the USB On-the-Go (OTG)
18 Dual-Role Controller (MUSB HDRC) found in the Mentor Graphics Inventra™
21 As a self-taught exercise I have written an MUSB glue layer for the
28 .. _musb-basics:
33 To get started on the topic, please read USB On-the-Go Basics (see
42 Linux USB stack is a layered architecture in which the MUSB controller
43 hardware sits at the lowest. The MUSB controller driver abstract the
44 MUSB controller hardware to the Linux USB stack::
46 ------------------------
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| /linux-6.12.1/drivers/usb/gadget/udc/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
18 # USB Peripheral Controller Support
22 # - integrated/SOC controllers first
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| /linux-6.12.1/drivers/dma/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
10 DMA engines can do asynchronous data transfers without
65 Enable support for Altera / Intel mSGDMA controller.
94 Enable support for Audio DMA Controller found on Apple Silicon SoCs.
102 Support the Atmel AHB DMA controller.
109 Support the Atmel XDMA controller.
112 tristate "Analog Devices AXI-DMAC DMA support"
118 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
119 controller is often used in Analog Devices' reference designs for FPGA
149 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
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| D | acpi-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ACPI helpers for DMA request / controller
5 * Based on of-dma.c
13 #include <linux/dma-mapping.h>
29 * acpi_dma_parse_resource_group - match device and parse resource group
32 * @adma: struct acpi_dma of the given DMA controller
50 if (grp->shared_info_length != sizeof(struct acpi_csrt_shared_info)) in acpi_dma_parse_resource_group()
51 return -ENODEV; in acpi_dma_parse_resource_group()
59 if (resource_type(rentry->res) == IORESOURCE_MEM) in acpi_dma_parse_resource_group()
60 mem = rentry->res->start; in acpi_dma_parse_resource_group()
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| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip CSI2 Demux Controller (CSI2DC)
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
15 CSI2DC is a hardware block that receives incoming data from either from an
17 It filters IDI packets based on their data type and virtual channel
20 controller.
22 CSI2DC can act a simple bypass bridge if the incoming data is coming from
[all …]
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| /linux-6.12.1/Documentation/wmi/devices/ |
| D | msi-wmi-platform.rst | 1 .. SPDX-License-Identifier: GPL-2.0-or-later
4 MSI WMI Platform Features driver (msi-wmi-platform)
11 by the embedded controller, with the ACPI firmware exposing a standard ACPI WMI interface on top
12 of the embedded controller interface.
18 data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility:
24 guid("{ABBC0F60-8EA1-11d1-00A0-C90629100000}")]
26 [WmiDataId(1), read, write, Description("16 bytes of data")] uint8 Bytes[16];
31 guid("{ABBC0F63-8EA1-11d1-00A0-C90629100000}")]
33 [WmiDataId(1), read, write, Description("32 bytes of data")] uint8 Bytes[32];
38 guid("{ABBC0F6E-8EA1-11d1-00A0-C90629100000}")]
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| /linux-6.12.1/drivers/mtd/nand/raw/ |
| D | technologic-nand-controller.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Technologic Systems TS72xx NAND controller driver
33 struct nand_controller controller; member
47 switch (chip->ecc.engine_type) { in ts72xx_nand_attach_chip()
49 return -EINVAL; in ts72xx_nand_attach_chip()
51 if (chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN) in ts72xx_nand_attach_chip()
52 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip()
53 chip->ecc.algo = NAND_ECC_ALGO_HAMMING; in ts72xx_nand_attach_chip()
62 struct ts72xx_nand_data *data = chip_to_ts72xx(chip); in ts72xx_nand_ctrl() local
63 unsigned char bits = ioread8(data->ctrl) & ~GENMASK(2, 0); in ts72xx_nand_ctrl()
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| D | cs553x_nand.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * This is a device driver for the NAND flash controller found on
11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
34 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
54 /* Registers within the NAND flash controller BAR -- memory mapped */
56 #define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */
57 #define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */
65 /* Registers within the NAND flash controller BAR -- I/O mapped */
98 to_cs553x(struct nand_controller *controller) in to_cs553x() argument
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| /linux-6.12.1/drivers/isdn/capi/ |
| D | kcapi.c | 40 /* ------------------------------------------------------------- */
45 u32 controller; member
48 /* ------------------------------------------------------------- */
63 /* -------- controller ref counting -------------------------------------- */
68 if (!try_module_get(ctr->owner)) in capi_ctr_get()
76 module_put(ctr->owner); in capi_ctr_put()
79 /* ------------------------------------------------------------- */
83 if (contr < 1 || contr - 1 >= CAPI_MAXCONTR) in get_capi_ctr_by_nr()
86 return capi_controller[contr - 1]; in get_capi_ctr_by_nr()
93 if (applid < 1 || applid - 1 >= CAPI_MAXAPPL) in __get_capi_appl_by_nr()
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| /linux-6.12.1/drivers/spi/ |
| D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // STMicroelectronics STM32 SPI Controller driver
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
197 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode)
198 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
201 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
213 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
222 * @rx: SPI RX data register
223 * @tx: SPI TX data register
243 * struct stm32_spi_cfg - stm32 compatible configuration data
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| /linux-6.12.1/drivers/reset/ |
| D | reset-scmi.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019-2021 ARM Ltd.
11 #include <linux/reset-controller.h>
17 * struct scmi_reset_data - reset controller information structure
18 * @rcdev: reset controller entity
19 * @ph: ARM SCMI protocol handle used for communication with system controller
27 #define to_scmi_handle(p) (to_scmi_reset_data(p)->ph)
30 * scmi_reset_assert() - assert device reset
31 * @rcdev: reset controller entity
44 return reset_ops->assert(ph, id); in scmi_reset_assert()
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| D | reset-ti-sci.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Texas Instrument's System Control Interface (TI-SCI) reset driver
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
14 #include <linux/reset-controller.h>
18 * struct ti_sci_reset_control - reset control structure
19 * @dev_id: SoC-specific device identifier
21 * @lock: synchronize reset_mask read-modify-writes
30 * struct ti_sci_reset_data - reset controller information structure
31 * @rcdev: reset controller entity
32 * @dev: reset controller device pointer
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| /linux-6.12.1/Documentation/spi/ |
| D | spi-summary.rst | 5 02-Feb-2012
8 ------------
15 and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In,
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
18 commonly used. Each clock cycle shifts data out and data in; the clock
19 doesn't cycle except when there is a data bit to shift. Not all data bits
32 - SPI may be used for request/response style device protocols, as with
35 - It may also be used to stream data in either direction (half duplex),
38 - Some devices may use eight bit words. Others may use different word
39 lengths, such as streams of 12-bit or 20-bit digital samples.
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| /linux-6.12.1/include/linux/spi/ |
| D | spi-mem.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
59 * enum spi_mem_data_dir - describes the direction of a SPI memory data
60 * transfer from the controller perspective
61 * @SPI_MEM_NO_DATA: no data transferred
62 * @SPI_MEM_DATA_IN: data coming from the SPI memory
63 * @SPI_MEM_DATA_OUT: data sent to the SPI memory
72 * struct spi_mem_op - describes a SPI memory operation
74 * sent MSB-first.
90 * @data.buswidth: number of IO lanes used to send/receive the data
91 * @data.dtr: whether the data should be sent in DTR mode or not
[all …]
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| /linux-6.12.1/drivers/edac/ |
| D | mpc85xx_edac.c | 2 * Freescale MPC85xx Memory Controller kernel module
8 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
52 struct mpc85xx_pci_pdata *pdata = pci->pvt_info; in mpc85xx_pci_check()
55 err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR); in mpc85xx_pci_check()
59 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect); in mpc85xx_pci_check()
67 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB)); in mpc85xx_pci_check()
69 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR)); in mpc85xx_pci_check()
71 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR)); in mpc85xx_pci_check()
73 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL)); in mpc85xx_pci_check()
75 in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH)); in mpc85xx_pci_check()
[all …]
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| /linux-6.12.1/drivers/pinctrl/ |
| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
14 #include <linux/radix-tree.h>
30 * struct pinctrl_dev - pin control class device
31 * @node: node to include this pin controller in the global pin controller list
32 * @desc: the pin controller descriptor supplied when initializing this pin
33 * controller
34 * @pin_desc_tree: each pin descriptor for this pin controller is stored in
40 * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
[all …]
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