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/linux-6.12.1/drivers/gpu/drm/amd/display/include/
Dsignal_types.h29 /* Minimum pixel clock, in KHz. For TMDS signal is 25.00 MHz */
31 /* Maximum pixel clock, in KHz. For TMDS signal is 165.00 MHz */
35 SIGNAL_TYPE_NONE = 0L, /* no signal */
51 return "No signal"; in signal_type_to_string()
75 /* help functions for signal types manipulation */
76 static inline bool dc_is_hdmi_tmds_signal(enum signal_type signal) in dc_is_hdmi_tmds_signal() argument
78 return (signal == SIGNAL_TYPE_HDMI_TYPE_A); in dc_is_hdmi_tmds_signal()
81 static inline bool dc_is_hdmi_signal(enum signal_type signal) in dc_is_hdmi_signal() argument
83 return (signal == SIGNAL_TYPE_HDMI_TYPE_A); in dc_is_hdmi_signal()
86 static inline bool dc_is_dp_sst_signal(enum signal_type signal) in dc_is_dp_sst_signal() argument
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/linux-6.12.1/drivers/misc/echo/
Decho.h31 adequately cover the duration of that impulse response. The signal transmitted
33 properly adapted, the resulting output is an estimate of the echo signal
34 received from the line. This is subtracted from the received signal. The result
35 is an estimate of the signal which originated at the far end of the line, free
36 from echos of our own transmitted signal.
42 very poorly for things like speech echo cancellation, where the signal level
43 varies widely. This is quite easy to fix. If the signal level is normalised -
44 similar to applying AGC - LMS can work as well for a signal of varying
45 amplitude as it does for a modem signal. This normalised least mean squares
52 to adapt best to the strongest parts of a signal. If the signal is white noise,
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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-timecard24 IRIG adjustments from external IRIG-B signal
25 DCF adjustments from external DCF signal
32 input signal.
35 10Mhz signal is used as the 10Mhz reference clock
36 PPS1 signal is sent to the PPS1 selector
37 PPS2 signal is sent to the PPS2 selector
38 TS1 signal is sent to timestamper 1
39 TS2 signal is sent to timestamper 2
40 TS3 signal is sent to timestamper 3
41 TS4 signal is sent to timestamper 4
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Dsysfs-bus-counter94 The output signal is initially low, and will remain low
95 until the counter reaches zero. The output signal then
100 The output signal is initially high. The output signal
101 will go low by a trigger input signal, and will remain
105 value and setting the output signal low, thus starting
109 The output signal is initially high. When the counter
110 has decremented to 1, the output signal goes low for one
111 clock pulse. The output signal then goes high again, the
116 The output signal is initially high.
120 expires, the output signal changes value and the
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/linux-6.12.1/drivers/gpu/drm/etnaviv/
Detnaviv_perfmon.c20 const struct etnaviv_pm_signal *signal);
31 const struct etnaviv_pm_signal *signal; member
42 const struct etnaviv_pm_signal *signal) in perf_reg_read() argument
44 gpu_write(gpu, domain->profile_config, signal->data); in perf_reg_read()
59 const struct etnaviv_pm_signal *signal) in pipe_perf_reg_read() argument
67 value += perf_reg_read(gpu, domain, signal); in pipe_perf_reg_read()
78 const struct etnaviv_pm_signal *signal) in pipe_reg_read() argument
86 value += gpu_read(gpu, signal->data); in pipe_reg_read()
97 const struct etnaviv_pm_signal *signal) in hi_total_cycle_read() argument
111 const struct etnaviv_pm_signal *signal) in hi_total_idle_cycle_read() argument
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/linux-6.12.1/drivers/pinctrl/aspeed/
Dpinmux-aspeed.h12 * basis where a given pin can provide a number of different signal types.
14 * The signal active on a pin is described by both a priority level and
18 * change from a high to low priority signal), or even in the same register.
28 * corner. The signal priorities are in decending order from P0 (highest).
30 * D6 is a pin with a single function (beside GPIO); a high priority signal
33 * Ball | Default | P0 Signal | P0 Expression | P1 Signal | P1 Expression | Other
38 * C5 is a multi-signal pin (high and low priority signals). Here we touch
39 * different registers for the different functions that enable each signal:
45 * E19 is a single-signal pin with two functions that influence the active
46 * signal. In this case both bits have the same meaning - enable a dedicated
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Dpinctrl-aspeed.c80 pr_debug("Enabling signal %s for %s\n", expr->signal, in aspeed_sig_expr_enable()
98 pr_debug("Disabling signal %s for %s\n", expr->signal, in aspeed_sig_expr_disable()
112 * aspeed_disable_sig() - Disable a signal on a pin by disabling all provided
113 * signal expressions.
116 * @exprs: The list of signal expressions (from a priority level on a pin)
137 * aspeed_find_expr_by_name - Search for the signal expression needed to
138 * enable the pin's signal for the requested function.
140 * @exprs: List of signal expressions (haystack)
143 * Return: A pointer to the signal expression whose function tag matches the
215 return expr->signal; in aspeed_sig_expr_signal()
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/linux-6.12.1/arch/arm/mach-spear/
Dpl080.c30 unsigned int signal = cd->min_signal, val; in pl080_get_signal() local
35 /* Return if signal is already acquired by somebody else */ in pl080_get_signal()
36 if (signals[signal].busy && in pl080_get_signal()
37 (signals[signal].val != cd->muxval)) { in pl080_get_signal()
43 if (!signals[signal].busy) { in pl080_get_signal()
49 * value by 2 * signal number. in pl080_get_signal()
51 val &= ~(0x3 << (signal * 2)); in pl080_get_signal()
52 val |= cd->muxval << (signal * 2); in pl080_get_signal()
56 signals[signal].busy++; in pl080_get_signal()
57 signals[signal].val = cd->muxval; in pl080_get_signal()
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/linux-6.12.1/Documentation/devicetree/bindings/leds/
Dleds-bcm6328.yaml25 should be controlled by a hardware signal instead of the MODE register value,
29 explained later in brcm,link-signal-sources). Even if a LED is hardware
53 description: Makes clock signal active low.
57 description: Makes data signal active low.
85 brcm,link-signal-sources:
90 An array of hardware link signal sources. Up to four link hardware
93 7 may be muxed to LEDs 4 to 7. A signal can be muxed to more than one
94 LED, and one LED can have more than one source signal.
96 brcm,activity-signal-sources:
101 An array of hardware activity signal sources. Up to four activity
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/linux-6.12.1/Documentation/devicetree/bindings/reset/
Dreset.txt1 = Reset Signal Device Tree Bindings =
8 Hardware blocks typically receive a reset signal. This signal is generated by
14 A reset signal is represented by the phandle of the provider, plus a reset
15 specifier - a list of DT cells that represents the reset signal within the
20 A word on where to place reset signal consumers in device tree: It is possible
21 in hardware for a reset signal to affect multiple logically separate HW blocks
22 at once. In this case, it would be unwise to represent this reset signal in
26 children of the bus are affected by the reset signal, or an individual HW
29 rather than to slavishly enumerate the reset signal that affects each HW
49 for each reset signal that affects the device, or that the
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/linux-6.12.1/drivers/tty/
Dtty_jobctrl.c8 #include <linux/signal.h>
9 #include <linux/sched/signal.h>
25 * @sig: signal to send
28 * not in the foreground, send a SIGTTOU. If the signal is blocked or
39 if (current->signal->tty != tty) in __tty_check_change()
81 tty = p->signal->tty; in proc_clear_tty()
82 p->signal->tty = NULL; in proc_clear_tty()
112 if (current->signal->tty) { in __proc_set_tty()
114 current->signal->tty->name); in __proc_set_tty()
115 tty_kref_put(current->signal->tty); in __proc_set_tty()
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/linux-6.12.1/tools/testing/selftests/powerpc/tm/
DMakefile2 SIGNAL_CONTEXT_CHK_TESTS := tm-signal-context-chk-gpr tm-signal-context-chk-fpu \
3 tm-signal-context-chk-vmx tm-signal-context-chk-vsx
5 TEST_GEN_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm-signal-stack \
7 $(SIGNAL_CONTEXT_CHK_TESTS) tm-sigreturn tm-signal-sigreturn-nt \
8 tm-signal-context-force-tm tm-poison tm-signal-pagefault
27 $(OUTPUT)/tm-signal-context-force-tm: CFLAGS += -pthread -m64
28 $(OUTPUT)/tm-signal-pagefault: CFLAGS += -pthread -m64
32 $(SIGNAL_CONTEXT_CHK_TESTS): tm-signal.S
D.gitignore4 tm-signal-msr-resv
5 tm-signal-stack
11 tm-signal-context-chk-fpu
12 tm-signal-context-chk-gpr
13 tm-signal-context-chk-vmx
14 tm-signal-context-chk-vsx
15 tm-signal-context-force-tm
16 tm-signal-sigreturn-nt
17 tm-signal-pagefault
/linux-6.12.1/Documentation/driver-api/
Dgeneric-counter.rst29 * Signal:
33 Association of a Signal, and evaluation trigger, with a Count.
38 SIGNAL section in Theory
40 A Signal represents a stream of data. This is the input data that is
42 signal output line of a rotary encoder. Not all counter devices provide
43 user access to the Signal data, so exposure is optional for drivers.
45 When the Signal data is available for user access, the Generic Counter
46 interface provides the following available signal values:
49 Signal line is in a low state.
52 Signal line is in a high state.
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/linux-6.12.1/include/linux/
Dcounter.h53 * @signal_u8_read: Signal u8 component read callback. The read value of the
54 * respective Signal u8 component should be passed back via
62 * @signal_u32_read: Signal u32 component read callback. The read value of
63 * the respective Signal u32 component should be passed
71 * @signal_u64_read: Signal u64 component read callback. The read value of
72 * the respective Signal u64 component should be passed
74 * @signal_array_u32_read: Signal u32 array component read callback. The
92 * @signal_array_u64_read: Signal u64 array component read callback. The
107 * @signal_u8_write: Signal u8 component write callback. The write value of
108 * the respective Signal u8 component is passed via the val
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/linux-6.12.1/kernel/
Dsignal.c3 * linux/kernel/signal.c
33 #include <linux/signal.h>
53 #include <trace/events/signal.h>
63 * SLAB caches for signal bits.
92 if (unlikely(t->signal->flags & SIGNAL_UNKILLABLE) && in sig_task_ignored()
108 * signal handler may change by the time it is in sig_ignored()
115 * Tracers may want to know about even ignored signal unless it in sig_ignored()
129 static inline bool has_pending_signals(sigset_t *signal, sigset_t *blocked) in has_pending_signals() argument
137 ready |= signal->sig[i] &~ blocked->sig[i]; in has_pending_signals()
140 case 4: ready = signal->sig[3] &~ blocked->sig[3]; in has_pending_signals()
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/linux-6.12.1/Documentation/admin-guide/media/
Dmgb4.rst59 Mapping of the incoming bits in the signal to the colour bits of the pixels.
77 pixel clock is running and the DE signal is moving.
118 If the incoming video signal does not contain synchronization VSYNC and
121 (pixels with deasserted Data Enable signal) are necessary to generate the
125 If the incoming video signal does not contain synchronization VSYNC and
128 (pixels with deasserted Data Enable signal) are necessary to generate the
142 Width of the HSYNC signal in PCLK clock ticks.
148 Width of the VSYNC signal in PCLK clock ticks.
154 Number of PCLK pulses between deassertion of the HSYNC signal and the first
162 line (marked by DE=1) and assertion of the HSYNC signal.
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/linux-6.12.1/tools/testing/selftests/net/mptcp/
Dmptcp_join.sh740 pm_nl_add_endpoint $ns1 $addr flags signal
2062 if reset "unused signal address"; then
2063 pm_nl_add_endpoint $ns1 10.0.2.1 flags signal
2071 if reset "signal address"; then
2074 pm_nl_add_endpoint $ns1 10.0.2.1 flags signal
2081 # note: signal address in server ns and local addresses in client ns must
2084 if reset "subflow and signal"; then
2085 pm_nl_add_endpoint $ns1 10.0.2.1 flags signal
2094 # uncommon: subflow and signal flags on the same endpoint
2097 if reset "subflow and signal together"; then
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Dpm_netlink.sh151 add_endpoint 10.0.1.3 flags signal,backup
157 "3,10.0.1.3,signal backup")" "dump addrs"
163 "3,10.0.1.3,signal backup")" "dump addrs after del"
168 add_endpoint 10.0.1.4 flags signal
169 check "get_endpoint 4" "$(format_endpoints "4,10.0.1.4,signal")" "id addr increment"
172 add_endpoint "10.0.1.${i}" flags signal >/dev/null 2>&1
174 check "get_endpoint 9" "$(format_endpoints "9,10.0.1.9,signal")" "hard addr limit"
184 "3,10.0.1.3,signal backup" \
185 "4,10.0.1.4,signal" \
186 "5,10.0.1.5,signal" \
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/linux-6.12.1/drivers/gpu/drm/amd/display/dc/link/hwss/
Dlink_hwss_dio.c56 if (dc_is_dp_signal(pipe_ctx->stream->signal)) in setup_dio_stream_encoder()
61 pipe_ctx->stream->signal, true); in setup_dio_stream_encoder()
86 pipe_ctx->stream->signal, false); in reset_dio_stream_encoder()
91 if (dc_is_dp_signal(pipe_ctx->stream->signal)) in reset_dio_stream_encoder()
104 if (!dc_is_virtual_signal(stream->signal)) in setup_dio_stream_attribute()
110 if (dc_is_dp_signal(stream->signal)) in setup_dio_stream_attribute()
117 else if (dc_is_hdmi_tmds_signal(stream->signal)) in setup_dio_stream_attribute()
123 else if (dc_is_dvi_signal(stream->signal)) in setup_dio_stream_attribute()
127 (stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) ? in setup_dio_stream_attribute()
129 else if (dc_is_lvds_signal(stream->signal)) in setup_dio_stream_attribute()
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/linux-6.12.1/arch/x86/include/asm/
Dunwind_hints.h23 .macro UNWIND_HINT_REGS base=%rsp offset=0 indirect=0 extra=1 partial=0 signal=1
53 UNWIND_HINT sp_reg=sp_reg sp_offset=sp_offset type=type signal=\signal
56 .macro UNWIND_HINT_IRET_REGS base=%rsp offset=0 signal=1
57 UNWIND_HINT_REGS base=\base offset=\offset partial=1 signal=\signal
60 .macro UNWIND_HINT_IRET_ENTRY base=%rsp offset=0 signal=1
62 UNWIND_HINT_IRET_REGS base=\base offset=\offset signal=\signal
/linux-6.12.1/tools/testing/selftests/arm64/signal/
DREADME1 KSelfTest arm64/signal/
9 signal-test (setup/trigger/run/result/cleanup)
14 - Each signal testcase is compiled into its own executable: a separate
16 by receiving some kind of fatal signal from the Kernel, so it's safer
27 - 'mangle_' tests: a real signal (SIGUSR1) is raised and used as a trigger
28 and then the test case code modifies the signal frame from inside the
29 signal handler itself.
33 real signal return. This kind of tests does not use a trigger usually and
37 some fatal signal: usually SIGSEGV or SIGBUS. Since while writing this
57 - some fatal signal sent by the Kernel to the test process
/linux-6.12.1/Documentation/driver-api/gpio/
Dintro.rst18 digital signal. They are provided from many kinds of chips, and are familiar
71 It is natural to assume that a GPIO is "active" when its output signal is 1
72 ("high"), and inactive when it is 0 ("low"). However in practice the signal of a
77 means "active") so that drivers only need to worry about the logical signal and
82 Sometimes shared signals need to use "open drain" (where only the low signal
83 level is actually driven), or "open source" (where only the high signal level is
85 used for TTL. A pullup or pulldown resistor causes the high or low signal level.
89 One common example of an open drain signal is a shared active-low IRQ line.
97 **LOW**: ``gpiod_direction_output(gpio, 0)`` ... this drives the signal and
101 the pullup (or some other device) controls the signal.
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/linux-6.12.1/security/apparmor/
Dipc.c48 * audit_signal_cb() - call back for signal specific audit fields
65 if (ad->signal == SIGUNKNOWN) in audit_signal_cb()
66 audit_log_format(ab, "signal=unknown(%d)", in audit_signal_cb()
68 else if (ad->signal < MAXMAPPED_SIGNAME) in audit_signal_cb()
69 audit_log_format(ab, " signal=%s", sig_names[ad->signal]); in audit_signal_cb()
71 audit_log_format(ab, " signal=rtmin+%d", in audit_signal_cb()
72 ad->signal - SIGRT_BASE); in audit_signal_cb()
97 ad->signal); in profile_signal_perm()
110 ad.signal = map_signal_num(sig); in aa_may_signal()
/linux-6.12.1/drivers/dma/
Dlpc32xx-dmamux.c23 int signal; member
41 .signal = 3,
48 .signal = 10,
55 .signal = 11,
62 .signal = 14,
69 .signal = 15,
82 dev_dbg(dev, "releasing dma request signal %d routed to %s\n", in lpc32xx_dmamux_release()
83 mux->signal, mux->muxval ? mux->name_sel1 : mux->name_sel1); in lpc32xx_dmamux_release()
106 if (lpc32xx_muxes[i].signal == dma_spec->args[0]) { in lpc32xx_dmamux_reserve()
133 dev_err(dev, "dma request signal %d busy, routed to %s\n", in lpc32xx_dmamux_reserve()
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