| /linux-6.12.1/drivers/usb/renesas_usbhs/ |
| D | pipe.c | 11 #include "pipe.h"
33 char *usbhs_pipe_name(struct usbhs_pipe *pipe) in usbhs_pipe_name() argument
35 return usbhsp_pipe_name[usbhs_pipe_type(pipe)]; in usbhs_pipe_name()
50 static void usbhsp_pipectrl_set(struct usbhs_pipe *pipe, u16 mask, u16 val) in usbhsp_pipectrl_set() argument
52 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_set()
53 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_set()
55 if (usbhs_pipe_is_dcp(pipe)) in usbhsp_pipectrl_set()
61 static u16 usbhsp_pipectrl_get(struct usbhs_pipe *pipe) in usbhsp_pipectrl_get() argument
63 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhsp_pipectrl_get()
64 int offset = usbhsp_addr_offset(pipe); in usbhsp_pipectrl_get()
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| D | fifo.c | 13 #include "pipe.h"
17 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); in usbhsf_null_handle()
45 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, in usbhs_pkt_push() argument
50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); in usbhs_pkt_push()
62 if (!pipe->handler) { in usbhs_pkt_push()
64 pipe->handler = &usbhsf_null_handler; in usbhs_pkt_push()
67 list_move_tail(&pkt->node, &pipe->list); in usbhs_pkt_push()
74 pkt->pipe = pipe; in usbhs_pkt_push()
76 pkt->handler = pipe->handler; in usbhs_pkt_push()
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| /linux-6.12.1/fs/ |
| D | pipe.c | 3 * linux/fs/pipe.c
36 * New pipe buffers will be restricted to this size while the user is exceeding
37 * their pipe buffer quota. The general pipe use case needs at least two
39 * than two, then a write to a non-empty pipe may block even if the pipe is not
42 * pipe before reading tokens: https://lore.kernel.org/lkml/1628086770.5rn8p04n6j.none@localhost/.
44 * Users can reduce their pipe buffers with F_SETPIPE_SZ below this at their
45 * own risk, namely: pipe writes to non-full pipes may block until the pipe is
51 * The max size that a non-root user is allowed to grow the pipe. Can
52 * be set by root in /proc/sys/fs/pipe-max-size
89 void pipe_lock(struct pipe_inode_info *pipe) in pipe_lock() argument
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| D | splice.c | 5 * This is the "extended pipe" functionality, where a pipe is used as
6 * an arbitrary in-memory buffer. Think of a pipe as a small kernel
10 * that transfers data buffers to or from a pipe buffer.
45 * here if set to avoid blocking other users of this pipe if splice is
59 * Attempt to steal a page from a pipe buffer. This should perhaps go into
64 static bool page_cache_pipe_buf_try_steal(struct pipe_inode_info *pipe, in page_cache_pipe_buf_try_steal() argument
108 static void page_cache_pipe_buf_release(struct pipe_inode_info *pipe, in page_cache_pipe_buf_release() argument
119 static int page_cache_pipe_buf_confirm(struct pipe_inode_info *pipe, in page_cache_pipe_buf_confirm() argument
162 static bool user_page_pipe_buf_try_steal(struct pipe_inode_info *pipe, in user_page_pipe_buf_try_steal() argument
169 return generic_pipe_buf_try_steal(pipe, buf); in user_page_pipe_buf_try_steal()
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| /linux-6.12.1/drivers/gpu/drm/ |
| D | drm_simple_kms_helper.c | 89 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_mode_valid() local
91 pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); in drm_simple_kms_crtc_mode_valid()
92 if (!pipe->funcs || !pipe->funcs->mode_valid) in drm_simple_kms_crtc_mode_valid()
96 return pipe->funcs->mode_valid(pipe, mode); in drm_simple_kms_crtc_mode_valid()
120 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_enable() local
122 pipe = container_of(crtc, struct drm_simple_display_pipe, crtc); in drm_simple_kms_crtc_enable()
123 if (!pipe->funcs || !pipe->funcs->enable) in drm_simple_kms_crtc_enable()
126 plane = &pipe->plane; in drm_simple_kms_crtc_enable()
127 pipe->funcs->enable(pipe, crtc->state, plane->state); in drm_simple_kms_crtc_enable()
133 struct drm_simple_display_pipe *pipe; in drm_simple_kms_crtc_disable() local
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| /linux-6.12.1/drivers/gpu/drm/i915/display/ |
| D | intel_color_regs.h | 33 #define PALETTE(dev_priv, pipe, i) _MMIO(DISPLAY_MMIO_BASE(dev_priv) + \ argument
34 _PICK_EVEN_2RANGES(pipe, 2, \
42 #define PIPEGCMAX(dev_priv, pipe, i) _MMIO_PIPE2(dev_priv, pipe, _PIPEAGCMAX + (i) * 4) /* u1.16 */ argument
48 #define LGC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B) + (i) * 4) argument
65 #define PREC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _PREC_PALETTE_A, _PREC_PALETTE_B) + (i) * 4) argument
69 #define PREC_PIPEGCMAX(pipe, i) _MMIO(_PIPE(pipe, _PIPEAGCMAX, _PIPEBGCMAX) + (i) * 4) /* u1… argument
73 #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B) argument
84 /* pipe CSC */
120 #define PIPE_CSC_COEFF_RY_GY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_G… argument
121 #define PIPE_CSC_COEFF_BY(pipe) _MMIO_PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY) argument
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| D | intel_display_trace.h | 32 __field(enum pipe, pipe)
39 __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
40 __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
42 __entry->pipe = crtc->pipe;
45 …TP_printk("dev %s, pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, p…
46 __get_str(dev), pipe_name(__entry->pipe),
60 __field(enum pipe, pipe)
68 __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
69 __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
71 __entry->pipe = crtc->pipe;
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| D | intel_display_irq.c | 28 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe) in intel_handle_vblank() argument
30 struct intel_crtc *crtc = intel_crtc_for_pipe(dev_priv, pipe); in intel_handle_vblank()
103 * bdw_update_pipe_irq - update DE pipe interrupt
105 * @pipe: pipe whose interrupt to update
110 enum pipe pipe, u32 interrupt_mask, in bdw_update_pipe_irq() argument
122 new_val = dev_priv->display.irq.de_irq_mask[pipe]; in bdw_update_pipe_irq()
126 if (new_val != dev_priv->display.irq.de_irq_mask[pipe]) { in bdw_update_pipe_irq()
127 dev_priv->display.irq.de_irq_mask[pipe] = new_val; in bdw_update_pipe_irq()
128 intel_uncore_write(&dev_priv->uncore, GEN8_DE_PIPE_IMR(pipe), in bdw_update_pipe_irq()
129 dev_priv->display.irq.de_irq_mask[pipe]); in bdw_update_pipe_irq()
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| D | intel_pch_display.c | 22 enum pipe pch_transcoder) in intel_has_pch_trancoder()
28 enum pipe intel_crtc_pch_transcoder(struct intel_crtc *crtc) in intel_crtc_pch_transcoder()
35 return crtc->pipe; in intel_crtc_pch_transcoder()
39 enum pipe pipe, enum port port, in assert_pch_dp_disabled() argument
42 enum pipe port_pipe; in assert_pch_dp_disabled()
47 I915_STATE_WARN(dev_priv, state && port_pipe == pipe, in assert_pch_dp_disabled()
49 port_name(port), pipe_name(pipe)); in assert_pch_dp_disabled()
58 enum pipe pipe, enum port port, in assert_pch_hdmi_disabled() argument
61 enum pipe port_pipe; in assert_pch_hdmi_disabled()
66 I915_STATE_WARN(dev_priv, state && port_pipe == pipe, in assert_pch_hdmi_disabled()
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| D | intel_sprite_regs.h | 12 #define DVSCNTR(pipe) _MMIO_PIPE(pipe, _DVSACNTR, _DVSBCNTR) argument
37 #define DVSLINOFF(pipe) _MMIO_PIPE(pipe, _DVSALINOFF, _DVSBLINOFF) argument
41 #define DVSSTRIDE(pipe) _MMIO_PIPE(pipe, _DVSASTRIDE, _DVSBSTRIDE) argument
45 #define DVSPOS(pipe) _MMIO_PIPE(pipe, _DVSAPOS, _DVSBPOS) argument
53 #define DVSSIZE(pipe) _MMIO_PIPE(pipe, _DVSASIZE, _DVSBSIZE) argument
61 #define DVSKEYVAL(pipe) _MMIO_PIPE(pipe, _DVSAKEYVAL, _DVSBKEYVAL) argument
65 #define DVSKEYMSK(pipe) _MMIO_PIPE(pipe, _DVSAKEYMSK, _DVSBKEYMSK) argument
69 #define DVSSURF(pipe) _MMIO_PIPE(pipe, _DVSASURF, _DVSBSURF) argument
74 #define DVSKEYMAX(pipe) _MMIO_PIPE(pipe, _DVSAKEYMAXVAL, _DVSBKEYMAXVAL) argument
78 #define DVSTILEOFF(pipe) _MMIO_PIPE(pipe, _DVSATILEOFF, _DVSBTILEOFF) argument
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| D | intel_fifo_underrun.c | 47 * occurrence until the next modeset on a given pipe.
50 * is no interrupt (despite that the signalling bit is in the PIPESTAT pipe
62 enum pipe pipe; in ivb_can_enable_err_int() local
66 for_each_pipe(dev_priv, pipe) { in ivb_can_enable_err_int()
67 crtc = intel_crtc_for_pipe(dev_priv, pipe); in ivb_can_enable_err_int()
79 enum pipe pipe; in cpt_can_enable_serr_int() local
84 for_each_pipe(dev_priv, pipe) { in cpt_can_enable_serr_int()
85 crtc = intel_crtc_for_pipe(dev_priv, pipe); in cpt_can_enable_serr_int()
97 i915_reg_t reg = PIPESTAT(dev_priv, crtc->pipe); in i9xx_check_fifo_underruns()
105 enable_mask = i915_pipestat_enable_mask(dev_priv, crtc->pipe); in i9xx_check_fifo_underruns()
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| D | intel_pipe_crc_regs.h | 12 #define PIPE_CRC_CTL(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_CTL_A) argument
42 /* with DP port the pipe source is invalid */
51 /* with DP/TV port the pipe source is invalid */
63 #define PIPE_CRC_EXP_GREEN(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_GREEN_A) argument
67 #define PIPE_CRC_EXP_BLUE(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_BLUE_A) argument
71 #define PIPE_CRC_EXP_RES1_I915(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES1_A_I9… argument
75 #define PIPE_CRC_EXP_RES2_G4X(dev_priv, pipe) _MMIO_TRANS2(dev_priv, pipe, _PIPE_CRC_EXP_RES2_A_G4X) argument
79 #define PIPE_CRC_RES_RED(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_RED_A) argument
82 #define PIPE_CRC_RES_GREEN(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_GREEN_A) argument
85 #define PIPE_CRC_RES_BLUE(dev_priv, pipe) _MMIO_TRANS2((dev_priv), (pipe), _PIPE_CRC_RES_BLUE_A) argument
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| /linux-6.12.1/drivers/media/platform/nxp/imx8-isi/ |
| D | imx8-isi-hw.c | 16 static inline u32 mxc_isi_read(struct mxc_isi_pipe *pipe, u32 reg) in mxc_isi_read() argument
18 return readl(pipe->regs + reg); in mxc_isi_read()
21 static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val) in mxc_isi_write() argument
23 writel(val, pipe->regs + reg); in mxc_isi_write()
30 void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr) in mxc_isi_channel_set_inbuf() argument
32 mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, lower_32_bits(dma_addr)); in mxc_isi_channel_set_inbuf()
33 if (pipe->isi->pdata->has_36bit_dma) in mxc_isi_channel_set_inbuf()
34 mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, in mxc_isi_channel_set_inbuf()
38 void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, in mxc_isi_channel_set_outbuf() argument
44 val = mxc_isi_read(pipe, CHNL_OUT_BUF_CTRL); in mxc_isi_channel_set_outbuf()
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| /linux-6.12.1/include/linux/ |
| D | pipe_fs_i.h | 18 * struct pipe_buffer - a linux kernel pipe buffer
19 * @page: the page containing the data for the pipe buffer
23 * @flags: pipe buffer flags. See above.
35 * struct pipe_inode_info - a linux kernel pipe
37 * @rd_wait: reader wait point in case of empty pipe
38 * @wr_wait: writer wait point in case of full pipe
44 * @nr_accounted: The amount this pipe accounts for in user->pipe_bufs
46 * @readers: number of current readers of this pipe
47 * @writers: number of current writers of this pipe
48 * @files: number of struct file referring this pipe (protected by ->i_lock)
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| /linux-6.12.1/sound/drivers/vx/ |
| D | vx_pcm.c | 15 * pipe->transferred is the counter of data which has been already transferred.
25 * the current point of read buffer is kept in pipe->hw_ptr. note that
46 struct vx_pipe *pipe) in vx_pcm_read_per_bytes() argument
48 int offset = pipe->hw_ptr; in vx_pcm_read_per_bytes()
51 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
56 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
61 if (++offset >= pipe->buffer_bytes) { in vx_pcm_read_per_bytes()
64 pipe->hw_ptr = offset; in vx_pcm_read_per_bytes()
82 * @pipe: the pipe to be checked
84 * if the pipe is programmed with the differed time, set the DSP time
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| /linux-6.12.1/drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_pipeline.c | 21 struct komeda_pipeline *pipe; in komeda_pipeline_add() local
29 if (size < sizeof(*pipe)) { in komeda_pipeline_add()
34 pipe = devm_kzalloc(mdev->dev, size, GFP_KERNEL); in komeda_pipeline_add()
35 if (!pipe) in komeda_pipeline_add()
38 pipe->mdev = mdev; in komeda_pipeline_add()
39 pipe->id = mdev->n_pipelines; in komeda_pipeline_add()
40 pipe->funcs = funcs; in komeda_pipeline_add()
42 mdev->pipelines[mdev->n_pipelines] = pipe; in komeda_pipeline_add()
45 return pipe; in komeda_pipeline_add()
49 struct komeda_pipeline *pipe) in komeda_pipeline_destroy() argument
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| /linux-6.12.1/drivers/net/wwan/iosm/ |
| D | iosm_ipc_protocol_ops.c | 51 * updates the pipe structure referenced in the preparation arguments.
59 struct ipc_pipe *pipe = args->pipe_open.pipe; in ipc_protocol_msg_prepipe_open() local
72 skbr = kcalloc(pipe->nr_of_entries, sizeof(*skbr), GFP_ATOMIC); in ipc_protocol_msg_prepipe_open()
76 /* Allocate the transfer descriptors for the pipe. */ in ipc_protocol_msg_prepipe_open()
78 pipe->nr_of_entries * sizeof(*tdr), in ipc_protocol_msg_prepipe_open()
79 &pipe->phy_tdr_start, GFP_ATOMIC); in ipc_protocol_msg_prepipe_open()
86 pipe->max_nr_of_queued_entries = pipe->nr_of_entries - 1; in ipc_protocol_msg_prepipe_open()
87 pipe->nr_of_queued_entries = 0; in ipc_protocol_msg_prepipe_open()
88 pipe->tdr_start = tdr; in ipc_protocol_msg_prepipe_open()
89 pipe->skbr_start = skbr; in ipc_protocol_msg_prepipe_open()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/inc/ |
| D | resource.h | 38 #define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0) argument
39 #define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F) argument
40 #define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd)) argument
158 * pipe types are identified based on MUXes in DCN front end that are capable
161 * pipeline ends with and YYYY is the rendering role that the pipe is in.
163 * For instance OTG_MASTER is a pipe ending with OTG hardware block in its
164 * pipeline and it is in a role of a master pipe for timing generation.
166 * For quick reference a diagram of each pipe type's areas of responsibility
171 * |OTG master 0 (OPP head 0)|OPP head 2 (DPP pipe 2) |
172 * | (DPP pipe 0)| |
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| /linux-6.12.1/drivers/net/wireless/ath/ath12k/ |
| D | ce.c | 222 static int ath12k_ce_rx_buf_enqueue_pipe(struct ath12k_ce_pipe *pipe, in ath12k_ce_rx_buf_enqueue_pipe() argument
225 struct ath12k_base *ab = pipe->ab; in ath12k_ce_rx_buf_enqueue_pipe()
226 struct ath12k_ce_ring *ring = pipe->dest_ring; in ath12k_ce_rx_buf_enqueue_pipe()
260 pipe->rx_buf_needed--; in ath12k_ce_rx_buf_enqueue_pipe()
271 static int ath12k_ce_rx_post_pipe(struct ath12k_ce_pipe *pipe) in ath12k_ce_rx_post_pipe() argument
273 struct ath12k_base *ab = pipe->ab; in ath12k_ce_rx_post_pipe()
278 if (!(pipe->dest_ring || pipe->status_ring)) in ath12k_ce_rx_post_pipe()
282 while (pipe->rx_buf_needed) { in ath12k_ce_rx_post_pipe()
283 skb = dev_alloc_skb(pipe->buf_sz); in ath12k_ce_rx_post_pipe()
303 ret = ath12k_ce_rx_buf_enqueue_pipe(pipe, skb, paddr); in ath12k_ce_rx_post_pipe()
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/camera/pipe/src/ |
| D | pipe_binarydesc.c | 37 struct ia_css_pipe const *const pipe, in pipe_binarydesc_get_offline() argument
46 assert(pipe); in pipe_binarydesc_get_offline()
53 descr->continuous = pipe->stream->config.continuous; in pipe_binarydesc_get_offline()
68 descr->stream_format = pipe->stream->config.input_config.format; in pipe_binarydesc_get_offline()
74 descr->isp_pipe_version = pipe->config.isp_pipe_version; in pipe_binarydesc_get_offline()
80 struct ia_css_pipe const *const pipe, in ia_css_pipe_get_copy_binarydesc() argument
89 assert(pipe); in ia_css_pipe_get_copy_binarydesc()
97 pipe_binarydesc_get_offline(pipe, IA_CSS_BINARY_MODE_COPY, in ia_css_pipe_get_copy_binarydesc()
101 copy_descr->two_ppc = (pipe->stream->config.pixels_per_clock == 2); in ia_css_pipe_get_copy_binarydesc()
108 struct ia_css_pipe const *const pipe, in ia_css_pipe_get_vfpp_binarydesc() argument
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| D | dcn32_resource_helpers.c | 114 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn32_merge_pipes_for_subvp() local
116 // For now merge all pipes for SubVP since pipe split case isn't supported yet in dcn32_merge_pipes_for_subvp()
119 if (pipe->prev_odm_pipe) { in dcn32_merge_pipes_for_subvp()
120 /*split off odm pipe*/ in dcn32_merge_pipes_for_subvp()
121 pipe->prev_odm_pipe->next_odm_pipe = pipe->next_odm_pipe; in dcn32_merge_pipes_for_subvp()
122 if (pipe->next_odm_pipe) in dcn32_merge_pipes_for_subvp()
123 pipe->next_odm_pipe->prev_odm_pipe = pipe->prev_odm_pipe; in dcn32_merge_pipes_for_subvp()
125 pipe->bottom_pipe = NULL; in dcn32_merge_pipes_for_subvp()
126 pipe->next_odm_pipe = NULL; in dcn32_merge_pipes_for_subvp()
127 pipe->plane_state = NULL; in dcn32_merge_pipes_for_subvp()
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/ |
| D | sh_css.c | 121 * @pipes: pipe handles
123 * @pipe_config: pipe config structs
182 allocate_delay_frames(struct ia_css_pipe *pipe);
201 ia_css_pipe_check_format(struct ia_css_pipe *pipe,
215 need_capture_pp(const struct ia_css_pipe *pipe);
218 need_yuv_scaler_stage(const struct ia_css_pipe *pipe);
233 static bool need_capt_ldc(const struct ia_css_pipe *pipe);
236 sh_css_pipe_load_binaries(struct ia_css_pipe *pipe);
240 struct ia_css_pipe *pipe,
245 sh_css_pipe_get_output_frame_info(struct ia_css_pipe *pipe,
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| D | ia_css_pipe_public.h | 37 /* Enumeration of pipe modes. This mode can be used to create
38 * an image pipe for this mode. These pipes can be combined
41 * For example, one can create a preview and capture pipe to
45 IA_CSS_PIPE_MODE_PREVIEW, /** Preview pipe */
46 IA_CSS_PIPE_MODE_VIDEO, /** Video pipe */
47 IA_CSS_PIPE_MODE_CAPTURE, /** Still capture pipe */
48 IA_CSS_PIPE_MODE_COPY, /** Copy pipe, only used for embedded/image data copying */
49 IA_CSS_PIPE_MODE_YUVPP, /** YUV post processing pipe, used for all use cases with YUV input,
57 * Enumeration of pipe versions.
61 IA_CSS_PIPE_VERSION_1 = 1, /** ISP1.0 pipe */
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| /linux-6.12.1/drivers/media/platform/renesas/vsp1/ |
| D | vsp1_drm.c | 33 static void vsp1_du_pipeline_frame_end(struct vsp1_pipeline *pipe, in vsp1_du_pipeline_frame_end() argument
36 struct vsp1_drm_pipeline *drm_pipe = to_vsp1_drm_pipeline(pipe); in vsp1_du_pipeline_frame_end()
64 struct vsp1_pipeline *pipe, in vsp1_du_insert_uif() argument
116 struct vsp1_pipeline *pipe, in vsp1_du_pipeline_setup_rpf() argument
190 ret = vsp1_du_insert_uif(vsp1, pipe, uif, &rpf->entity, RWPF_PAD_SOURCE, in vsp1_du_pipeline_setup_rpf()
191 pipe->brx, brx_input); in vsp1_du_pipeline_setup_rpf()
198 ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_fmt, NULL, in vsp1_du_pipeline_setup_rpf()
205 format.format.code, BRX_NAME(pipe->brx), format.pad); in vsp1_du_pipeline_setup_rpf()
211 ret = v4l2_subdev_call(&pipe->brx->subdev, pad, set_selection, NULL, in vsp1_du_pipeline_setup_rpf()
218 BRX_NAME(pipe->brx), sel.pad); in vsp1_du_pipeline_setup_rpf()
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| /linux-6.12.1/drivers/gpu/drm/lima/ |
| D | lima_sched.c | 22 struct lima_sched_pipe *pipe; member
64 return f->pipe->base.name; in lima_fence_get_timeline_name()
88 static struct lima_fence *lima_fence_create(struct lima_sched_pipe *pipe) in lima_fence_create() argument
96 fence->pipe = pipe; in lima_fence_create()
97 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create()
98 pipe->fence_context, ++pipe->fence_seqno); in lima_fence_create()
156 int lima_sched_context_init(struct lima_sched_pipe *pipe, in lima_sched_context_init() argument
159 struct drm_gpu_scheduler *sched = &pipe->base; in lima_sched_context_init()
165 void lima_sched_context_fini(struct lima_sched_pipe *pipe, in lima_sched_context_fini() argument
205 struct lima_sched_pipe *pipe = to_lima_pipe(job->sched); in lima_sched_run_job() local
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