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/linux-6.12.1/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: qcom,sc7180-pdc-global
22 - const: qcom,sdm845-pdc-global
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/linux-6.12.1/drivers/reset/
Dreset-qcom-pdc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
34 .name = "pdc-reset",
92 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_assert()
94 return regmap_update_bits(data->regmap, data->desc->offset, mask, mask); in qcom_pdc_control_assert()
101 u32 mask = BIT(data->desc->resets[idx].bit); in qcom_pdc_control_deassert()
103 return regmap_update_bits(data->regmap, data->desc->offset, mask, 0); in qcom_pdc_control_deassert()
115 struct device *dev = &pdev->dev; in qcom_pdc_reset_probe()
118 desc = device_get_match_data(&pdev->dev); in qcom_pdc_reset_probe()
[all …]
/linux-6.12.1/arch/parisc/kernel/
Dinventory.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2001 Matthew Wilcox for Hewlett-Packard
13 * Map before checking for a Snake -- this probably doesn't cause any
26 #include <asm/pdc.h>
30 #include <asm/parisc-device.h>
35 ** DEBUG_PAT Dump details which PDC PAT provides about ranges/devices.
58 /* Determine the pdc "type" used on this machine */ in setup_pdc()
60 printk(KERN_INFO "Determining PDC firmware type: "); in setup_pdc()
71 * is a pdc pat box, or it is an older box. All 64 bit capable in setup_pdc()
72 * machines are either pdc pat boxes or they support PDC_SYSTEM_MAP. in setup_pdc()
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Dprocessor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
28 #include <asm/pdc.h>
32 #include <asm/parisc-device.h>
44 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
50 ** The callback *should* do per-instance initialization of
57 ** The code path not shared is how PDC hands control of the CPU to the OS.
62 * init_percpu_prof - enable/setup per cpu profiling hooks.
[all …]
Dhead.S5 * Copyright (C) 1999-2007 by Helge Deller <deller@gmx.de>
12 * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
15 #include <asm/asm-offsets.h>
17 #include <asm/pdc.h>
43 .import $global$ /* forward declaration */
49 /* Make sure sr4-sr7 are set to zero for the kernel address space */
74 /* check for 64-bit capable CPU as required by current kernel */
83 ldi msg1_end-msg1,%arg1
94 stw %r1,-52(%sp) // arg4
95 stw %r0,-56(%sp) // arg5
[all …]
Dsetup.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Initial setup-routines for HP 9000 based hardware.
6 * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de>
12 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
32 #include <asm/pdc.h>
49 /* boot_args[0] is free-mem start, boot_args[1] is ptr to command line */ in setup_cmdline()
61 if (PAGE0->mem_cons.cl_class == CL_DUPLEX) in setup_cmdline()
69 strlcat(p, " earlycon=pdc", COMMAND_LINE_SIZE); in setup_cmdline()
91 panic( "PA-RISC Linux currently only supports machines that conform to\n" in dma_ops_init()
92 "the PA-RISC 1.1 or 2.0 architecture specification.\n"); in dma_ops_init()
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Dpdt.c1 // SPDX-License-Identifier: GPL-2.0
7 * The list contains both single-bit (correctable) and double-bit
13 * - add userspace interface via procfs or sysfs to clear PDT
24 #include <asm/pdc.h>
43 /* global PDT status information */
52 * A pdt_entry holds the physical address in bits 0-57, bits 58-61 are
58 * On non-PAT machines phys_addr is encoded in bits 0-59 and error_type in bit
133 pr_warn("PDT: BAD MEMORY at 0x%08lx, %s%s%s-bit error.\n", in report_mem_err()
164 /* non-PAT machines provide the standard PDC call */ in pdc_pdt_init()
277 return -EINVAL; in pdt_mainloop()
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/linux-6.12.1/arch/parisc/boot/compressed/
Dhead.S9 #include <asm/asm-offsets.h>
12 #include <asm/pdc.h>
19 .import $global$ /* forward declaration */
35 extrw,u %r1, PSW_W_BIT-32, 1, %r1
38 /* Make sure sr4-sr7 are set to zero for the kernel address space */
56 /* Initialize the global data pointer */
61 copy %arg2, %r7 /* rd-start */
62 copy %arg3, %r8 /* rd-end */
67 ssm PSW_W_SM, %r0 /* set W-bit */
76 rsm PSW_W_SM, %r0 /* clear W-bit */
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
[all …]
/linux-6.12.1/drivers/mailbox/
Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
[all …]
/linux-6.12.1/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
[all …]
/linux-6.12.1/arch/parisc/include/asm/
Dropes.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm/parisc-device.h>
8 /* "low end" PA8800 machines use ZX1 chipset: PAT PDC and only run 64-bit */
33 unsigned long ibase; /* pdir IOV Space base - shared w/lba_pci */
34 unsigned long imask; /* pdir IOV Space mask - shared w/lba_pci */
38 unsigned long *res_hint; /* next avail IOVP - circular search */
85 unsigned int num_ioc; /* number of on-board IOC's */
99 return d->id.hversion == ASTRO_RUNWAY_PORT; in IS_ASTRO()
103 return d->id.hversion == IKE_MERCED_PORT; in IS_IKE()
107 return d->id.hversion == PLUTO_MCKINLEY_PORT; in IS_PLUTO()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interconnect/qcom,icc.h>
11 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
[all …]
Dsm6350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sm6350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6350.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm6350.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm6350-camcc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,icc.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,sm8350.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sc8280xp-camcc.h>
12 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
13 #include <dt-bindings/interconnect/qcom,osm-l3.h>
14 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dx1e80100.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
8 #include <dt-bindings/clock/qcom,x1e80100-dispcc.h>
9 #include <dt-bindings/clock/qcom,x1e80100-gcc.h>
10 #include <dt-bindings/clock/qcom,x1e80100-gpucc.h>
11 #include <dt-bindings/clock/qcom,x1e80100-tcsr.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,x1e80100-rpmh.h>
[all …]
Dsc8180x.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,osm-l3.h>
13 #include <dt-bindings/interconnect/qcom,sc8180x.h>
[all …]
Dsdm670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sdm670-rpmh.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 #include <dt-bindings/phy/phy-qcom-qusb2.h>
[all …]
Dsa8775p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interconnect/qcom,icc.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
12 #include <dt-bindings/mailbox/qcom-ipcc.h>
13 #include <dt-bindings/firmware/qcom,scm.h>
14 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
/linux-6.12.1/drivers/ata/
Dsata_qstor.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_qstor.c - Pacific Digital Corporation QStor SATA
11 * as Documentation/driver-api/libata.rst
38 /* global register offsets */
41 QS_HCT_CTRL = 0x00e4, /* global interrupt mask offset */
45 /* global control bits */
46 QS_HPHY_64BIT = (1 << 1), /* 64-bit bus detected */
47 QS_CNFG3_GSRST = 0x01, /* global chip reset */
50 /* per-channel register offsets */
57 QS_CCT_CTR0 = 0x0900, /* chan control-0 offset */
[all …]
/linux-6.12.1/drivers/parisc/
Ddino.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 ** (c) Copyright 1999,2000 Hewlett-Packard Company
9 ** (c) Copyright 2006-2019 Helge Deller
21 ** The different between Built-in Dino and Card-Mode
24 ** Linux drivers can only use Card-Mode Dino if pci devices I/O port
32 ** 2001-06-14 : Clement Moyroud (moyroudc@esiee.fr)
33 ** - added support for the integrated RS232.
53 #include <asm/pdc.h>
70 ** Config accessor functions only pass in the 8-bit bus number
71 ** and not the 8-bit "PCI Segment" number. Each Dino will be
[all …]
/linux-6.12.1/drivers/pci/hotplug/
Dpnv_php.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <asm/pnv-pci.h>
17 #include <asm/ppc-pci.h>
24 ((sl)->pdev ? pci_warn((sl)->pdev, x) : dev_warn(&(sl)->bus->dev, x))
42 struct pci_dev *pdev = php_slot->pdev; in pnv_php_disable_irq()
45 if (php_slot->irq > 0) { in pnv_php_disable_irq()
52 free_irq(php_slot->irq, php_slot); in pnv_php_disable_irq()
53 php_slot->irq = 0; in pnv_php_disable_irq()
56 if (php_slot->wq) { in pnv_php_disable_irq()
57 destroy_workqueue(php_slot->wq); in pnv_php_disable_irq()
[all …]

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