Home
last modified time | relevance | path

Searched +full:mc +full:- +full:sid (Results 1 – 25 of 33) sorted by relevance

12

/linux-6.12.1/drivers/memory/tegra/
Dtegra186.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017-2021 NVIDIA CORPORATION. All rights reserved.
14 #include <soc/tegra/mc.h>
17 #include <dt-bindings/memory/tegra186-mc.h>
20 #include "mc.h"
26 static int tegra186_mc_probe(struct tegra_mc *mc) in tegra186_mc_probe() argument
28 struct platform_device *pdev = to_platform_device(mc->dev); in tegra186_mc_probe()
33 mc->bcast_ch_regs = devm_platform_ioremap_resource_byname(pdev, "broadcast"); in tegra186_mc_probe()
34 if (IS_ERR(mc->bcast_ch_regs)) { in tegra186_mc_probe()
35 if (PTR_ERR(mc->bcast_ch_regs) == -EINVAL) { in tegra186_mc_probe()
[all …]
Dtegra234.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2022-2023, NVIDIA CORPORATION. All rights reserved.
6 #include <soc/tegra/mc.h>
8 #include <dt-bindings/memory/tegra234-mc.h>
10 #include <linux/tegra-icc.h>
13 #include "mc.h"
16 * MC Client entries are sorted in the increasing order of the
25 .sid = TEGRA234_SID_HDA,
27 .sid = {
37 .sid = TEGRA234_SID_NVENC,
[all …]
Dtegra194.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017-2021 NVIDIA CORPORATION. All rights reserved.
6 #include <soc/tegra/mc.h>
8 #include <dt-bindings/memory/tegra194-mc.h>
10 #include "mc.h"
16 .sid = TEGRA194_SID_PASSTHROUGH,
18 .sid = {
26 .sid = TEGRA194_SID_MIU,
28 .sid = {
36 .sid = TEGRA194_SID_MIU,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra186-mc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
15 into four 32 bit channels to support LPDDR4 with x16 subpartitions. The MC
16 handles memory requests for 40-bit virtual addresses from internal clients
27 pattern: "^memory-controller@[0-9a-f]+$"
31 - enum:
[all …]
/linux-6.12.1/include/soc/tegra/
Dmc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/interconnect-provider.h>
14 #include <linux/reset-controller.h>
16 #include <linux/tegra-icc.h>
40 unsigned int sid; member
64 } sid; member
103 struct tegra_mc *mc);
108 struct tegra_mc *mc) in tegra_smmu_probe() argument
128 int (*hotreset_assert)(struct tegra_mc *mc,
130 int (*hotreset_deassert)(struct tegra_mc *mc,
[all …]
/linux-6.12.1/drivers/iommu/arm/arm-smmu/
Darm-smmu-nvidia.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2019-2020 NVIDIA CORPORATION. All rights reserved.
10 #include <soc/tegra/mc.h>
12 #include "arm-smmu.h"
15 * Tegra194 has three ARM MMU-500 Instances.
18 * non-isochronous HW devices.
22 * driver to ensure that the right SID override is programmed for any given
23 * memory client. This is necessary to allow for use-case such as seamlessly
29 * driver for SID override programming after devices have been attached to an
38 struct tegra_mc *mc; member
[all …]
Darm-smmu.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * - SMMUv1 and v2 implementations
11 * - Stream-matching and stream-indexing
12 * - v7/v8 long-descriptor format
13 * - Non-secure access to the SMMU
14 * - Context fault reporting
15 * - Extended Stream ID (16 bit)
18 #define pr_fmt(fmt) "arm-smmu: " fmt
24 #include <linux/dma-mapping.h>
38 #include <linux/fsl/mc.h>
[all …]
/linux-6.12.1/drivers/dma/
Dtegra186-gpc-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
10 #include <linux/dma-mapping.h>
21 #include <dt-bindings/memory/tegra186-mc.h>
22 #include "virt-dma.h"
87 /* MC sequence register */
118 (GENMASK((fls(bs) - 2), 0) << TEGRA_GPCDMA_MMIOSEQ_BURST_SHIFT)
158 * on-flight burst and update DMA status register.
203 * sub-transfer as per requester details and hw support. This sub transfer
263 writel_relaxed(val, tdc->tdma->base_addr + tdc->chan_base_offset + reg); in tdc_write()
[all …]
/linux-6.12.1/drivers/infiniband/core/
Dcma.c1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
4 * Copyright (c) 2002-2005, Network Appliance, Inc. All rights reserved.
5 * Copyright (c) 1999-2019, Mellanox Technologies, Inc. All rights reserved.
6 * Copyright (c) 2005-2006 Intel Corporation. All rights reserved.
87 if (rdma_ib_or_roce(id->device, id->port_num)) in rdma_reject_msg()
90 if (rdma_protocol_iwarp(id->device, id->port_num)) in rdma_reject_msg()
99 * rdma_is_consumer_reject - return true if the consumer rejected the connect
106 if (rdma_ib_or_roce(id->device, id->port_num)) in rdma_is_consumer_reject()
109 if (rdma_protocol_iwarp(id->device, id->port_num)) in rdma_is_consumer_reject()
110 return reason == -ECONNREFUSED; in rdma_is_consumer_reject()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun5i.dtsi2 * Copyright 2012-2015 Maxime Ripard
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/clock/sun5i-ccu.h>
46 #include <dt-bindings/dma/sun4i-a10.h>
47 #include <dt-bindings/reset/sun5i-ccu.h>
50 interrupt-parent = <&intc>;
51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
[all …]
Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/allwinner/
Dsun50i-h616.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/sun50i-h616-ccu.h>
8 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
9 #include <dt-bindings/clock/sun6i-rtc.h>
10 #include <dt-bindings/reset/sun50i-h616-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
Dsun50i-h6.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/sun50i-h6-ccu.h>
6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-tcon-top.h>
10 #include <dt-bindings/reset/sun50i-h6-ccu.h>
11 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
[all …]
Dsun50i-a64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/sun50i-a64-ccu.h>
7 #include <dt-bindings/clock/sun6i-rtc.h>
8 #include <dt-bindings/clock/sun8i-de2.h>
9 #include <dt-bindings/clock/sun8i-r-ccu.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/sun50i-a64-ccu.h>
12 #include <dt-bindings/reset/sun8i-de2.h>
13 #include <dt-bindings/reset/sun8i-r-ccu.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dgk104.c32 #include <subdev/mc.h>
42 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_stop()
44 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000800, 0x00000800); in gk104_chan_stop()
50 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_start()
52 nvkm_mask(device, 0x800004 + (chan->id * 8), 0x00000400, 0x00000400); in gk104_chan_start()
58 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_unbind()
60 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x00000000); in gk104_chan_unbind()
66 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in gk104_chan_bind_inst()
68 nvkm_wr32(device, 0x800000 + (chan->id * 8), 0x80000000 | chan->inst->addr >> 12); in gk104_chan_bind_inst()
74 struct nvkm_runl *runl = chan->cgrp->runl; in gk104_chan_bind()
[all …]
/linux-6.12.1/arch/riscv/boot/dts/allwinner/
Dsunxi-d1s-t113.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #include <dt-bindings/clock/sun6i-rtc.h>
5 #include <dt-bindings/clock/sun8i-de2.h>
6 #include <dt-bindings/clock/sun8i-tcon-top.h>
7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sun8i-de2.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
[all …]
/linux-6.12.1/include/linux/habanalabs/
Dcpucp_if.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2020-2023 HabanaLabs, Ltd.
197 /* HBM index and MC index are known by the event_id */
211 __u8 mc_channel; /* range: 0-3 */
212 __u8 mc_pseudo_channel; /* range: 0-7 */
303 u32 sid:1; member
316 /* derr[0:1] - 1st HBM cycle DERR output
317 * derr[2:3] - 2nd HBM cycle DERR output
327 * temperature read-out, read parity error and write parity error.
466 * Non-QMAN packets should be limited to values 1 through (2^8 - 1)
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Dsi.c43 #include "sid.h"
1210 switch (rdev->family) { in si_init_golden_registers()
1278 * si_get_allowed_info_register - fetch the register for the info ioctl
1284 * Returns 0 for success or -EINVAL for an invalid register
1303 return -EINVAL; in si_get_allowed_info_register()
1311 * si_get_xclk - get the xclk
1320 u32 reference_clock = rdev->clock.spll.reference_freq; in si_get_xclk()
1560 if (!rdev->mc_fw) in si_mc_load_microcode()
1561 return -EINVAL; in si_mc_load_microcode()
1563 if (rdev->new_fw) { in si_mc_load_microcode()
[all …]
/linux-6.12.1/sound/pci/ac97/
Dac97_codec.c1 // SPDX-License-Identifier: GPL-2.0-or-later
38 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
62 * currently used by the AC97 emulation of the almost-AC97 PCI168 card.
65 { 0x434d4900, 0xffffff00, "C-Media Electronics", NULL, NULL },
139 { 0x43585430, 0xffffffff, "Cx20468-31", patch_conexant, NULL },
152 { 0x4e534300, 0xffffffff, "LM4540,43,45,46,48", NULL, NULL }, // only guess --jk
161 { 0x54524123, 0xffffffff, "TR28602", NULL, NULL }, // only guess --jk [TR28023 = eMicro EM28023 (…
197 ((ac97->scaps & AC97_SCAP_POWER_SAVE) && power_save)
203 dev_err((ac97)->bus->card->dev, fmt, ##args)
205 dev_warn((ac97)->bus->card->dev, fmt, ##args)
[all …]
/linux-6.12.1/drivers/target/iscsi/
Discsi_target_util.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (c) Copyright 2007-2013 Datera, Inc.
7 * Author: Nicholas A. Bellinger <nab@linux-iscsi.org>
43 lockdep_assert_held(&cmd->r2t_lock); in iscsit_add_r2t_to_list()
50 return -1; in iscsit_add_r2t_to_list()
52 INIT_LIST_HEAD(&r2t->r2t_list); in iscsit_add_r2t_to_list()
54 r2t->recovery_r2t = recovery; in iscsit_add_r2t_to_list()
55 r2t->r2t_sn = (!r2t_sn) ? cmd->r2t_sn++ : r2t_sn; in iscsit_add_r2t_to_list()
56 r2t->offset = offset; in iscsit_add_r2t_to_list()
57 r2t->xfer_len = xfer_len; in iscsit_add_r2t_to_list()
[all …]
/linux-6.12.1/drivers/video/fbdev/matrox/
Dmatroxfb_base.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
33 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
57 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
73 * G400 MAX/non-MAX distinction
81 * "Denis Zaitsev" <zzz@cd-club.ru>
84 * "Mike Pieper" <mike@pieper-family.de>
94 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
128 /* --------------------------------------------------------------------- */
134 /* --------------------------------------------------------------------- */
[all …]

12