/linux-6.12.1/arch/x86/kernel/acpi/ |
D | cstate.c | 23 * before entering C3. 39 * Today all MP CPUs that support C3 share cache. in acpi_processor_power_init_bm_check() 41 * entering C3 type state. in acpi_processor_power_init_bm_check() 49 * is not required while entering C3 type state on in acpi_processor_power_init_bm_check() 61 * core can keep cache coherence with each other while entering C3 in acpi_processor_power_init_bm_check() 64 * entering C3 type state. in acpi_processor_power_init_bm_check() 70 * not required while entering C3 type state. in acpi_processor_power_init_bm_check() 78 * All Zhaoxin CPUs that support C3 share cache. in acpi_processor_power_init_bm_check() 80 * entering C3 type state. in acpi_processor_power_init_bm_check() 86 * is not required while entering C3 type state. in acpi_processor_power_init_bm_check() [all …]
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/linux-6.12.1/arch/s390/crypto/ |
D | chacha-s390.S | 457 #define C3 %v14 macro 517 VLR C3,K2 548 VAF C3,C3,D3 554 VX B3,B3,C3 586 VAF C3,C3,D3 592 VX B3,B3,C3 605 VSLDB C3,C3,C3,8 643 VAF C3,C3,D3 649 VX B3,B3,C3 681 VAF C3,C3,D3 [all …]
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/linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
D | amlogic-c3.dtsi | 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> 60 compatible = "amlogic,c3-pwrc"; 119 compatible = "amlogic,c3-peripherals-clkc"; 157 compatible = "amlogic,c3-reset"; 163 compatible = "amlogic,c3-wdt", "amlogic,t7-wdt"; [all …]
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/linux-6.12.1/drivers/cpufreq/ |
D | longhaul.c | 190 /* Invoke C3 */ in do_powersaver() 208 /* Invoke C3 */ in do_powersaver() 227 /* Invoke C3 */ in do_powersaver() 282 pic1_mask = inb(0x21); /* works on C3. save mask. */ in longhaul_setstate() 362 /* Why ACPI C3 sometimes doesn't work is a mystery for me. in longhaul_setstate() 363 * But it does happen. Processor is entering ACPI C3 state, in longhaul_setstate() 367 pr_info("Disabling ACPI C3 support\n"); in longhaul_setstate() 444 * C3 is booting at max anyway. */ in longhaul_get_ranges() 634 * this in hardware, C3 is old and we need to do this in longhaul_target() 771 cpuname = "C3 'Samuel' [C5A]"; in longhaul_cpu_init() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | amlogic,c3-pll-clkc.yaml | 5 $id: http://devicetree.org/schemas/clock/amlogic,c3-pll-clkc.yaml# 8 title: Amlogic C3 series PLL Clock Controller 18 const: amlogic,c3-pll-clkc 54 compatible = "amlogic,c3-pll-clkc";
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D | amlogic,c3-peripherals-clkc.yaml | 5 $id: http://devicetree.org/schemas/clock/amlogic,c3-peripherals-clkc.yaml# 8 title: Amlogic C3 series Peripheral Clock Controller 18 const: amlogic,c3-peripherals-clkc 84 compatible = "amlogic,c3-peripherals-clkc";
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/linux-6.12.1/arch/arm/include/asm/hardware/ |
D | cp14.h | 55 #define RCP14_DBGDTRTXext() MRC14(0, c0, c3, 2) 60 #define RCP14_DBGBVR3() MRC14(0, c0, c3, 4) 76 #define RCP14_DBGBCR3() MRC14(0, c0, c3, 5) 92 #define RCP14_DBGWVR3() MRC14(0, c0, c3, 6) 108 #define RCP14_DBGWCR3() MRC14(0, c0, c3, 7) 125 #define RCP14_DBGBXVR3() MRC14(0, c1, c3, 1) 140 #define RCP14_DBGOSDLR() MRC14(0, c1, c3, 4) 160 #define WCP14_DBGDTRTXext(val) MCR14(val, 0, c0, c3, 2) 165 #define WCP14_DBGBVR3(val) MCR14(val, 0, c0, c3, 4) 181 #define WCP14_DBGBCR3(val) MCR14(val, 0, c0, c3, 5) [all …]
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/linux-6.12.1/arch/arm/include/asm/ |
D | uaccess-asm.h | 50 mcr p15, 0, \tmp, c3, c0, 0 @ Set domain register 62 mcr p15, 0, \tmp, c3, c0, 0 132 DACR( mrc p15, 0, \tmp0, c3, c0, 0) 139 mcr p15, 0, \tmp2, c3, c0, 0 145 mcr p15, 0, \tmp2, c3, c0, 0 153 DACR( mcr p15, 0, \tmp0, c3, c0, 0)
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/linux-6.12.1/tools/power/cpupower/utils/idle_monitor/ |
D | nhm_idle.c | 27 enum intel_nhm_id { C3 = 0, C6, PC3, PC6, TSC = 0xFFFF }; enumerator 34 .name = "C3", 35 .desc = N_("Processor Core C3"), 36 .id = C3, 50 .desc = N_("Processor Package C3"), 77 case C3: in nhm_get_count()
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/linux-6.12.1/arch/powerpc/kernel/vdso/ |
D | vgetrandom-chacha.S | 52 .macro quarterround4 a1 b1 c1 d1 a2 b2 c2 d2 a3 b3 c3 d3 a4 b4 c4 d4 67 add \c3, \c3, \d3 71 xor \b3, \b3, \c3 91 add \c3, \c3, \d3 95 xor \b3, \b3, \c3 103 #define QUARTERROUND4(a1,b1,c1,d1,a2,b2,c2,d2,a3,b3,c3,d3,a4,b4,c4,d4) \ argument 106 state##a3 state##b3 state##c3 state##d3 \
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/linux-6.12.1/drivers/acpi/ |
D | processor_idle.c | 11 * - Added support for C3 on SMP 68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. 119 * Some BIOS implementations switch to C3 in the published C2 state. 122 * that the local APIC stops in both C2 and C3. 230 /* determine C2 and C3 address from pblk */ in acpi_processor_get_power_info_fadt() 250 * FADT supplied C3 latency must be less than or equal to in acpi_processor_get_power_info_fadt() 254 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n", in acpi_processor_get_power_info_fadt() 256 /* invalidate C3 */ in acpi_processor_get_power_info_fadt() 320 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) in acpi_processor_power_verify_c3() 328 "C3 not supported on PIIX4 with Type-F DMA\n"); in acpi_processor_power_verify_c3() [all …]
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/linux-6.12.1/tools/testing/selftests/cgroup/ |
D | test_cpuset_prs.sh | 194 SETUP_A123_PARTITIONS="C1-3:P1:S+ C2-3:P1:S+ C3:P1" 212 "C2-3:P1:S+ C3:P1 . . C3 . . . 0 A1:,A2:3 A1:P1,A2:P1" 213 "C2-3:P1:S+ C3:P1 . . C3 P0 . . 0 A1:3,A2:3 A1:P1,A2:P0" 215 "C2-3:P1:S+ C3:P1 . . C3 . . C0-2 0 A1:,B1:0-2 A1:P1,A2:P1" 224 "C2-3:P1:S+ C3:P1 . . O3=0 O3=1 . . 0 A1:2,A2:3 A1:P1,A2:P1" 225 "C2-3:P1:S+ C3:P2 . . O3=0 O3=1 . . 0 A1:2,A2:3 A1:P1,A2:P2" 226 "C2-3:P1:S+ C3:P1 . . O2=0 O2=1 . . 0 A1:2,A2:3 A1:P1,A2:P1" 227 "C2-3:P1:S+ C3:P2 . . O2=0 O2=1 . . 0 A1:2,A2:3 A1:P1,A2:P2" 228 "C2-3:P1:S+ C3:P1 . . O2=0 . . . 0 A1:,A2:3 A1:P1,A2:P1" 229 "C2-3:P1:S+ C3:P1 . . O3=0 . . . 0 A1:2,A2: A1:P1,A2:P1" [all …]
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/linux-6.12.1/arch/arm/mm/ |
D | tlb-v7.S | 50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 52 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) 79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable) 81 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable)
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/linux-6.12.1/drivers/watchdog/ |
D | sbc_epx_c3.c | 3 * SBC EPX C3 0.1 A Hardware Watchdog Device for the Winsystems EPX-C3 109 .identity = "Winsystems EPX-C3 H/W Watchdog", in epx_c3_ioctl() 194 pr_info("Hardware Watchdog Timer for Winsystems EPX-C3 SBC: 0.1\n"); in watchdog_init() 214 MODULE_DESCRIPTION("Hardware Watchdog Device for Winsystems EPX-C3 SBC. "
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/linux-6.12.1/drivers/clk/meson/ |
D | Kconfig | 136 tristate "Amlogic C3 PLL clock controller" 145 AKA C3. Say Y if you want the board to work, because PLLs are the parent 149 tristate "Amlogic C3 peripherals clock controller" 159 C308L devices, AKA C3. Say Y if you want the peripherals clock to
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/linux-6.12.1/drivers/comedi/drivers/ |
D | amplc_dio200_pci.c | 175 * 1 PPI-X-C3 PPI-X-C3 PPI-X-C3 177 * 3 PPI-Y-C3 PPI-Y-C3 unused 185 * 1 PPI-X-C3 PPI-X1-C3 187 * 3 PPI-Y-C3 PPI-Y1-C3 189 * 5 PPI-Z-C3 CTR-Z2-OUT1
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D | amplc_dio200.c | 142 * 1 PPI-X-C3 PPI-X-C3 144 * 3 CTR-Y2-OUT1 PPI-Y-C3 152 * 1 CTR-X2-OUT1 PPI-X-C3 154 * 3 CTR-Y2-OUT1 PPI-Y-C3 156 * 5 CTR-Z2-OUT1 PPI-Z-C3
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/linux-6.12.1/arch/mips/include/asm/sibyte/ |
D | board.h | 25 #define setleds(t0, t1, c0, c1, c2, c3) \ 33 li t1, c3; \ 36 #define setleds(t0, t1, c0, c1, c2, c3)
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/linux-6.12.1/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
D | gdc.c | 66 * c0[0-1023], c1[0-1023], c2[0-1023] c3[0-1023] 69 * c0[0], c1[0], c2[0], c3[0], c0[1], c1[1], c2[1], c3[1], .... 70 * c0[1023], c1[1023], c2[1023], c3[1023]
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/linux-6.12.1/tools/testing/selftests/net/netfilter/ |
D | br_netfilter_queue.sh | 11 setup_ns c1 c2 c3 sender 41 port_add "$c3" "c3" 3
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/linux-6.12.1/Documentation/ABI/stable/ |
D | sysfs-class-tpm | 97 PCR-00: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75 98 PCR-01: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75 99 PCR-02: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75 100 PCR-03: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75 101 PCR-04: 3A 3F 78 0F 11 A4 B4 99 69 FC AA 80 CD 6E 39 57 C3 3B 22 75 145 C3 91 FF 44 1E CF 7C 39 FE 17 77 21 20 BD CE 9B
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/snowridgex/ |
D | uncore-power.json | 156 "BriefDescription": "Package C State Residency - C3", 162 …Residency - C3 : Counts the number of cycles when the package was in C3. This event can be used i… 196 "BriefDescription": "Number of cores in C-State : C3", 202 …"PublicDescription": "Number of cores in C-State : C3 : This is an occupancy event that tracks the…
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/linux-6.12.1/arch/riscv/crypto/ |
D | chacha-riscv64-zvkb.S | 77 a2, b2, c2, d2, a3, b3, c3, d3 96 vadd.vv \c3, \c3, \d3 100 vxor.vv \b3, \b3, \c3 124 vadd.vv \c3, \c3, \d3 128 vxor.vv \b3, \b3, \c3
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/icelakex/ |
D | uncore-power.json | 157 "BriefDescription": "Package C State Residency - C3", 163 …Residency - C3 : Counts the number of cycles when the package was in C3. This event can be used i… 197 "BriefDescription": "Number of cores in C-State : C3", 203 …"PublicDescription": "Number of cores in C-State : C3 : This is an occupancy event that tracks the…
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/linux-6.12.1/arch/arm/boot/dts/qcom/ |
D | qcom-ipq4019-ap.dk04.1-c3.dts | 7 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1-C3"; 8 compatible = "qcom,ipq4019-ap-dk04.1-c3", "qcom,ipq4019";
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