1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
12 */
13 #define pr_fmt(fmt) "ACPI: " fmt
14
15 #include <linux/module.h>
16 #include <linux/acpi.h>
17 #include <linux/dmi.h>
18 #include <linux/sched.h> /* need_resched() */
19 #include <linux/tick.h>
20 #include <linux/cpuidle.h>
21 #include <linux/cpu.h>
22 #include <linux/minmax.h>
23 #include <linux/perf_event.h>
24 #include <acpi/processor.h>
25 #include <linux/context_tracking.h>
26
27 /*
28 * Include the apic definitions for x86 to have the APIC timer related defines
29 * available also for UP (on SMP it gets magically included via linux/smp.h).
30 * asm/acpi.h is not an option, as it would require more include magic. Also
31 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
32 */
33 #ifdef CONFIG_X86
34 #include <asm/apic.h>
35 #include <asm/cpu.h>
36 #endif
37
38 #define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39
40 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41 module_param(max_cstate, uint, 0400);
42 static bool nocst __read_mostly;
43 module_param(nocst, bool, 0400);
44 static bool bm_check_disable __read_mostly;
45 module_param(bm_check_disable, bool, 0400);
46
47 static unsigned int latency_factor __read_mostly = 2;
48 module_param(latency_factor, uint, 0644);
49
50 static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51
52 struct cpuidle_driver acpi_idle_driver = {
53 .name = "acpi_idle",
54 .owner = THIS_MODULE,
55 };
56
57 #ifdef CONFIG_ACPI_PROCESSOR_CSTATE
58 static
59 DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
60
disabled_by_idle_boot_param(void)61 static int disabled_by_idle_boot_param(void)
62 {
63 return boot_option_idle_override == IDLE_POLL ||
64 boot_option_idle_override == IDLE_HALT;
65 }
66
67 /*
68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69 * For now disable this. Probably a bug somewhere else.
70 *
71 * To skip this limit, boot/load with a large max_cstate limit.
72 */
set_max_cstate(const struct dmi_system_id * id)73 static int set_max_cstate(const struct dmi_system_id *id)
74 {
75 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 return 0;
77
78 pr_notice("%s detected - limiting to C%ld max_cstate."
79 " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
81
82 max_cstate = (long)id->driver_data;
83
84 return 0;
85 }
86
87 static const struct dmi_system_id processor_power_dmi_table[] = {
88 { set_max_cstate, "Clevo 5600D", {
89 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
91 (void *)2},
92 { set_max_cstate, "Pavilion zv5000", {
93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 (void *)1},
96 { set_max_cstate, "Asus L8400B", {
97 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 (void *)1},
100 {},
101 };
102
103
104 /*
105 * Callers should disable interrupts before the call and enable
106 * interrupts after return.
107 */
acpi_safe_halt(void)108 static void __cpuidle acpi_safe_halt(void)
109 {
110 if (!tif_need_resched()) {
111 raw_safe_halt();
112 raw_local_irq_disable();
113 }
114 }
115
116 #ifdef ARCH_APICTIMER_STOPS_ON_C3
117
118 /*
119 * Some BIOS implementations switch to C3 in the published C2 state.
120 * This seems to be a common problem on AMD boxen, but other vendors
121 * are affected too. We pick the most conservative approach: we assume
122 * that the local APIC stops in both C2 and C3.
123 */
lapic_timer_check_state(int state,struct acpi_processor * pr,struct acpi_processor_cx * cx)124 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
125 struct acpi_processor_cx *cx)
126 {
127 struct acpi_processor_power *pwr = &pr->power;
128 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
129
130 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 return;
132
133 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
134 type = ACPI_STATE_C1;
135
136 /*
137 * Check, if one of the previous states already marked the lapic
138 * unstable
139 */
140 if (pwr->timer_broadcast_on_state < state)
141 return;
142
143 if (cx->type >= type)
144 pr->power.timer_broadcast_on_state = state;
145 }
146
__lapic_timer_propagate_broadcast(void * arg)147 static void __lapic_timer_propagate_broadcast(void *arg)
148 {
149 struct acpi_processor *pr = arg;
150
151 if (pr->power.timer_broadcast_on_state < INT_MAX)
152 tick_broadcast_enable();
153 else
154 tick_broadcast_disable();
155 }
156
lapic_timer_propagate_broadcast(struct acpi_processor * pr)157 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158 {
159 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 (void *)pr, 1);
161 }
162
163 /* Power(C) State timer broadcast control */
lapic_timer_needs_broadcast(struct acpi_processor * pr,struct acpi_processor_cx * cx)164 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
165 struct acpi_processor_cx *cx)
166 {
167 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
168 }
169
170 #else
171
lapic_timer_check_state(int state,struct acpi_processor * pr,struct acpi_processor_cx * cstate)172 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
173 struct acpi_processor_cx *cstate) { }
lapic_timer_propagate_broadcast(struct acpi_processor * pr)174 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
175
lapic_timer_needs_broadcast(struct acpi_processor * pr,struct acpi_processor_cx * cx)176 static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
177 struct acpi_processor_cx *cx)
178 {
179 return false;
180 }
181
182 #endif
183
184 #if defined(CONFIG_X86)
tsc_check_state(int state)185 static void tsc_check_state(int state)
186 {
187 switch (boot_cpu_data.x86_vendor) {
188 case X86_VENDOR_HYGON:
189 case X86_VENDOR_AMD:
190 case X86_VENDOR_INTEL:
191 case X86_VENDOR_CENTAUR:
192 case X86_VENDOR_ZHAOXIN:
193 /*
194 * AMD Fam10h TSC will tick in all
195 * C/P/S0/S1 states when this bit is set.
196 */
197 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
198 return;
199 fallthrough;
200 default:
201 /* TSC could halt in idle, so notify users */
202 if (state > ACPI_STATE_C1)
203 mark_tsc_unstable("TSC halts in idle");
204 }
205 }
206 #else
tsc_check_state(int state)207 static void tsc_check_state(int state) { return; }
208 #endif
209
acpi_processor_get_power_info_fadt(struct acpi_processor * pr)210 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
211 {
212
213 if (!pr->pblk)
214 return -ENODEV;
215
216 /* if info is obtained from pblk/fadt, type equals state */
217 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
218 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
219
220 #ifndef CONFIG_HOTPLUG_CPU
221 /*
222 * Check for P_LVL2_UP flag before entering C2 and above on
223 * an SMP system.
224 */
225 if ((num_online_cpus() > 1) &&
226 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
227 return -ENODEV;
228 #endif
229
230 /* determine C2 and C3 address from pblk */
231 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
232 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
233
234 /* determine latencies from FADT */
235 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
236 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
237
238 /*
239 * FADT specified C2 latency must be less than or equal to
240 * 100 microseconds.
241 */
242 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
243 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
244 acpi_gbl_FADT.c2_latency);
245 /* invalidate C2 */
246 pr->power.states[ACPI_STATE_C2].address = 0;
247 }
248
249 /*
250 * FADT supplied C3 latency must be less than or equal to
251 * 1000 microseconds.
252 */
253 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
254 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
255 acpi_gbl_FADT.c3_latency);
256 /* invalidate C3 */
257 pr->power.states[ACPI_STATE_C3].address = 0;
258 }
259
260 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
261 pr->power.states[ACPI_STATE_C2].address,
262 pr->power.states[ACPI_STATE_C3].address);
263
264 snprintf(pr->power.states[ACPI_STATE_C2].desc,
265 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
266 pr->power.states[ACPI_STATE_C2].address);
267 snprintf(pr->power.states[ACPI_STATE_C3].desc,
268 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
269 pr->power.states[ACPI_STATE_C3].address);
270
271 return 0;
272 }
273
acpi_processor_get_power_info_default(struct acpi_processor * pr)274 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
275 {
276 if (!pr->power.states[ACPI_STATE_C1].valid) {
277 /* set the first C-State to C1 */
278 /* all processors need to support C1 */
279 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
280 pr->power.states[ACPI_STATE_C1].valid = 1;
281 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
282
283 snprintf(pr->power.states[ACPI_STATE_C1].desc,
284 ACPI_CX_DESC_LEN, "ACPI HLT");
285 }
286 /* the C0 state only exists as a filler in our array */
287 pr->power.states[ACPI_STATE_C0].valid = 1;
288 return 0;
289 }
290
acpi_processor_get_power_info_cst(struct acpi_processor * pr)291 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
292 {
293 int ret;
294
295 if (nocst)
296 return -ENODEV;
297
298 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
299 if (ret)
300 return ret;
301
302 if (!pr->power.count)
303 return -EFAULT;
304
305 pr->flags.has_cst = 1;
306 return 0;
307 }
308
acpi_processor_power_verify_c3(struct acpi_processor * pr,struct acpi_processor_cx * cx)309 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
310 struct acpi_processor_cx *cx)
311 {
312 static int bm_check_flag = -1;
313 static int bm_control_flag = -1;
314
315
316 if (!cx->address)
317 return;
318
319 /*
320 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
321 * DMA transfers are used by any ISA device to avoid livelock.
322 * Note that we could disable Type-F DMA (as recommended by
323 * the erratum), but this is known to disrupt certain ISA
324 * devices thus we take the conservative approach.
325 */
326 if (errata.piix4.fdma) {
327 acpi_handle_debug(pr->handle,
328 "C3 not supported on PIIX4 with Type-F DMA\n");
329 return;
330 }
331
332 /* All the logic here assumes flags.bm_check is same across all CPUs */
333 if (bm_check_flag == -1) {
334 /* Determine whether bm_check is needed based on CPU */
335 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
336 bm_check_flag = pr->flags.bm_check;
337 bm_control_flag = pr->flags.bm_control;
338 } else {
339 pr->flags.bm_check = bm_check_flag;
340 pr->flags.bm_control = bm_control_flag;
341 }
342
343 if (pr->flags.bm_check) {
344 if (!pr->flags.bm_control) {
345 if (pr->flags.has_cst != 1) {
346 /* bus mastering control is necessary */
347 acpi_handle_debug(pr->handle,
348 "C3 support requires BM control\n");
349 return;
350 } else {
351 /* Here we enter C3 without bus mastering */
352 acpi_handle_debug(pr->handle,
353 "C3 support without BM control\n");
354 }
355 }
356 } else {
357 /*
358 * WBINVD should be set in fadt, for C3 state to be
359 * supported on when bm_check is not required.
360 */
361 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
362 acpi_handle_debug(pr->handle,
363 "Cache invalidation should work properly"
364 " for C3 to be enabled on SMP systems\n");
365 return;
366 }
367 }
368
369 /*
370 * Otherwise we've met all of our C3 requirements.
371 * Normalize the C3 latency to expidite policy. Enable
372 * checking of bus mastering status (bm_check) so we can
373 * use this in our C3 policy
374 */
375 cx->valid = 1;
376
377 /*
378 * On older chipsets, BM_RLD needs to be set
379 * in order for Bus Master activity to wake the
380 * system from C3. Newer chipsets handle DMA
381 * during C3 automatically and BM_RLD is a NOP.
382 * In either case, the proper way to
383 * handle BM_RLD is to set it and leave it set.
384 */
385 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
386 }
387
acpi_cst_latency_sort(struct acpi_processor_cx * states,size_t length)388 static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length)
389 {
390 int i, j, k;
391
392 for (i = 1; i < length; i++) {
393 if (!states[i].valid)
394 continue;
395
396 for (j = i - 1, k = i; j >= 0; j--) {
397 if (!states[j].valid)
398 continue;
399
400 if (states[j].latency > states[k].latency)
401 swap(states[j].latency, states[k].latency);
402
403 k = j;
404 }
405 }
406 }
407
acpi_processor_power_verify(struct acpi_processor * pr)408 static int acpi_processor_power_verify(struct acpi_processor *pr)
409 {
410 unsigned int i;
411 unsigned int working = 0;
412 unsigned int last_latency = 0;
413 unsigned int last_type = 0;
414 bool buggy_latency = false;
415
416 pr->power.timer_broadcast_on_state = INT_MAX;
417
418 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
419 struct acpi_processor_cx *cx = &pr->power.states[i];
420
421 switch (cx->type) {
422 case ACPI_STATE_C1:
423 cx->valid = 1;
424 break;
425
426 case ACPI_STATE_C2:
427 if (!cx->address)
428 break;
429 cx->valid = 1;
430 break;
431
432 case ACPI_STATE_C3:
433 acpi_processor_power_verify_c3(pr, cx);
434 break;
435 }
436 if (!cx->valid)
437 continue;
438 if (cx->type >= last_type && cx->latency < last_latency)
439 buggy_latency = true;
440 last_latency = cx->latency;
441 last_type = cx->type;
442
443 lapic_timer_check_state(i, pr, cx);
444 tsc_check_state(cx->type);
445 working++;
446 }
447
448 if (buggy_latency) {
449 pr_notice("FW issue: working around C-state latencies out of order\n");
450 acpi_cst_latency_sort(&pr->power.states[1], max_cstate);
451 }
452
453 lapic_timer_propagate_broadcast(pr);
454
455 return working;
456 }
457
acpi_processor_get_cstate_info(struct acpi_processor * pr)458 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
459 {
460 unsigned int i;
461 int result;
462
463
464 /* NOTE: the idle thread may not be running while calling
465 * this function */
466
467 /* Zero initialize all the C-states info. */
468 memset(pr->power.states, 0, sizeof(pr->power.states));
469
470 result = acpi_processor_get_power_info_cst(pr);
471 if (result == -ENODEV)
472 result = acpi_processor_get_power_info_fadt(pr);
473
474 if (result)
475 return result;
476
477 acpi_processor_get_power_info_default(pr);
478
479 pr->power.count = acpi_processor_power_verify(pr);
480
481 /*
482 * if one state of type C2 or C3 is available, mark this
483 * CPU as being "idle manageable"
484 */
485 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
486 if (pr->power.states[i].valid) {
487 pr->power.count = i;
488 pr->flags.power = 1;
489 }
490 }
491
492 return 0;
493 }
494
495 /**
496 * acpi_idle_bm_check - checks if bus master activity was detected
497 */
acpi_idle_bm_check(void)498 static int acpi_idle_bm_check(void)
499 {
500 u32 bm_status = 0;
501
502 if (bm_check_disable)
503 return 0;
504
505 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
506 if (bm_status)
507 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
508 /*
509 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
510 * the true state of bus mastering activity; forcing us to
511 * manually check the BMIDEA bit of each IDE channel.
512 */
513 else if (errata.piix4.bmisx) {
514 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
515 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
516 bm_status = 1;
517 }
518 return bm_status;
519 }
520
io_idle(unsigned long addr)521 static __cpuidle void io_idle(unsigned long addr)
522 {
523 /* IO port based C-state */
524 inb(addr);
525
526 #ifdef CONFIG_X86
527 /* No delay is needed if we are in guest */
528 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
529 return;
530 /*
531 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
532 * not this code. Assume that any Intel systems using this
533 * are ancient and may need the dummy wait. This also assumes
534 * that the motivating chipset issue was Intel-only.
535 */
536 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
537 return;
538 #endif
539 /*
540 * Dummy wait op - must do something useless after P_LVL2 read
541 * because chipsets cannot guarantee that STPCLK# signal gets
542 * asserted in time to freeze execution properly
543 *
544 * This workaround has been in place since the original ACPI
545 * implementation was merged, circa 2002.
546 *
547 * If a profile is pointing to this instruction, please first
548 * consider moving your system to a more modern idle
549 * mechanism.
550 */
551 inl(acpi_gbl_FADT.xpm_timer_block.address);
552 }
553
554 /**
555 * acpi_idle_do_entry - enter idle state using the appropriate method
556 * @cx: cstate data
557 *
558 * Caller disables interrupt before call and enables interrupt after return.
559 */
acpi_idle_do_entry(struct acpi_processor_cx * cx)560 static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
561 {
562 perf_lopwr_cb(true);
563
564 if (cx->entry_method == ACPI_CSTATE_FFH) {
565 /* Call into architectural FFH based C-state */
566 acpi_processor_ffh_cstate_enter(cx);
567 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
568 acpi_safe_halt();
569 } else {
570 io_idle(cx->address);
571 }
572
573 perf_lopwr_cb(false);
574 }
575
576 /**
577 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
578 * @dev: the target CPU
579 * @index: the index of suggested state
580 */
acpi_idle_play_dead(struct cpuidle_device * dev,int index)581 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
582 {
583 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
584
585 ACPI_FLUSH_CPU_CACHE();
586
587 while (1) {
588
589 if (cx->entry_method == ACPI_CSTATE_HALT)
590 raw_safe_halt();
591 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
592 io_idle(cx->address);
593 } else
594 return -ENODEV;
595 }
596
597 /* Never reached */
598 return 0;
599 }
600
acpi_idle_fallback_to_c1(struct acpi_processor * pr)601 static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
602 {
603 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
604 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
605 }
606
607 static int c3_cpu_count;
608 static DEFINE_RAW_SPINLOCK(c3_lock);
609
610 /**
611 * acpi_idle_enter_bm - enters C3 with proper BM handling
612 * @drv: cpuidle driver
613 * @pr: Target processor
614 * @cx: Target state context
615 * @index: index of target state
616 */
acpi_idle_enter_bm(struct cpuidle_driver * drv,struct acpi_processor * pr,struct acpi_processor_cx * cx,int index)617 static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
618 struct acpi_processor *pr,
619 struct acpi_processor_cx *cx,
620 int index)
621 {
622 static struct acpi_processor_cx safe_cx = {
623 .entry_method = ACPI_CSTATE_HALT,
624 };
625
626 /*
627 * disable bus master
628 * bm_check implies we need ARB_DIS
629 * bm_control implies whether we can do ARB_DIS
630 *
631 * That leaves a case where bm_check is set and bm_control is not set.
632 * In that case we cannot do much, we enter C3 without doing anything.
633 */
634 bool dis_bm = pr->flags.bm_control;
635
636 instrumentation_begin();
637
638 /* If we can skip BM, demote to a safe state. */
639 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
640 dis_bm = false;
641 index = drv->safe_state_index;
642 if (index >= 0) {
643 cx = this_cpu_read(acpi_cstate[index]);
644 } else {
645 cx = &safe_cx;
646 index = -EBUSY;
647 }
648 }
649
650 if (dis_bm) {
651 raw_spin_lock(&c3_lock);
652 c3_cpu_count++;
653 /* Disable bus master arbitration when all CPUs are in C3 */
654 if (c3_cpu_count == num_online_cpus())
655 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
656 raw_spin_unlock(&c3_lock);
657 }
658
659 ct_cpuidle_enter();
660
661 acpi_idle_do_entry(cx);
662
663 ct_cpuidle_exit();
664
665 /* Re-enable bus master arbitration */
666 if (dis_bm) {
667 raw_spin_lock(&c3_lock);
668 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
669 c3_cpu_count--;
670 raw_spin_unlock(&c3_lock);
671 }
672
673 instrumentation_end();
674
675 return index;
676 }
677
acpi_idle_enter(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)678 static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
679 struct cpuidle_driver *drv, int index)
680 {
681 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
682 struct acpi_processor *pr;
683
684 pr = __this_cpu_read(processors);
685 if (unlikely(!pr))
686 return -EINVAL;
687
688 if (cx->type != ACPI_STATE_C1) {
689 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
690 return acpi_idle_enter_bm(drv, pr, cx, index);
691
692 /* C2 to C1 demotion. */
693 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
694 index = ACPI_IDLE_STATE_START;
695 cx = per_cpu(acpi_cstate[index], dev->cpu);
696 }
697 }
698
699 if (cx->type == ACPI_STATE_C3)
700 ACPI_FLUSH_CPU_CACHE();
701
702 acpi_idle_do_entry(cx);
703
704 return index;
705 }
706
acpi_idle_enter_s2idle(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)707 static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
708 struct cpuidle_driver *drv, int index)
709 {
710 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
711
712 if (cx->type == ACPI_STATE_C3) {
713 struct acpi_processor *pr = __this_cpu_read(processors);
714
715 if (unlikely(!pr))
716 return 0;
717
718 if (pr->flags.bm_check) {
719 u8 bm_sts_skip = cx->bm_sts_skip;
720
721 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
722 cx->bm_sts_skip = 1;
723 acpi_idle_enter_bm(drv, pr, cx, index);
724 cx->bm_sts_skip = bm_sts_skip;
725
726 return 0;
727 } else {
728 ACPI_FLUSH_CPU_CACHE();
729 }
730 }
731 acpi_idle_do_entry(cx);
732
733 return 0;
734 }
735
acpi_processor_setup_cpuidle_cx(struct acpi_processor * pr,struct cpuidle_device * dev)736 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
737 struct cpuidle_device *dev)
738 {
739 int i, count = ACPI_IDLE_STATE_START;
740 struct acpi_processor_cx *cx;
741 struct cpuidle_state *state;
742
743 if (max_cstate == 0)
744 max_cstate = 1;
745
746 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
747 state = &acpi_idle_driver.states[count];
748 cx = &pr->power.states[i];
749
750 if (!cx->valid)
751 continue;
752
753 per_cpu(acpi_cstate[count], dev->cpu) = cx;
754
755 if (lapic_timer_needs_broadcast(pr, cx))
756 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
757
758 if (cx->type == ACPI_STATE_C3) {
759 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
760 if (pr->flags.bm_check)
761 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
762 }
763
764 count++;
765 if (count == CPUIDLE_STATE_MAX)
766 break;
767 }
768
769 if (!count)
770 return -EINVAL;
771
772 return 0;
773 }
774
acpi_processor_setup_cstates(struct acpi_processor * pr)775 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
776 {
777 int i, count;
778 struct acpi_processor_cx *cx;
779 struct cpuidle_state *state;
780 struct cpuidle_driver *drv = &acpi_idle_driver;
781
782 if (max_cstate == 0)
783 max_cstate = 1;
784
785 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
786 cpuidle_poll_state_init(drv);
787 count = 1;
788 } else {
789 count = 0;
790 }
791
792 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
793 cx = &pr->power.states[i];
794
795 if (!cx->valid)
796 continue;
797
798 state = &drv->states[count];
799 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
800 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
801 state->exit_latency = cx->latency;
802 state->target_residency = cx->latency * latency_factor;
803 state->enter = acpi_idle_enter;
804
805 state->flags = 0;
806 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||
807 cx->type == ACPI_STATE_C3) {
808 state->enter_dead = acpi_idle_play_dead;
809 if (cx->type != ACPI_STATE_C3)
810 drv->safe_state_index = count;
811 }
812 /*
813 * Halt-induced C1 is not good for ->enter_s2idle, because it
814 * re-enables interrupts on exit. Moreover, C1 is generally not
815 * particularly interesting from the suspend-to-idle angle, so
816 * avoid C1 and the situations in which we may need to fall back
817 * to it altogether.
818 */
819 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
820 state->enter_s2idle = acpi_idle_enter_s2idle;
821
822 count++;
823 if (count == CPUIDLE_STATE_MAX)
824 break;
825 }
826
827 drv->state_count = count;
828
829 if (!count)
830 return -EINVAL;
831
832 return 0;
833 }
834
acpi_processor_cstate_first_run_checks(void)835 static inline void acpi_processor_cstate_first_run_checks(void)
836 {
837 static int first_run;
838
839 if (first_run)
840 return;
841 dmi_check_system(processor_power_dmi_table);
842 max_cstate = acpi_processor_cstate_check(max_cstate);
843 if (max_cstate < ACPI_C_STATES_MAX)
844 pr_notice("processor limited to max C-state %d\n", max_cstate);
845
846 first_run++;
847
848 if (nocst)
849 return;
850
851 acpi_processor_claim_cst_control();
852 }
853 #else
854
disabled_by_idle_boot_param(void)855 static inline int disabled_by_idle_boot_param(void) { return 0; }
acpi_processor_cstate_first_run_checks(void)856 static inline void acpi_processor_cstate_first_run_checks(void) { }
acpi_processor_get_cstate_info(struct acpi_processor * pr)857 static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
858 {
859 return -ENODEV;
860 }
861
acpi_processor_setup_cpuidle_cx(struct acpi_processor * pr,struct cpuidle_device * dev)862 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
863 struct cpuidle_device *dev)
864 {
865 return -EINVAL;
866 }
867
acpi_processor_setup_cstates(struct acpi_processor * pr)868 static int acpi_processor_setup_cstates(struct acpi_processor *pr)
869 {
870 return -EINVAL;
871 }
872
873 #endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
874
875 struct acpi_lpi_states_array {
876 unsigned int size;
877 unsigned int composite_states_size;
878 struct acpi_lpi_state *entries;
879 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
880 };
881
obj_get_integer(union acpi_object * obj,u32 * value)882 static int obj_get_integer(union acpi_object *obj, u32 *value)
883 {
884 if (obj->type != ACPI_TYPE_INTEGER)
885 return -EINVAL;
886
887 *value = obj->integer.value;
888 return 0;
889 }
890
acpi_processor_evaluate_lpi(acpi_handle handle,struct acpi_lpi_states_array * info)891 static int acpi_processor_evaluate_lpi(acpi_handle handle,
892 struct acpi_lpi_states_array *info)
893 {
894 acpi_status status;
895 int ret = 0;
896 int pkg_count, state_idx = 1, loop;
897 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
898 union acpi_object *lpi_data;
899 struct acpi_lpi_state *lpi_state;
900
901 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
902 if (ACPI_FAILURE(status)) {
903 acpi_handle_debug(handle, "No _LPI, giving up\n");
904 return -ENODEV;
905 }
906
907 lpi_data = buffer.pointer;
908
909 /* There must be at least 4 elements = 3 elements + 1 package */
910 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
911 lpi_data->package.count < 4) {
912 pr_debug("not enough elements in _LPI\n");
913 ret = -ENODATA;
914 goto end;
915 }
916
917 pkg_count = lpi_data->package.elements[2].integer.value;
918
919 /* Validate number of power states. */
920 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
921 pr_debug("count given by _LPI is not valid\n");
922 ret = -ENODATA;
923 goto end;
924 }
925
926 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
927 if (!lpi_state) {
928 ret = -ENOMEM;
929 goto end;
930 }
931
932 info->size = pkg_count;
933 info->entries = lpi_state;
934
935 /* LPI States start at index 3 */
936 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
937 union acpi_object *element, *pkg_elem, *obj;
938
939 element = &lpi_data->package.elements[loop];
940 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
941 continue;
942
943 pkg_elem = element->package.elements;
944
945 obj = pkg_elem + 6;
946 if (obj->type == ACPI_TYPE_BUFFER) {
947 struct acpi_power_register *reg;
948
949 reg = (struct acpi_power_register *)obj->buffer.pointer;
950 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
951 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
952 continue;
953
954 lpi_state->address = reg->address;
955 lpi_state->entry_method =
956 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
957 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
958 } else if (obj->type == ACPI_TYPE_INTEGER) {
959 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
960 lpi_state->address = obj->integer.value;
961 } else {
962 continue;
963 }
964
965 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
966
967 obj = pkg_elem + 9;
968 if (obj->type == ACPI_TYPE_STRING)
969 strscpy(lpi_state->desc, obj->string.pointer,
970 ACPI_CX_DESC_LEN);
971
972 lpi_state->index = state_idx;
973 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
974 pr_debug("No min. residency found, assuming 10 us\n");
975 lpi_state->min_residency = 10;
976 }
977
978 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
979 pr_debug("No wakeup residency found, assuming 10 us\n");
980 lpi_state->wake_latency = 10;
981 }
982
983 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
984 lpi_state->flags = 0;
985
986 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
987 lpi_state->arch_flags = 0;
988
989 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
990 lpi_state->res_cnt_freq = 1;
991
992 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
993 lpi_state->enable_parent_state = 0;
994 }
995
996 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
997 end:
998 kfree(buffer.pointer);
999 return ret;
1000 }
1001
1002 /*
1003 * flat_state_cnt - the number of composite LPI states after the process of flattening
1004 */
1005 static int flat_state_cnt;
1006
1007 /**
1008 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1009 *
1010 * @local: local LPI state
1011 * @parent: parent LPI state
1012 * @result: composite LPI state
1013 */
combine_lpi_states(struct acpi_lpi_state * local,struct acpi_lpi_state * parent,struct acpi_lpi_state * result)1014 static bool combine_lpi_states(struct acpi_lpi_state *local,
1015 struct acpi_lpi_state *parent,
1016 struct acpi_lpi_state *result)
1017 {
1018 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1019 if (!parent->address) /* 0 means autopromotable */
1020 return false;
1021 result->address = local->address + parent->address;
1022 } else {
1023 result->address = parent->address;
1024 }
1025
1026 result->min_residency = max(local->min_residency, parent->min_residency);
1027 result->wake_latency = local->wake_latency + parent->wake_latency;
1028 result->enable_parent_state = parent->enable_parent_state;
1029 result->entry_method = local->entry_method;
1030
1031 result->flags = parent->flags;
1032 result->arch_flags = parent->arch_flags;
1033 result->index = parent->index;
1034
1035 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1036 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1037 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1038 return true;
1039 }
1040
1041 #define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1042
stash_composite_state(struct acpi_lpi_states_array * curr_level,struct acpi_lpi_state * t)1043 static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1044 struct acpi_lpi_state *t)
1045 {
1046 curr_level->composite_states[curr_level->composite_states_size++] = t;
1047 }
1048
flatten_lpi_states(struct acpi_processor * pr,struct acpi_lpi_states_array * curr_level,struct acpi_lpi_states_array * prev_level)1049 static int flatten_lpi_states(struct acpi_processor *pr,
1050 struct acpi_lpi_states_array *curr_level,
1051 struct acpi_lpi_states_array *prev_level)
1052 {
1053 int i, j, state_count = curr_level->size;
1054 struct acpi_lpi_state *p, *t = curr_level->entries;
1055
1056 curr_level->composite_states_size = 0;
1057 for (j = 0; j < state_count; j++, t++) {
1058 struct acpi_lpi_state *flpi;
1059
1060 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1061 continue;
1062
1063 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1064 pr_warn("Limiting number of LPI states to max (%d)\n",
1065 ACPI_PROCESSOR_MAX_POWER);
1066 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1067 break;
1068 }
1069
1070 flpi = &pr->power.lpi_states[flat_state_cnt];
1071
1072 if (!prev_level) { /* leaf/processor node */
1073 memcpy(flpi, t, sizeof(*t));
1074 stash_composite_state(curr_level, flpi);
1075 flat_state_cnt++;
1076 continue;
1077 }
1078
1079 for (i = 0; i < prev_level->composite_states_size; i++) {
1080 p = prev_level->composite_states[i];
1081 if (t->index <= p->enable_parent_state &&
1082 combine_lpi_states(p, t, flpi)) {
1083 stash_composite_state(curr_level, flpi);
1084 flat_state_cnt++;
1085 flpi++;
1086 }
1087 }
1088 }
1089
1090 kfree(curr_level->entries);
1091 return 0;
1092 }
1093
acpi_processor_ffh_lpi_probe(unsigned int cpu)1094 int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1095 {
1096 return -EOPNOTSUPP;
1097 }
1098
acpi_processor_get_lpi_info(struct acpi_processor * pr)1099 static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1100 {
1101 int ret, i;
1102 acpi_status status;
1103 acpi_handle handle = pr->handle, pr_ahandle;
1104 struct acpi_device *d = NULL;
1105 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1106
1107 /* make sure our architecture has support */
1108 ret = acpi_processor_ffh_lpi_probe(pr->id);
1109 if (ret == -EOPNOTSUPP)
1110 return ret;
1111
1112 if (!osc_pc_lpi_support_confirmed)
1113 return -EOPNOTSUPP;
1114
1115 if (!acpi_has_method(handle, "_LPI"))
1116 return -EINVAL;
1117
1118 flat_state_cnt = 0;
1119 prev = &info[0];
1120 curr = &info[1];
1121 handle = pr->handle;
1122 ret = acpi_processor_evaluate_lpi(handle, prev);
1123 if (ret)
1124 return ret;
1125 flatten_lpi_states(pr, prev, NULL);
1126
1127 status = acpi_get_parent(handle, &pr_ahandle);
1128 while (ACPI_SUCCESS(status)) {
1129 d = acpi_fetch_acpi_dev(pr_ahandle);
1130 if (!d)
1131 break;
1132
1133 handle = pr_ahandle;
1134
1135 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1136 break;
1137
1138 /* can be optional ? */
1139 if (!acpi_has_method(handle, "_LPI"))
1140 break;
1141
1142 ret = acpi_processor_evaluate_lpi(handle, curr);
1143 if (ret)
1144 break;
1145
1146 /* flatten all the LPI states in this level of hierarchy */
1147 flatten_lpi_states(pr, curr, prev);
1148
1149 tmp = prev, prev = curr, curr = tmp;
1150
1151 status = acpi_get_parent(handle, &pr_ahandle);
1152 }
1153
1154 pr->power.count = flat_state_cnt;
1155 /* reset the index after flattening */
1156 for (i = 0; i < pr->power.count; i++)
1157 pr->power.lpi_states[i].index = i;
1158
1159 /* Tell driver that _LPI is supported. */
1160 pr->flags.has_lpi = 1;
1161 pr->flags.power = 1;
1162
1163 return 0;
1164 }
1165
acpi_processor_ffh_lpi_enter(struct acpi_lpi_state * lpi)1166 int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1167 {
1168 return -ENODEV;
1169 }
1170
1171 /**
1172 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1173 * @dev: the target CPU
1174 * @drv: cpuidle driver containing cpuidle state info
1175 * @index: index of target state
1176 *
1177 * Return: 0 for success or negative value for error
1178 */
acpi_idle_lpi_enter(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)1179 static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1180 struct cpuidle_driver *drv, int index)
1181 {
1182 struct acpi_processor *pr;
1183 struct acpi_lpi_state *lpi;
1184
1185 pr = __this_cpu_read(processors);
1186
1187 if (unlikely(!pr))
1188 return -EINVAL;
1189
1190 lpi = &pr->power.lpi_states[index];
1191 if (lpi->entry_method == ACPI_CSTATE_FFH)
1192 return acpi_processor_ffh_lpi_enter(lpi);
1193
1194 return -EINVAL;
1195 }
1196
acpi_processor_setup_lpi_states(struct acpi_processor * pr)1197 static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1198 {
1199 int i;
1200 struct acpi_lpi_state *lpi;
1201 struct cpuidle_state *state;
1202 struct cpuidle_driver *drv = &acpi_idle_driver;
1203
1204 if (!pr->flags.has_lpi)
1205 return -EOPNOTSUPP;
1206
1207 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1208 lpi = &pr->power.lpi_states[i];
1209
1210 state = &drv->states[i];
1211 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1212 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1213 state->exit_latency = lpi->wake_latency;
1214 state->target_residency = lpi->min_residency;
1215 state->flags |= arch_get_idle_state_flags(lpi->arch_flags);
1216 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH)
1217 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
1218 state->enter = acpi_idle_lpi_enter;
1219 drv->safe_state_index = i;
1220 }
1221
1222 drv->state_count = i;
1223
1224 return 0;
1225 }
1226
1227 /**
1228 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1229 * global state data i.e. idle routines
1230 *
1231 * @pr: the ACPI processor
1232 */
acpi_processor_setup_cpuidle_states(struct acpi_processor * pr)1233 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1234 {
1235 int i;
1236 struct cpuidle_driver *drv = &acpi_idle_driver;
1237
1238 if (!pr->flags.power_setup_done || !pr->flags.power)
1239 return -EINVAL;
1240
1241 drv->safe_state_index = -1;
1242 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1243 drv->states[i].name[0] = '\0';
1244 drv->states[i].desc[0] = '\0';
1245 }
1246
1247 if (pr->flags.has_lpi)
1248 return acpi_processor_setup_lpi_states(pr);
1249
1250 return acpi_processor_setup_cstates(pr);
1251 }
1252
1253 /**
1254 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1255 * device i.e. per-cpu data
1256 *
1257 * @pr: the ACPI processor
1258 * @dev : the cpuidle device
1259 */
acpi_processor_setup_cpuidle_dev(struct acpi_processor * pr,struct cpuidle_device * dev)1260 static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1261 struct cpuidle_device *dev)
1262 {
1263 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1264 return -EINVAL;
1265
1266 dev->cpu = pr->id;
1267 if (pr->flags.has_lpi)
1268 return acpi_processor_ffh_lpi_probe(pr->id);
1269
1270 return acpi_processor_setup_cpuidle_cx(pr, dev);
1271 }
1272
acpi_processor_get_power_info(struct acpi_processor * pr)1273 static int acpi_processor_get_power_info(struct acpi_processor *pr)
1274 {
1275 int ret;
1276
1277 ret = acpi_processor_get_lpi_info(pr);
1278 if (ret)
1279 ret = acpi_processor_get_cstate_info(pr);
1280
1281 return ret;
1282 }
1283
acpi_processor_hotplug(struct acpi_processor * pr)1284 int acpi_processor_hotplug(struct acpi_processor *pr)
1285 {
1286 int ret = 0;
1287 struct cpuidle_device *dev;
1288
1289 if (disabled_by_idle_boot_param())
1290 return 0;
1291
1292 if (!pr->flags.power_setup_done)
1293 return -ENODEV;
1294
1295 dev = per_cpu(acpi_cpuidle_device, pr->id);
1296 cpuidle_pause_and_lock();
1297 cpuidle_disable_device(dev);
1298 ret = acpi_processor_get_power_info(pr);
1299 if (!ret && pr->flags.power) {
1300 acpi_processor_setup_cpuidle_dev(pr, dev);
1301 ret = cpuidle_enable_device(dev);
1302 }
1303 cpuidle_resume_and_unlock();
1304
1305 return ret;
1306 }
1307
acpi_processor_power_state_has_changed(struct acpi_processor * pr)1308 int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1309 {
1310 int cpu;
1311 struct acpi_processor *_pr;
1312 struct cpuidle_device *dev;
1313
1314 if (disabled_by_idle_boot_param())
1315 return 0;
1316
1317 if (!pr->flags.power_setup_done)
1318 return -ENODEV;
1319
1320 /*
1321 * FIXME: Design the ACPI notification to make it once per
1322 * system instead of once per-cpu. This condition is a hack
1323 * to make the code that updates C-States be called once.
1324 */
1325
1326 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1327
1328 /* Protect against cpu-hotplug */
1329 cpus_read_lock();
1330 cpuidle_pause_and_lock();
1331
1332 /* Disable all cpuidle devices */
1333 for_each_online_cpu(cpu) {
1334 _pr = per_cpu(processors, cpu);
1335 if (!_pr || !_pr->flags.power_setup_done)
1336 continue;
1337 dev = per_cpu(acpi_cpuidle_device, cpu);
1338 cpuidle_disable_device(dev);
1339 }
1340
1341 /* Populate Updated C-state information */
1342 acpi_processor_get_power_info(pr);
1343 acpi_processor_setup_cpuidle_states(pr);
1344
1345 /* Enable all cpuidle devices */
1346 for_each_online_cpu(cpu) {
1347 _pr = per_cpu(processors, cpu);
1348 if (!_pr || !_pr->flags.power_setup_done)
1349 continue;
1350 acpi_processor_get_power_info(_pr);
1351 if (_pr->flags.power) {
1352 dev = per_cpu(acpi_cpuidle_device, cpu);
1353 acpi_processor_setup_cpuidle_dev(_pr, dev);
1354 cpuidle_enable_device(dev);
1355 }
1356 }
1357 cpuidle_resume_and_unlock();
1358 cpus_read_unlock();
1359 }
1360
1361 return 0;
1362 }
1363
1364 static int acpi_processor_registered;
1365
acpi_processor_power_init(struct acpi_processor * pr)1366 int acpi_processor_power_init(struct acpi_processor *pr)
1367 {
1368 int retval;
1369 struct cpuidle_device *dev;
1370
1371 if (disabled_by_idle_boot_param())
1372 return 0;
1373
1374 acpi_processor_cstate_first_run_checks();
1375
1376 if (!acpi_processor_get_power_info(pr))
1377 pr->flags.power_setup_done = 1;
1378
1379 /*
1380 * Install the idle handler if processor power management is supported.
1381 * Note that we use previously set idle handler will be used on
1382 * platforms that only support C1.
1383 */
1384 if (pr->flags.power) {
1385 /* Register acpi_idle_driver if not already registered */
1386 if (!acpi_processor_registered) {
1387 acpi_processor_setup_cpuidle_states(pr);
1388 retval = cpuidle_register_driver(&acpi_idle_driver);
1389 if (retval)
1390 return retval;
1391 pr_debug("%s registered with cpuidle\n",
1392 acpi_idle_driver.name);
1393 }
1394
1395 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1396 if (!dev)
1397 return -ENOMEM;
1398 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1399
1400 acpi_processor_setup_cpuidle_dev(pr, dev);
1401
1402 /* Register per-cpu cpuidle_device. Cpuidle driver
1403 * must already be registered before registering device
1404 */
1405 retval = cpuidle_register_device(dev);
1406 if (retval) {
1407 if (acpi_processor_registered == 0)
1408 cpuidle_unregister_driver(&acpi_idle_driver);
1409 return retval;
1410 }
1411 acpi_processor_registered++;
1412 }
1413 return 0;
1414 }
1415
acpi_processor_power_exit(struct acpi_processor * pr)1416 int acpi_processor_power_exit(struct acpi_processor *pr)
1417 {
1418 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1419
1420 if (disabled_by_idle_boot_param())
1421 return 0;
1422
1423 if (pr->flags.power) {
1424 cpuidle_unregister_device(dev);
1425 acpi_processor_registered--;
1426 if (acpi_processor_registered == 0)
1427 cpuidle_unregister_driver(&acpi_idle_driver);
1428
1429 kfree(dev);
1430 }
1431
1432 pr->flags.power_setup_done = 0;
1433 return 0;
1434 }
1435