Searched +full:bwadj +full:- +full:- +full:- (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-pll.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Baikal-T1 Clock Control Unit PLL11 - Serge Semin <fancer.lancer@gmail.com>14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller18 IP-blocks or to groups of blocks (clock domains). The transformation is done19 by means of PLLs and gateable/non-gateable dividers embedded into the CCU.23 2) PLLs clocks generators (PLLs) - described in this binding file.[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>6 #define pr_fmt(fmt) "k210-clk: " fmt15 #include <linux/clk-provider.h>18 #include <soc/canaan/k210-sysctl.h>20 #include <dt-bindings/clock/k210-clk.h>312 u32 bwadj; member322 * struct k210_sysclk - sysclk driver data356 pll->id = pllid; in k210_init_pll()357 pll->reg = regs + k210_plls_cfg[pllid].reg; in k210_init_pll()[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */151 /* Mailbox PF->VF PF Accessible Data registers */206 * struct ucd_core_eid_ucode_block_num - Core Eid to Ucode Blk Mapping Registers226 * struct aqm_grp_execmsk_lo - Available AE engines for the group243 * struct aqm_grp_execmsk_hi - Available AE engines for the group260 * struct aqmq_drbl - AQM Queue Doorbell Counter Registers277 * struct aqmq_qsz - AQM Queue Host Queue Size Registers295 * struct aqmq_cmp_thr - AQM Queue Commands Completed Threshold Registers313 * struct aqmq_cmp_cnt - AQM Queue Commands Completed Count Registers337 * struct aqmq_en - AQM Queue Enable Registers[all …]