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/linux-6.12.1/lib/crypto/
Dblake2s-generic.c20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
29 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux-6.12.1/Documentation/userspace-api/media/v4l/
Dsubdev-formats.rst225 :widths: 36 7 3 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
258 - 7
1075 - r\ :sub:`7`
1083 - b\ :sub:`7`
1091 - g\ :sub:`7`
1223 - b\ :sub:`7`
1231 - g\ :sub:`7`
1239 - r\ :sub:`7`
1276 - b\ :sub:`7`
1311 - g\ :sub:`7`
[all …]
Dpixfmt-packed-hsv.rst14 The *saturation* (s) and the *value* (v) are measured in percentage of the
38 - :cspan:`7` Byte 0 in memory
39 - :cspan:`7` Byte 1
40 - :cspan:`7` Byte 2
41 - :cspan:`7` Byte 3
45 - 7
54 - 7
63 - 7
72 - 7
94 - h\ :sub:`7`
[all …]
/linux-6.12.1/crypto/
Dblake2b_generic.c26 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
27 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
28 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
29 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
30 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
31 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
32 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
33 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
34 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
35 { 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
[all …]
/linux-6.12.1/arch/arm/crypto/
Dblake2s-core.S108 // b = ror32(b ^ c, 7);
113 // Execute one round of BLAKE2s by updating the state matrix v[0..15]. v[0..9]
115 // spilling v[8..9], then to v[9..15], then to the message block. r10-r12 and
127 // that they end up as (7, 8) after every round.
132 // (v[0], v[4], v[8], v[12]) and (v[1], v[5], v[9], v[13]).
133 __ldrd r10, r11, sp, 16 // load v[12] and v[13]
140 // (v[2], v[6], v[10], v[14]) and (v[3], v[7], v[11], v[15]).
141 __ldrd r8, r9, sp, 8 // load v[10] and v[11]
142 __ldrd r10, r11, sp, 24 // load v[14] and v[15]
145 str r10, [sp, #24] // store v[14]
[all …]
Dblake2b-neon-core.S53 .byte 3, 4, 5, 6, 7, 0, 1, 2
55 .byte 2, 3, 4, 5, 6, 7, 0, 1
63 // Execute one round of BLAKE2b by updating the state matrix v[0..15] in the
73 // (v[0], v[4], v[8], v[12]), (v[1], v[5], v[9], v[13]),
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
145 // (v[0], v[5], v[10], v[15]), (v[1], v[6], v[11], v[12]),
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
260 vld1.64 {q2-q3}, [ip]! // Load h[4..7]
266 vld1.64 {q6-q7}, [r10] // Load IV[4..7]
274 // 'v'. Fortunately, there are exactly enough NEON registers to fit the
[all …]
/linux-6.12.1/drivers/gpu/drm/exynos/
Dregs-scaler.h56 * 1 70 74 78 7c 150 154 158 15c
62 * 7 d0 d4 d8 dc 1b0 1b4 1b8 1bc
76 * 7 128 12c 208 20c
166 #define SCALER_INT_EN_ILLEGAL_SRC_YH_POS (1 << 7)
194 #define SCALER_INT_STATUS_ILLEGAL_SRC_YH_POS (1 << 7)
206 #define SCALER_SRC_CFG_SET_BYTE_SWAP(v) SCALER_SET(v, 6, 5) argument
208 #define SCALER_SRC_CFG_SET_COLOR_FORMAT(v) SCALER_SET(v, 4, 0) argument
215 #define SCALER_ARGB8888_PRE 7
232 #define SCALER_SRC_SPAN_SET_C_SPAN(v) SCALER_SET(v, 29, 16) argument
234 #define SCALER_SRC_SPAN_SET_Y_SPAN(v) SCALER_SET(v, 13, 0) argument
[all …]
/linux-6.12.1/tools/perf/util/arm-spe-decoder/
Darm-spe-pkt-decoder.h44 #define SPE_HEADER0_MASK1 (GENMASK_ULL(7, 6) | GENMASK_ULL(3, 0))
48 #define SPE_HEADER0_MASK2 GENMASK_ULL(7, 2)
54 #define SPE_HEADER0_MASK3 GENMASK_ULL(7, 3)
72 #define SPE_ADDR_PKT_ADDR_GET_BYTES_0_6(v) ((v) & GENMASK_ULL(55, 0)) argument
73 #define SPE_ADDR_PKT_ADDR_GET_BYTE_6(v) (((v) & GENMASK_ULL(55, 48)) >> 48) argument
75 #define SPE_ADDR_PKT_GET_NS(v) (((v) & BIT_ULL(63)) >> 63) argument
76 #define SPE_ADDR_PKT_GET_EL(v) (((v) & GENMASK_ULL(62, 61)) >> 61) argument
77 #define SPE_ADDR_PKT_GET_CH(v) (((v) & BIT_ULL(62)) >> 62) argument
78 #define SPE_ADDR_PKT_GET_PAT(v) (((v) & GENMASK_ULL(59, 56)) >> 56) argument
102 EV_MISPRED = 7,
[all …]
/linux-6.12.1/drivers/staging/media/sunxi/cedrus/
Dcedrus_regs.h13 #define SHIFT_AND_MASK_BITS(v, h, l) \ argument
14 (((unsigned long)(v) << (l)) & GENMASK(h, l))
104 #define VE_DEC_MPEG_MP12HDR_TOP_FIELD_FIRST(v) \ argument
105 ((v) ? BIT(7) : 0)
106 #define VE_DEC_MPEG_MP12HDR_FRAME_PRED_FRAME_DCT(v) \ argument
107 ((v) ? BIT(6) : 0)
108 #define VE_DEC_MPEG_MP12HDR_CONCEALMENT_MOTION_VECTORS(v) \ argument
109 ((v) ? BIT(5) : 0)
110 #define VE_DEC_MPEG_MP12HDR_Q_SCALE_TYPE(v) \ argument
111 ((v) ? BIT(4) : 0)
[all …]
/linux-6.12.1/drivers/staging/media/sunxi/sun6i-isp/
Dsun6i_isp_reg.h21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
32 #define SUN6I_ISP_FE_CTRL_DISC_UPDATE BIT(7)
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
44 #define SUN6I_ISP_FE_INT_EN_LINE_NUM_START BIT(7)
55 #define SUN6I_ISP_FE_INT_STA_LINE_NUM_START BIT(7)
84 #define SUN6I_ISP_MODULE_EN_WB BIT(7)
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
[all …]
/linux-6.12.1/drivers/iio/adc/
Dstm32-dfsdm.h37 * | 0x7F0-7FC | Identification registers |
52 #define DFSDM_CHCFGR1_SITP(v) FIELD_PREP(DFSDM_CHCFGR1_SITP_MASK, v) argument
54 #define DFSDM_CHCFGR1_SPICKSEL(v) FIELD_PREP(DFSDM_CHCFGR1_SPICKSEL_MASK, v) argument
56 #define DFSDM_CHCFGR1_SCDEN(v) FIELD_PREP(DFSDM_CHCFGR1_SCDEN_MASK, v) argument
58 #define DFSDM_CHCFGR1_CKABEN(v) FIELD_PREP(DFSDM_CHCFGR1_CKABEN_MASK, v) argument
59 #define DFSDM_CHCFGR1_CHEN_MASK BIT(7)
60 #define DFSDM_CHCFGR1_CHEN(v) FIELD_PREP(DFSDM_CHCFGR1_CHEN_MASK, v) argument
62 #define DFSDM_CHCFGR1_CHINSEL(v) FIELD_PREP(DFSDM_CHCFGR1_CHINSEL_MASK, v) argument
64 #define DFSDM_CHCFGR1_DATMPX(v) FIELD_PREP(DFSDM_CHCFGR1_DATMPX_MASK, v) argument
66 #define DFSDM_CHCFGR1_DATPACK(v) FIELD_PREP(DFSDM_CHCFGR1_DATPACK_MASK, v) argument
[all …]
/linux-6.12.1/drivers/media/platform/sunxi/sun6i-csi/
Dsun6i_csi_reg.h18 #define SUN6I_CSI_EN_PTN_CYCLE(v) (((v) << 16) & GENMASK(23, 16)) argument
29 #define SUN6I_CSI_IF_CFG_FIELD_DT_PCLK_SHIFT(v) (((v) << 24) & GENMASK(27, 24)) argument
49 #define SUN6I_CSI_IF_CFG_IF_CSI (0 << 7)
50 #define SUN6I_CSI_IF_CFG_IF_MIPI (1 << 7)
57 #define SUN6I_CSI_CAP_MASK(v) (((v) << 2) & GENMASK(5, 2)) argument
70 #define SUN6I_CSI_CH_CFG_PAD_VAL(v) (((v) << 24) & GENMASK(31, 24)) argument
71 #define SUN6I_CSI_CH_CFG_INPUT_FMT(v) (((v) << 20) & GENMASK(23, 20)) argument
72 #define SUN6I_CSI_CH_CFG_OUTPUT_FMT(v) (((v) << 16) & GENMASK(19, 16)) argument
78 #define SUN6I_CSI_CH_CFG_INPUT_YUV_SEQ(v) (((v) << 8) & GENMASK(9, 8)) argument
108 #define SUN6I_CSI_OUTPUT_FMT_FIELD_YUV422SP 7
[all …]
/linux-6.12.1/lib/raid6/
Dmktables.c23 uint8_t v = 0; in gfmul() local
27 v ^= a; in gfmul()
32 return v; in gfmul()
37 uint8_t v = 1; in gfpow() local
45 v = gfmul(v, a); in gfpow()
50 return v; in gfpow()
56 uint8_t v; in main() local
74 (k == 7) ? '\n' : ' '); in main()
93 (k == 7) ? '\n' : ' '); in main()
99 (k == 7) ? '\n' : ' '); in main()
[all …]
/linux-6.12.1/drivers/media/i2c/
Dov8865.c35 #define OV8865_PLL_CTRL0_PRE_DIV(v) ((v) & GENMASK(2, 0)) argument
37 #define OV8865_PLL_CTRL1_MUL_H(v) (((v) & GENMASK(9, 8)) >> 8) argument
39 #define OV8865_PLL_CTRL2_MUL_L(v) ((v) & GENMASK(7, 0)) argument
41 #define OV8865_PLL_CTRL3_M_DIV(v) (((v) - 1) & GENMASK(3, 0)) argument
43 #define OV8865_PLL_CTRL4_MIPI_DIV(v) ((v) & GENMASK(1, 0)) argument
45 #define OV8865_PLL_CTRL5_SYS_PRE_DIV(v) ((v) & GENMASK(1, 0)) argument
47 #define OV8865_PLL_CTRL6_SYS_DIV(v) (((v) - 1) & BIT(0)) argument
52 #define OV8865_PLL_CTRLA_PRE_DIV_HALF(v) (((v) - 1) & BIT(0)) argument
54 #define OV8865_PLL_CTRLB_PRE_DIV(v) ((v) & GENMASK(2, 0)) argument
56 #define OV8865_PLL_CTRLC_MUL_H(v) (((v) & GENMASK(9, 8)) >> 8) argument
[all …]
Dov5648.c52 #define OV5648_PAD_PK_PD_DATO_EN BIT(7)
64 #define OV5648_MIPI_SC_CTRL0_MIPI_LANES(v) (((v) << 5) & GENMASK(7, 5)) argument
76 #define OV5648_PLL_CTRL0_PLL_CHARGE_PUMP(v) (((v) << 4) & GENMASK(6, 4)) argument
77 #define OV5648_PLL_CTRL0_BITS(v) ((v) & GENMASK(3, 0)) argument
79 #define OV5648_PLL_CTRL1_SYS_DIV(v) (((v) << 4) & GENMASK(7, 4)) argument
80 #define OV5648_PLL_CTRL1_MIPI_DIV(v) ((v) & GENMASK(3, 0)) argument
82 #define OV5648_PLL_MUL(v) ((v) & GENMASK(7, 0)) argument
84 #define OV5648_PLL_DIV_ROOT_DIV(v) ((((v) - 1) << 4) & BIT(4)) argument
85 #define OV5648_PLL_DIV_PLL_PRE_DIV(v) ((v) & GENMASK(3, 0)) argument
91 #define OV5648_PLLS_MUL(v) ((v) & GENMASK(4, 0)) argument
[all …]
/linux-6.12.1/sound/ppc/
Dsnd_ps3_reg.h72 31 24 23 16 15 8 7 0
80 #define PS3_AUDIO_INTR_0_CHAN7 PS3_AUDIO_INTR_0_CHAN(7)
95 31 24 23 16 15 8 7 0
105 31 24 23 16 15 8 7 0
124 31 24 23 16 15 8 7 0
154 31 24 23 16 15 8 7 0
184 31 24 23 16 15 8 7 0
206 #define PS3_AUDIO_AX_AOBP_ASOBWN_MASK(n) (0x7 << 4 * (7 - (n))) /* R-IUF */
224 31 24 23 16 15 8 7 0
235 #define PS3_AUDIO_AX_IC_AASOIMD_EVERY1 (0x0 << 12) /* RWI-V */
[all …]
/linux-6.12.1/drivers/media/platform/verisilicon/
Drockchip_vpu2_hw_h264_dec.c28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/dac/
Dadi,ltc2664.yaml14 Analog Devices LTC2664 4 channel, 12-/16-Bit, +-10V DAC
31 v-pos-supply:
34 v-neg-supply:
61 0 - MPS2=GND, MPS1=GND, MSP0=GND (+-10V, reset to 0V)
62 1 - MPS2=GND, MPS1=GND, MSP0=VCC (+-5V, reset to 0V)
63 2 - MPS2=GND, MPS1=VCC, MSP0=GND (+-2.5V, reset to 0V)
64 3 - MPS2=GND, MPS1=VCC, MSP0=VCC (0V to 10, reset to 0V)
65 4 - MPS2=VCC, MPS1=GND, MSP0=GND (0V to 10V, reset to 5V)
66 5 - MPS2=VCC, MPS1=GND, MSP0=VCC (0V to 5V, reset to 0V)
67 6 - MPS2=VCC, MPS1=VCC, MSP0=GND (0V to 5V, reset to 2.5V)
[all …]
/linux-6.12.1/arch/alpha/kernel/
Dentry.S70 stq $7, 56($sp)
88 .cfi_rel_offset $7, 56
112 ldq $7, 56($sp)
137 .cfi_restore $7
267 stq $7, 56($sp)
295 .cfi_rel_offset $7, 7*8
326 ldq $7, 56($sp)
354 .cfi_restore $7
494 lda $16, 7
510 lda $16, 7
[all …]
/linux-6.12.1/drivers/media/usb/dvb-usb/
Dvp702x.h21 * request: 0xB2; i: 0; v: 0; b[0] = 0, b[1] = subcmd, additional buffer
23 * request: 0xB3; i: 0; v: 0; b[0] = 0xB3, additional buffer */
27 * 0 1 2 3 4 5 6 7 8
32 * 0 1 2 3 4 5 6 7 8
33 * N/A 'U' 'S' 'B' '7' '0' '2' 'X' N/A */
54 * 0 1 2 3 4 5 6 7 8
62 /* request: 0xB2; i: 0; v: 0;
64 * 0 1 2 3 4 5 6 7
70 /* IN i: 0; v: 0; b[0] == request, b[1] == key */
73 /* IN i: 0; v: 0; b[0] == request, b[1] == 0, b[2] = pid number */
[all …]
/linux-6.12.1/drivers/media/platform/sunxi/sun8i-di/
Dsun8i-di.h43 #define DEINTERLACE_FIELD_CTRL_FIELD_CNT(v) ((v) & 0xff) argument
55 #define DEINTERLACE_IN_FMT_PS(v) ((v) & 3) argument
56 #define DEINTERLACE_IN_FMT_FMT(v) (((v) & 7) << 4) argument
57 #define DEINTERLACE_IN_FMT_MOD(v) (((v) & 7) << 8) argument
64 #define DEINTERLACE_OUT_FMT_FMT(v) ((v) & 0xf) argument
65 #define DEINTERLACE_OUT_FMT_PS(v) (((v) & 3) << 5) argument
68 #define DEINTERLACE_INT_ENABLE_WB_EN BIT(7)
71 #define DEINTERLACE_INT_STATUS_WRITEBACK BIT(7)
90 #define DEINTERLACE_DIAG_INTP_TH0(v) ((v) & 0x7f) argument
92 #define DEINTERLACE_DIAG_INTP_TH1(v) (((v) & 0x7f) << 8) argument
[all …]
/linux-6.12.1/sound/soc/qcom/
Dlpass-sc7280.c113 const struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel() local
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
126 v->wrdma_channel_start + in sc7280_lpass_alloc_dma_channel()
127 v->wrdma_channels, in sc7280_lpass_alloc_dma_channel()
128 v->wrdma_channel_start); in sc7280_lpass_alloc_dma_channel()
130 if (chan >= v->wrdma_channel_start + v->wrdma_channels) in sc7280_lpass_alloc_dma_channel()
137 v->hdmi_rdma_channels); in sc7280_lpass_alloc_dma_channel()
138 if (chan >= v->hdmi_rdma_channels) in sc7280_lpass_alloc_dma_channel()
144 v->rxtx_rdma_channels); in sc7280_lpass_alloc_dma_channel()
[all …]
/linux-6.12.1/lib/
Dbitfield_kunit.c11 #define CHECK_ENC_GET_U(tp, v, field, res) do { \ argument
15 _res = u##tp##_encode_bits(v, field); \
17 "u" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != " #res "\n", \
20 u##tp##_get_bits(_res, field) != v); \
24 #define CHECK_ENC_GET_LE(tp, v, field, res) do { \ argument
28 _res = le##tp##_encode_bits(v, field); \
31 "le" #tp "_encode_bits(" #v ", " #field ") is 0x%llx != 0x%llx",\
35 le##tp##_get_bits(_res, field) != v);\
39 #define CHECK_ENC_GET_BE(tp, v, field, res) do { \ argument
43 _res = be##tp##_encode_bits(v, field); \
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Dti,ts3a227e.yaml32 description: Intended MICBIAS voltage (datasheet section 9.6.7).
34 - 0 # 2.1 V
35 - 1 # 2.2 V
36 - 2 # 2.3 V
37 - 3 # 2.4 V
38 - 4 # 2.5 V
39 - 5 # 2.6 V
40 - 6 # 2.7 V
41 - 7 # 2.8 V
45 description: key release debounce time in ms (datasheet section 9.6.7).
[all …]
/linux-6.12.1/include/uapi/linux/
Dv4l2-subdev.h43 __u32 reserved[7];
63 __u32 reserved[7];
115 __u32 reserved[7];
131 __u32 reserved[7];
155 __u32 reserved[7];
181 __u32 reserved[7];
274 #define VIDIOC_SUBDEV_QUERYCAP _IOR('V', 0, struct v4l2_subdev_capability)
275 #define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format)
276 #define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format)
277 #define VIDIOC_SUBDEV_G_FRAME_INTERVAL _IOWR('V', 21, struct v4l2_subdev_frame_interval)
[all …]

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