Lines Matching +full:7 +full:v
35 #define OV8865_PLL_CTRL0_PRE_DIV(v) ((v) & GENMASK(2, 0)) argument
37 #define OV8865_PLL_CTRL1_MUL_H(v) (((v) & GENMASK(9, 8)) >> 8) argument
39 #define OV8865_PLL_CTRL2_MUL_L(v) ((v) & GENMASK(7, 0)) argument
41 #define OV8865_PLL_CTRL3_M_DIV(v) (((v) - 1) & GENMASK(3, 0)) argument
43 #define OV8865_PLL_CTRL4_MIPI_DIV(v) ((v) & GENMASK(1, 0)) argument
45 #define OV8865_PLL_CTRL5_SYS_PRE_DIV(v) ((v) & GENMASK(1, 0)) argument
47 #define OV8865_PLL_CTRL6_SYS_DIV(v) (((v) - 1) & BIT(0)) argument
52 #define OV8865_PLL_CTRLA_PRE_DIV_HALF(v) (((v) - 1) & BIT(0)) argument
54 #define OV8865_PLL_CTRLB_PRE_DIV(v) ((v) & GENMASK(2, 0)) argument
56 #define OV8865_PLL_CTRLC_MUL_H(v) (((v) & GENMASK(9, 8)) >> 8) argument
58 #define OV8865_PLL_CTRLD_MUL_L(v) ((v) & GENMASK(7, 0)) argument
60 #define OV8865_PLL_CTRLE_SYS_DIV(v) ((v) & GENMASK(2, 0)) argument
62 #define OV8865_PLL_CTRLF_SYS_PRE_DIV(v) (((v) - 1) & GENMASK(3, 0)) argument
66 #define OV8865_PLL_CTRL12_PRE_DIV_HALF(v) ((((v) - 1) << 4) & BIT(4)) argument
67 #define OV8865_PLL_CTRL12_DAC_DIV(v) (((v) - 1) & GENMASK(3, 0)) argument
97 #define OV8865_PUMP_CLK_DIV_PUMP_N(v) (((v) << 4) & GENMASK(6, 4)) argument
98 #define OV8865_PUMP_CLK_DIV_PUMP_P(v) ((v) & GENMASK(2, 0)) argument
101 #define OV8865_MIPI_SC_CTRL0_LANES(v) ((((v) - 1) << 5) & \ argument
102 GENMASK(7, 5))
115 #define OV8865_PCLK_SEL_PCLK_DIV(v) ((((v) - 1) << 3) & BIT(3)) argument
123 #define OV8865_MIPI_BIT_SEL(v) (((v) << 0) & GENMASK(4, 0)) argument
125 #define OV8865_CLK_SEL0_PLL1_SYS_SEL(v) (((v) << 7) & BIT(7)) argument
130 #define OV8865_CLK_SEL1_PLL_SCLK_SEL(v) (((v) << 1) & BIT(1)) argument
133 #define OV8865_SCLK_CTRL_SCLK_DIV(v) (((v) << 4) & GENMASK(7, 4)) argument
134 #define OV8865_SCLK_CTRL_SCLK_PRE_DIV(v) (((v) << 2) & GENMASK(3, 2)) argument
140 #define OV8865_EXPOSURE_CTRL_HH(v) (((v) & GENMASK(19, 16)) >> 16) argument
142 #define OV8865_EXPOSURE_CTRL_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
144 #define OV8865_EXPOSURE_CTRL_L(v) ((v) & GENMASK(7, 0)) argument
149 #define OV8865_GAIN_CTRL_H(v) (((v) & GENMASK(12, 8)) >> 8) argument
151 #define OV8865_GAIN_CTRL_L(v) ((v) & GENMASK(7, 0)) argument
156 #define OV8865_CROP_START_X_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
158 #define OV8865_CROP_START_X_L(v) ((v) & GENMASK(7, 0)) argument
160 #define OV8865_CROP_START_Y_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
162 #define OV8865_CROP_START_Y_L(v) ((v) & GENMASK(7, 0)) argument
164 #define OV8865_CROP_END_X_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
166 #define OV8865_CROP_END_X_L(v) ((v) & GENMASK(7, 0)) argument
168 #define OV8865_CROP_END_Y_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
170 #define OV8865_CROP_END_Y_L(v) ((v) & GENMASK(7, 0)) argument
172 #define OV8865_OUTPUT_SIZE_X_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
174 #define OV8865_OUTPUT_SIZE_X_L(v) ((v) & GENMASK(7, 0)) argument
176 #define OV8865_OUTPUT_SIZE_Y_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
178 #define OV8865_OUTPUT_SIZE_Y_L(v) ((v) & GENMASK(7, 0)) argument
180 #define OV8865_HTS_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
182 #define OV8865_HTS_L(v) ((v) & GENMASK(7, 0)) argument
184 #define OV8865_VTS_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
186 #define OV8865_VTS_L(v) ((v) & GENMASK(7, 0)) argument
190 #define OV8865_OFFSET_X_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
192 #define OV8865_OFFSET_X_L(v) ((v) & GENMASK(7, 0)) argument
194 #define OV8865_OFFSET_Y_H(v) (((v) & GENMASK(14, 8)) >> 8) argument
196 #define OV8865_OFFSET_Y_L(v) ((v) & GENMASK(7, 0)) argument
198 #define OV8865_INC_X_ODD(v) ((v) & GENMASK(4, 0)) argument
200 #define OV8865_INC_X_EVEN(v) ((v) & GENMASK(4, 0)) argument
202 #define OV8865_VSYNC_START_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
204 #define OV8865_VSYNC_START_L(v) ((v) & GENMASK(7, 0)) argument
206 #define OV8865_VSYNC_END_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
208 #define OV8865_VSYNC_END_L(v) ((v) & GENMASK(7, 0)) argument
210 #define OV8865_HSYNC_FIRST_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
212 #define OV8865_HSYNC_FIRST_L(v) ((v) & GENMASK(7, 0)) argument
227 #define OV8865_INC_Y_ODD(v) ((v) & GENMASK(4, 0)) argument
229 #define OV8865_INC_Y_EVEN(v) ((v) & GENMASK(4, 0)) argument
232 #define OV8865_ABLC_NUM(v) ((v) & GENMASK(4, 0)) argument
235 #define OV8865_ZLINE_NUM(v) ((v) & GENMASK(4, 0)) argument
249 #define OV8865_AUTO_SIZE_BOUNDARIES_Y(v) (((v) << 4) & GENMASK(7, 4)) argument
250 #define OV8865_AUTO_SIZE_BOUNDARIES_X(v) ((v) & GENMASK(3, 0)) argument
259 #define OV8865_BLC_CTRL0_TRIG_RANGE_EN BIT(7)
268 #define OV8865_BLC_CTRL1_DITHER_EN BIT(7)
288 #define OV8865_BLC_CTRLD_OFFSET_TRIGGER(v) ((v) & GENMASK(7, 0)) argument
296 #define OV8865_BLC_ANCHOR_LEFT_START_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
298 #define OV8865_BLC_ANCHOR_LEFT_START_L(v) ((v) & GENMASK(7, 0)) argument
300 #define OV8865_BLC_ANCHOR_LEFT_END_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
302 #define OV8865_BLC_ANCHOR_LEFT_END_L(v) ((v) & GENMASK(7, 0)) argument
304 #define OV8865_BLC_ANCHOR_RIGHT_START_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
306 #define OV8865_BLC_ANCHOR_RIGHT_START_L(v) ((v) & GENMASK(7, 0)) argument
308 #define OV8865_BLC_ANCHOR_RIGHT_END_H(v) (((v) & GENMASK(11, 8)) >> 8) argument
310 #define OV8865_BLC_ANCHOR_RIGHT_END_L(v) ((v) & GENMASK(7, 0)) argument
313 #define OV8865_BLC_TOP_ZLINE_START(v) ((v) & GENMASK(5, 0)) argument
315 #define OV8865_BLC_TOP_ZLINE_NUM(v) ((v) & GENMASK(4, 0)) argument
317 #define OV8865_BLC_TOP_BLKLINE_START(v) ((v) & GENMASK(5, 0)) argument
319 #define OV8865_BLC_TOP_BLKLINE_NUM(v) ((v) & GENMASK(4, 0)) argument
321 #define OV8865_BLC_BOT_ZLINE_START(v) ((v) & GENMASK(5, 0)) argument
323 #define OV8865_BLC_BOT_ZLINE_NUM(v) ((v) & GENMASK(4, 0)) argument
325 #define OV8865_BLC_BOT_BLKLINE_START(v) ((v) & GENMASK(5, 0)) argument
327 #define OV8865_BLC_BOT_BLKLINE_NUM(v) ((v) & GENMASK(4, 0)) argument
330 #define OV8865_BLC_OFFSET_LIMIT(v) ((v) & GENMASK(7, 0)) argument
335 #define OV8865_VFIFO_READ_START_H(v) (((v) & GENMASK(15, 8)) >> 8) argument
337 #define OV8865_VFIFO_READ_START_L(v) ((v) & GENMASK(7, 0)) argument
402 #define OV8865_MIPI_LANE_SEL01_LANE0(v) (((v) << 0) & GENMASK(2, 0)) argument
403 #define OV8865_MIPI_LANE_SEL01_LANE1(v) (((v) << 4) & GENMASK(6, 4)) argument
405 #define OV8865_MIPI_LANE_SEL23_LANE2(v) (((v) << 0) & GENMASK(2, 0)) argument
406 #define OV8865_MIPI_LANE_SEL23_LANE3(v) (((v) << 4) & GENMASK(6, 4)) argument
411 #define OV8865_ISP_CTRL0_LENC_EN BIT(7)
424 #define OV8865_ISP_GAIN_RED_H(v) (((v) & GENMASK(13, 6)) >> 6) argument
426 #define OV8865_ISP_GAIN_RED_L(v) ((v) & GENMASK(5, 0)) argument
428 #define OV8865_ISP_GAIN_GREEN_H(v) (((v) & GENMASK(13, 6)) >> 6) argument
430 #define OV8865_ISP_GAIN_GREEN_L(v) ((v) & GENMASK(5, 0)) argument
432 #define OV8865_ISP_GAIN_BLUE_H(v) (((v) & GENMASK(13, 6)) >> 6) argument
434 #define OV8865_ISP_GAIN_BLUE_L(v) ((v) & GENMASK(5, 0)) argument
440 #define OV8865_VAP_CTRL1_HSUB_COEF(v) ((((v) - 1) << 2) & \ argument
442 #define OV8865_VAP_CTRL1_VSUB_COEF(v) (((v) - 1) & GENMASK(1, 0)) argument
447 #define OV8865_PRE_CTRL0_PATTERN_EN BIT(7)
490 * | 0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 4, 7: 8)
491 * +-+ pll_mul (0x301 [1:0], 0x302 [7:0])
507 * +-+ sys_sel (0x3032 [7], 0: PLL1, 1: PLL2)
514 * +-+ sclk_div (0x3106 [7:4], special values: 0: 1)
538 * | 0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 4, 7: 8)
539 * +-+ pll_mul (0x30c [1:0], 0x30d [7:0])
548 * | 0: 1, 1: 1.5, 3: 2.5, 4: 3, 5: 3.5, 6: 4, 7:5)
550 * +-+ sys_sel (0x3032 [7], 0: PLL1, 1: PLL2)
557 * +-+ sclk_div (0x3106 [7:4], special values: 0: 1)
1592 case 7: in ov8865_mode_pll1_rate()