| /linux-6.12.1/drivers/ata/pata_parport/ |
| D | kbic.c | 5 * This is a low-level driver for the KBIC-951A and KBIC-971A
9 * required for the 971A interferes with the correct operation of
10 * the 951A, so this driver registers itself twice, once for
25 #define j44(a, b) ((((a >> 4) & 0x0f) | (b & 0xf0)) ^ 0x88) argument
26 #define j53(w) (((w >> 3) & 0x1f) | ((w >> 4) & 0xe0))
37 int a, b, s; in kbic_read_regr() local
43 w0(regr | 0x18 | s); w2(4); w2(6); w2(4); w2(1); w0(8); in kbic_read_regr()
44 a = r1(); w0(0x28); b = r1(); w2(4); in kbic_read_regr()
45 return j44(a, b); in kbic_read_regr()
47 w0(regr|0x38 | s); w2(4); w2(6); w2(4); w2(5); w0(8); in kbic_read_regr()
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| D | epat.c | 20 #define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0)) argument
21 #define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0)) argument
45 w0(0x60+r); w2(1); w0(val); w2(4); in epat_write_regr()
48 case 4: in epat_write_regr()
57 int a, b, r; in epat_read_regr() local
65 a = r1(); w2(4); b = r1(); in epat_read_regr()
66 return j44(a, b); in epat_read_regr()
68 w0(0x40+r); w2(1); w2(4); in epat_read_regr()
69 a = r1(); b = r2(); w0(0xff); in epat_read_regr()
70 return j53(a, b); in epat_read_regr()
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| D | dstr.c | 5 * dstr.c is a low-level protocol driver for the DataStor EP2000 parallel
23 * 4 EPP-32
26 #define j44(a, b) (((a >> 3) & 0x07) | ((~a >> 4) & 0x08) | \ argument
29 #define P1 w2(5);w2(0xd);w2(5);w2(4);
30 #define P2 w2(5);w2(7);w2(5);w2(4);
31 #define P3 w2(6);w2(4);w2(6);w2(4);
41 int a, b, r; in dstr_read_regr() local
54 w2(6); a = r1(); w2(4); w2(6); b = r1(); w2(4); in dstr_read_regr()
55 return j44(a, b); in dstr_read_regr()
57 w0(0); w2(0x26); a = r0(); w2(4); in dstr_read_regr()
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| /linux-6.12.1/arch/x86/crypto/ |
| D | twofish-x86_64-asm_64.S | 14 #define b_offset 4
27 /* define a few register aliases to allow macro substitution */
60 * a input register containing a (rotated 16)
64 * operations on a and b are interleaved to increase performance
66 #define encrypt_round(a,b,c,d,round)\ argument
68 mov s1(%r11,%rdi,4),%r8d;\
69 movzx a ## B, %edi;\
70 mov s2(%r11,%rdi,4),%r9d;\
73 xor s2(%r11,%rdi,4),%r8d;\
74 movzx a ## H, %edi;\
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| D | twofish-i586-asm_32.S | 17 #define ctx 4 /* Twofish context structure */
20 #define b_offset 4
33 /* define a few register aliases to allow macro substitution */
61 * a input register containing a (rotated 16)
65 * operations on a and b are interleaved to increase performance
67 #define encrypt_round(a,b,c,d,round)\ argument
70 mov s1(%ebp,%edi,4),d ## D;\
71 movzx a ## B, %edi;\
72 mov s2(%ebp,%edi,4),%esi;\
75 xor s2(%ebp,%edi,4),d ## D;\
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| D | sha256-avx2-asm.S | 11 # This software is available to you under a choice of one of two
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
48 # This code schedules 2 blocks at a time, with 4 lanes per block
103 a = %eax define
116 _XFER_SIZE = 2*64*4 # 2 blocks, 64 rounds, 4 bytes/round
140 # Rotate values of symbols a...h
150 b = a
151 a = TMP_ define
157 mov a, y3 # y3 = a # MAJA
162 or c, y3 # y3 = a|c # MAJA
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/meteorlake/ |
| D | virtual-memory.json | 3 …s but second level hits due to a demand load that did not start a page walk. Accounts for all page…
4 "Counter": "0,1,2,3,4,5,6,7",
22 … "BriefDescription": "Cycles when at least one PMH is busy with a page walk for a demand load.",
27 …ounts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a demand load.…
34 "Counter": "0,1,2,3,4,5,6,7",
42 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
46 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
52 "BriefDescription": "Page walks completed due to a demand data load to a 1G page.",
56 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
62 …cription": "Counts the number of page walks completed due to load DTLB misses to a 2M or 4M page.",
[all …]
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| /linux-6.12.1/Documentation/userspace-api/media/v4l/ |
| D | pixfmt-rgb.rst | 9 These formats encode each pixel as a triplet of RGB values. They are packed
12 bits required to store a pixel is not aligned to a byte boundary, the data is
20 or a permutation thereof, collectively referred to as alpha formats) depend on
24 a meaningful value. Otherwise, when the device doesn't capture an alpha channel
25 but can set the alpha bit to a user-configurable value, the
28 the value specified by that control. Otherwise a corresponding format without
34 filled with meaningful values by applications. Otherwise a corresponding format
38 Formats that contain padding bits are named XRGB (or a permutation thereof).
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
46 respectively. 'a' denotes bits of the alpha component (if supported by the
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| D | pixfmt-packed-yuv.rst | 15 - In all the tables that follow, bit 7 is the most significant bit in a byte.
17 'U') and red chroma (also known as 'V') components respectively. 'A'
22 4:4:4 Subsampling
25 These formats do not subsample the chroma components and store each pixels as a
28 The next table lists the packed YUV 4:4:4 formats with less than 8 bits per
30 seen in a 16-bit word, which is then stored in memory in little endian byte
32 format stores a pixel in a 16-bit word [15:0] laid out at as [Y'\ :sub:`4-0`
33 Cb\ :sub:`5-0` Cr\ :sub:`4-0`], and stored in memory in two bytes,
34 [Cb\ :sub:`2-0` Cr\ :sub:`4-0`] followed by [Y'\ :sub:`4-0` Cb\ :sub:`5-3`].
44 .. flat-table:: Packed YUV 4:4:4 Image Formats (less than 8bpc)
[all …]
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| /linux-6.12.1/include/uapi/drm/ |
| D | drm_fourcc.h | 4 * Permission is hereby granted, free of charge, to any person obtaining a
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
38 * fourcc code, a Format Modifier may optionally be provided, in order to
44 * Format modifiers are used in conjunction with a fourcc code, forming a
56 * vendor-namespaced, and as such the relationship between a fourcc code and a
61 * Modifiers must uniquely encode buffer layout. In other words, a buffer must
62 * match only a single modifier. A modifier must not be a subset of layouts of
64 * a modifier: a buffer may match a 64-pixel aligned modifier and a 32-pixel
69 * a canonical pair needs to be defined and used by all drivers. Preferred
105 #define fourcc_code(a, b, c, d) ((__u32)(a) | ((__u32)(b) << 8) | \ argument
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| /linux-6.12.1/drivers/net/ethernet/sfc/ |
| D | mcdi_pcol.h | 19 #define MC_FW_STATE_BOOTING (4)
24 * Unlike a warm boot, assume DMEM has been reloaded, so that
51 /* Check whether an mcfw version (in host order) belongs to a bootloader */
65 * Each MCDI request starts with an MCDI_HEADER, which is a 32bit
87 * The protocol requires one response to be delivered for every request, a
102 #define MCDI_HEADER_SEQ_WIDTH 4
126 * - To advance a shared memory request if XFLAGS_EVREQ was set
127 * - As a notification (link state, i2c event), controlled
130 * Both events share a common structure:
148 * Events can be squirted out of the UART (using LOG_CTRL) without a
[all …]
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/grandridge/ |
| D | virtual-memory.json | 3 …s but second level hits due to a demand load that did not start a page walk. Accounts for all page…
4 "Counter": "0,1,2,3,4,5,6,7",
12 "Counter": "0,1,2,3,4,5,6,7",
19 …cription": "Counts the number of page walks completed due to load DTLB misses to a 2M or 4M page.",
20 "Counter": "0,1,2,3,4,5,6,7",
23 …d in all Translation Lookaside Buffer (TLB) levels and were mapped to 2M or 4M pages. Includes pag…
28 …iefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K page.",
29 "Counter": "0,1,2,3,4,5,6,7",
32 … missed in all Translation Lookaside Buffer (TLB) levels and were mapped to 4K pages. Includes pag…
38 "Counter": "0,1,2,3,4,5,6,7",
[all …]
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/sierraforest/ |
| D | virtual-memory.json | 3 …s but second level hits due to a demand load that did not start a page walk. Accounts for all page…
4 "Counter": "0,1,2,3,4,5,6,7",
12 "Counter": "0,1,2,3,4,5,6,7",
19 …cription": "Counts the number of page walks completed due to load DTLB misses to a 2M or 4M page.",
20 "Counter": "0,1,2,3,4,5,6,7",
23 …d in all Translation Lookaside Buffer (TLB) levels and were mapped to 2M or 4M pages. Includes pag…
28 …iefDescription": "Counts the number of page walks completed due to load DTLB misses to a 4K page.",
29 "Counter": "0,1,2,3,4,5,6,7",
32 … missed in all Translation Lookaside Buffer (TLB) levels and were mapped to 4K pages. Includes pag…
38 "Counter": "0,1,2,3,4,5,6,7",
[all …]
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| /linux-6.12.1/drivers/staging/greybus/Documentation/ |
| D | sysfs-bus-greybus | 3 KernelVersion: 4.XX
7 where N is a dynamically assigned 1-based id.
11 KernelVersion: 4.XX
18 KernelVersion: 4.XX
21 A Module M on the bus N, where M is the 1-byte interface
26 KernelVersion: 4.XX
29 Writing a non-zero argument to this attibute disables the
34 KernelVersion: 4.XX
37 The ID of a Greybus module, corresponding to the ID of its
42 KernelVersion: 4.XX
[all …]
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| /linux-6.12.1/Documentation/input/devices/ |
| D | elantech.rst | 18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
33 7. Hardware version 4
39 8. Trackpoint (for Hardware version 3 and 4)
51 and version 4. Version 1 is found in "older" laptops and uses 4 bytes per
56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
57 combine a status packet with multiple head or motion packets. Hardware version
58 4 allows tracking up to 5 fingers.
60 Some Hardware version 3 and version 4 also have a trackpoint which uses a
[all …]
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| /linux-6.12.1/drivers/net/wireguard/selftest/ |
| D | allowedips.c | 3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
8 * DEBUG_PRINT_TRIE_GRAPHVIZ to be 1, then every time there's a full tree in
9 * memory, it will be printed out as KERN_DEBUG in a format that can be passed
12 * randomized tests done against a trivial implementation, which may take
13 * upwards of a half-hour to complete. There's no set of users who should be
127 if (node->ip_version == 4) { in horrible_mask_self()
190 node->ip_version = 4; in horrible_allowedips_insert_v4()
220 if (node->ip_version == 4 && horrible_match_v4(node, ip)) in horrible_allowedips_lookup_v4()
287 get_random_bytes(ip, 4); in randomized_test()
301 memcpy(mutated, ip, 4); in randomized_test()
[all …]
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/skylake/ |
| D | virtual-memory.json | 7 …PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/1…
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and fu…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | virtual-memory.json | 7 …PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/1…
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and fu…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | virtual-memory.json | 7 …PublicDescription": "Counts demand data loads that caused a page walk of any page size (4K/2M/4M/1…
21 …"BriefDescription": "Cycles when at least one PMH is busy with a page walk for a load. EPT page wa…
26 …n": "Counts cycles when at least one PMH (Page Miss Handler) is busy with a page walk for a load.",
31 …"BriefDescription": "Load miss in all TLB levels causes a page walk that completes. (All page size…
35 …s it missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
40 "BriefDescription": "Page walk completed due to a demand data load to a 1G page",
44 …ions missed in the DTLB and further levels of TLB. The page walk can end with or without a fault.",
49 "BriefDescription": "Page walk completed due to a demand data load to a 2M/4M page",
53 …4M sizes) caused by demand data loads. This implies address translations missed in the DTLB and fu…
58 "BriefDescription": "Page walk completed due to a demand data load to a 4K page",
[all …]
|
| /linux-6.12.1/drivers/net/ethernet/sfc/siena/ |
| D | mcdi_pcol.h | 19 #define MC_FW_STATE_BOOTING (4)
24 * Unlike a warm boot, assume DMEM has been reloaded, so that
51 /* Check whether an mcfw version (in host order) belongs to a bootloader */
65 * Each MCDI request starts with an MCDI_HEADER, which is a 32bit
87 * The protocol requires one response to be delivered for every request, a
102 #define MCDI_HEADER_SEQ_WIDTH 4
126 * - To advance a shared memory request if XFLAGS_EVREQ was set
127 * - As a notification (link state, i2c event), controlled
130 * Both events share a common structure:
148 * Events can be squirted out of the UART (using LOG_CTRL) without a
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlaken/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3,4,5",
8 … in which the instruction pointer (IP) of the processor is resteered due to a branch instruction a…
13 "Counter": "0,1,2,3,4,5",
23 "Counter": "0,1,2,3,4,5",
32 "Counter": "0,1,2,3,4,5",
41 "Counter": "0,1,2,3,4,5",
50 "Counter": "0,1,2,3,4,5",
59 "Counter": "0,1,2,3,4,5",
68 "Counter": "0,1,2,3,4,5",
78 "Counter": "0,1,2,3,4,5",
[all …]
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| /linux-6.12.1/include/drm/ |
| D | drm_fourcc.h | 30 * DRM_FORMAT_MAX_PLANES - maximum number of planes a DRM format can have
32 #define DRM_FORMAT_MAX_PLANES 4u
60 * struct drm_format_info - information about a DRM format
63 /** @format: 4CC format identifier (DRM_FORMAT_*) */
70 * valid for a subset of RGB formats only. This is a legacy field, do
93 * defined as a rectangle of pixels which are stored next to
94 * each other in a byte aligned memory region. Together with
97 * formats for which the memory needed for a single pixel is not
101 * a lot of places in drivers where it's used. In drm core for
140 /** @is_yuv: Is it a YUV format? */
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| /linux-6.12.1/arch/xtensa/variants/test_mmuhifi_c3/include/variant/ |
| D | tie-asm.h | 18 #define XTHAL_SAS_OPT 0x0002 /* optional (and not a coprocessor) */
39 xchal_sa_align \ptr, 0, 1024-4, 4, 4
42 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
45 xchal_sa_align \ptr, 0, 1024-4, 4, 4
48 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
51 xchal_sa_align \ptr, 0, 1024-4, 4, 4
54 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
66 xchal_sa_align \ptr, 0, 1024-4, 4, 4
69 .set .Lxchal_ofs_, .Lxchal_ofs_ + 4
72 xchal_sa_align \ptr, 0, 1024-4, 4, 4
[all …]
|
| /linux-6.12.1/include/uapi/linux/ |
| D | coff.h | 2 /* This file is derived from the GAS 2.1.4 assembler control file.
9 The actual loader module only uses a few of these structures. The full
11 more information about COFF, then O'Reilly has a very excellent book.
17 #define E_SYMNMLEN 8 /* Number of characters in a symbol name */
18 #define E_FILNMLEN 14 /* Number of characters in a file name */
19 #define E_DIMNUM 4 /* Number of array dimensions in auxiliary entry */
28 /* Load a short int from the following tables with little-endian formats */
32 /* Load a long int from the following tables with little-endian formats */
38 /* Load a short int from the following tables with big-endian formats */
42 /* Load a long int from the following tables with big-endian formats */
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlake/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3,4,5,6,7",
15 "Counter": "0,1,2,3,4,5,6,7",
26 "Counter": "0,1,2,3,4,5,6,7",
37 "Counter": "0,1,2,3,4,5,6,7",
47 "Counter": "0,1,2,3,4,5,6,7",
57 … "BriefDescription": "Number of occurrences where a microcode assist is invoked by hardware.",
58 "Counter": "0,1,2,3,4,5,6,7",
61 …"PublicDescription": "Counts the number of occurrences where a microcode assist is invoked by hard…
68 "Counter": "0,1,2,3,4,5",
72 … in which the instruction pointer (IP) of the processor is resteered due to a branch instruction a…
[all …]
|