Lines Matching +full:4 +full:a
19 #define MC_FW_STATE_BOOTING (4)
24 * Unlike a warm boot, assume DMEM has been reloaded, so that
51 /* Check whether an mcfw version (in host order) belongs to a bootloader */
65 * Each MCDI request starts with an MCDI_HEADER, which is a 32bit
87 * The protocol requires one response to be delivered for every request, a
102 #define MCDI_HEADER_SEQ_WIDTH 4
126 * - To advance a shared memory request if XFLAGS_EVREQ was set
127 * - As a notification (link state, i2c event), controlled
130 * Both events share a common structure:
148 * Events can be squirted out of the UART (using LOG_CTRL) without a
149 * MCDI header. An event can be distinguished from a MCDI response by
173 #define MC_CMD_ERR_EINTR 4
239 /* The requesting client is not a function */
252 * wait for a PROXY_RESPONSE event and then resend its request.
253 * This error code is followed by a 32-bit handle that
256 #define MC_CMD_ERR_PROXY_PENDING_HANDLE_OFST 4
262 * that has enabled proxying or BLOCK_INDEX points to a function that
270 * to a designated admin function for authorization. */
284 * resources to do so. Send it again after a command has completed. */
328 #define MEDFORD_MC_BOOTROM_REAL_NOFLASH_VEC (0x10000 - 4 * 0x4)
356 /* This may be ORed with an EVB_PORT_ID_xxx constant to pass a non-default
366 #define MC_CMD_ERR_ARG_OFST 4
386 #define MCDI_EVENT_DATA_LEN 4
401 #define MCDI_EVENT_LINKCHANGE_SPEED_WIDTH 4
420 #define MCDI_EVENT_LINKCHANGE_FCNTL_WIDTH 4
449 #define MCDI_EVENT_TX_ERR_TYPE_WIDTH 4
458 /* enum: Option descriptor part way through a packet */
579 #define MCDI_EVENT_RX_ERR_TYPE_WIDTH 4
629 #define MCDI_EVENT_LINKCHANGE_V2_SPEED_WIDTH 4
661 #define MCDI_EVENT_EV_CODE_WIDTH 4
707 * a different format)
710 /* enum: the MC has detected a parity error */
712 /* enum: the MC has detected a correctable error */
722 /* enum: notify the designated PF of a new authorization request */
724 /* enum: notify a function that awaits an authorization that its request has
732 /* enum: The MC has detected a fault on the SUC */
740 * a module change.
749 /* enum: Notification that a sensor has changed state as a result of a reading
750 * crossing a threshold. This is sent as two events, the first event contains
755 /* enum: Notification that a descriptor proxy function configuration has been
762 /* enum: Notification that a descriptor proxy function has been reset. SRC
767 /* enum: Notification that a driver attached to a descriptor proxy function.
781 #define MCDI_EVENT_CMDDONE_DATA_LEN 4
785 #define MCDI_EVENT_LINKCHANGE_DATA_LEN 4
789 #define MCDI_EVENT_SENSOREVT_DATA_LEN 4
793 #define MCDI_EVENT_MAC_STATS_DMA_GENERATION_LEN 4
797 #define MCDI_EVENT_TX_ERR_DATA_LEN 4
804 #define MCDI_EVENT_PTP_SECONDS_LEN 4
811 #define MCDI_EVENT_PTP_MAJOR_LEN 4
818 #define MCDI_EVENT_PTP_NANOSECONDS_LEN 4
825 #define MCDI_EVENT_PTP_MINOR_LEN 4
831 #define MCDI_EVENT_PTP_UUID_LEN 4
835 #define MCDI_EVENT_RX_ERR_DATA_LEN 4
839 #define MCDI_EVENT_PAR_ERR_DATA_LEN 4
843 #define MCDI_EVENT_ECC_CORR_ERR_DATA_LEN 4
847 #define MCDI_EVENT_ECC_FATAL_ERR_DATA_LEN 4
852 #define MCDI_EVENT_PTP_TIME_MAJOR_LEN 4
859 * PTP clock. This is a more generic equivalent of PTP_TIME_MINOR_26_19.
879 * PTP clock. This is a more generic equivalent of PTP_TIME_MINOR_26_21.
884 #define MCDI_EVENT_PROXY_REQUEST_BUFF_INDEX_LEN 4
888 #define MCDI_EVENT_PROXY_RESPONSE_HANDLE_LEN 4
892 * should resend it. A non-zero value means that the authorization has been
898 #define MCDI_EVENT_DBRET_DATA_LEN 4
902 #define MCDI_EVENT_LINKCHANGE_V2_DATA_LEN 4
906 #define MCDI_EVENT_MODULECHANGE_DATA_LEN 4
909 /* The new generation count after a sensor has been added or deleted. */
911 #define MCDI_EVENT_DYNAMIC_SENSORS_GENERATION_LEN 4
914 /* The handle of a dynamic sensor. */
916 #define MCDI_EVENT_DYNAMIC_SENSORS_HANDLE_LEN 4
919 /* The current values of a sensor. */
921 #define MCDI_EVENT_DYNAMIC_SENSORS_VALUE_LEN 4
924 /* The current state of a sensor. */
928 #define MCDI_EVENT_DESC_PROXY_DATA_LEN 4
933 #define MCDI_EVENT_DESC_PROXY_GENERATION_LEN 4
940 #define MCDI_EVENT_DESC_PROXY_VIRTIO_FEATURES_LEN 4
959 #define FCDI_EVENT_DATA_LEN 4
970 #define FCDI_EVENT_EV_CODE_WIDTH 4
981 /* enum: A timed read is ready to be serviced. */
1000 #define FCDI_EVENT_ASSERT_INSTR_ADDRESS_LEN 4
1008 #define FCDI_EVENT_DDR_TEST_RESULT_RESULT_LEN 4
1012 #define FCDI_EVENT_LINK_STATE_DATA_LEN 4
1016 #define FCDI_EVENT_PTP_STATE_LEN 4
1025 #define FCDI_EVENT_DDR_ECC_STATUS_STATUS_LEN 4
1033 #define FCDI_EVENT_PORT_CONFIG_DATA_LEN 4
1037 #define FCDI_EVENT_BOOT_RESULT_LEN 4
1044 * to the MC. Note that this structure | is overlayed over a normal FCDI event
1056 #define FCDI_EXTENDED_EVENT_PPS_COUNT_LEN 4
1059 /* Seconds field of a timestamp record */
1061 #define FCDI_EXTENDED_EVENT_PPS_SECONDS_LEN 4
1064 /* Nanoseconds field of a timestamp record */
1066 #define FCDI_EXTENDED_EVENT_PPS_NANOSECONDS_LEN 4
1095 #define MUM_EVENT_DATA_LEN 4
1117 #define MUM_EVENT_PORT_PHY_TX_LOS_LBN 4
1130 #define MUM_EVENT_EV_CODE_WIDTH 4
1142 #define MUM_EVENT_SENSOR_DATA_LEN 4
1146 #define MUM_EVENT_PORT_PHY_FLAGS_LEN 4
1150 #define MUM_EVENT_PORT_PHY_COPPER_LEN_LEN 4
1154 #define MUM_EVENT_PORT_PHY_CAPS_LEN 4
1158 #define MUM_EVENT_PORT_PHY_TECH_LEN 4
1170 #define MUM_EVENT_PORT_PHY_SRC_DATA_ID_WIDTH 4
1177 #define MUM_EVENT_PORT_PHY_SRC_PORT_NO_WIDTH 4
1194 #define MC_CMD_READ32_IN_ADDR_LEN 4
1195 #define MC_CMD_READ32_IN_NUMWORDS_OFST 4
1196 #define MC_CMD_READ32_IN_NUMWORDS_LEN 4
1199 #define MC_CMD_READ32_OUT_LENMIN 4
1202 #define MC_CMD_READ32_OUT_LEN(num) (0+4*(num))
1203 #define MC_CMD_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)
1205 #define MC_CMD_READ32_OUT_BUFFER_LEN 4
1224 #define MC_CMD_WRITE32_IN_LEN(num) (4+4*(num))
1225 #define MC_CMD_WRITE32_IN_BUFFER_NUM(len) (((len)-4)/4)
1227 #define MC_CMD_WRITE32_IN_ADDR_LEN 4
1228 #define MC_CMD_WRITE32_IN_BUFFER_OFST 4
1229 #define MC_CMD_WRITE32_IN_BUFFER_LEN 4
1253 * The main image should be entered via a copy of a single word from and to a
1255 * is a bitfield, with each bit as documented below.
1258 #define MC_CMD_COPYCODE_IN_SRC_ADDR_LEN 4
1280 #define MC_CMD_COPYCODE_IN_BOOT_MAGIC_SKIP_BOOT_ICORE_SYNC_LBN 4
1289 #define MC_CMD_COPYCODE_IN_DEST_ADDR_OFST 4
1290 #define MC_CMD_COPYCODE_IN_DEST_ADDR_LEN 4
1292 #define MC_CMD_COPYCODE_IN_NUMWORDS_LEN 4
1295 #define MC_CMD_COPYCODE_IN_JUMP_LEN 4
1313 #define MC_CMD_SET_FUNC_IN_LEN 4
1316 #define MC_CMD_SET_FUNC_IN_FUNC_LEN 4
1338 #define MC_CMD_GET_BOOT_STATUS_OUT_BOOT_OFFSET_LEN 4
1341 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_OFST 4
1342 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_LEN 4
1343 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_WATCHDOG_OFST 4
1346 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_PRIMARY_OFST 4
1349 #define MC_CMD_GET_BOOT_STATUS_OUT_FLAGS_BACKUP_OFST 4
1366 #define MC_CMD_GET_ASSERTS_IN_LEN 4
1369 #define MC_CMD_GET_ASSERTS_IN_CLEAR_LEN 4
1375 #define MC_CMD_GET_ASSERTS_OUT_GLOBAL_FLAGS_LEN 4
1378 /* enum: A system-level assertion has failed. */
1380 /* enum: A thread-level assertion has failed. */
1387 #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_OFST 4
1388 #define MC_CMD_GET_ASSERTS_OUT_SAVED_PC_OFFS_LEN 4
1391 #define MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_LEN 4
1393 /* enum: A magic value hinting that the value in this register at the time of
1399 #define MC_CMD_GET_ASSERTS_OUT_THREAD_OFFS_LEN 4
1401 #define MC_CMD_GET_ASSERTS_OUT_RESERVED_LEN 4
1409 #define MC_CMD_GET_ASSERTS_OUT_V2_GLOBAL_FLAGS_LEN 4
1412 /* enum: A system-level assertion has failed. */
1414 /* enum: A thread-level assertion has failed. */
1421 #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_OFST 4
1422 #define MC_CMD_GET_ASSERTS_OUT_V2_SAVED_PC_OFFS_LEN 4
1425 #define MC_CMD_GET_ASSERTS_OUT_V2_GP_REGS_OFFS_LEN 4
1427 /* enum: A magic value hinting that the value in this register at the time of
1433 #define MC_CMD_GET_ASSERTS_OUT_V2_THREAD_OFFS_LEN 4
1435 #define MC_CMD_GET_ASSERTS_OUT_V2_RESERVED_LEN 4
1438 #define MC_CMD_GET_ASSERTS_OUT_V2_SF_REGS_OFFS_LEN 4
1447 #define MC_CMD_GET_ASSERTS_OUT_V3_GLOBAL_FLAGS_LEN 4
1450 /* enum: A system-level assertion has failed. */
1452 /* enum: A thread-level assertion has failed. */
1459 #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_OFST 4
1460 #define MC_CMD_GET_ASSERTS_OUT_V3_SAVED_PC_OFFS_LEN 4
1463 #define MC_CMD_GET_ASSERTS_OUT_V3_GP_REGS_OFFS_LEN 4
1465 /* enum: A magic value hinting that the value in this register at the time of
1471 #define MC_CMD_GET_ASSERTS_OUT_V3_THREAD_OFFS_LEN 4
1473 #define MC_CMD_GET_ASSERTS_OUT_V3_RESERVED_LEN 4
1476 #define MC_CMD_GET_ASSERTS_OUT_V3_SF_REGS_OFFS_LEN 4
1493 #define MC_CMD_GET_ASSERTS_OUT_V3_MC_FW_SECURITY_LEVEL_LEN 4
1516 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4
1522 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_OFST 4
1523 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ_LEN 4
1542 #define MC_CMD_GET_VERSION_EXT_IN_LEN 4
1545 #define MC_CMD_GET_VERSION_EXT_IN_EXT_FLAGS_LEN 4
1548 #define MC_CMD_GET_VERSION_V0_OUT_LEN 4
1550 #define MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4
1563 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1566 #define MC_CMD_GET_VERSION_OUT_PCOL_OFST 4
1567 #define MC_CMD_GET_VERSION_OUT_PCOL_LEN 4
1579 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1582 #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_OFST 4
1583 #define MC_CMD_GET_VERSION_EXT_OUT_PCOL_LEN 4
1599 * (depending on which components exist on a particular adapter)
1603 /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */
1606 #define MC_CMD_GET_VERSION_V2_OUT_PCOL_OFST 4
1607 #define MC_CMD_GET_VERSION_V2_OUT_PCOL_LEN 4
1620 #define MC_CMD_GET_VERSION_V2_OUT_FLAGS_LEN 4
1634 #define MC_CMD_GET_VERSION_V2_OUT_BOARD_EXT_INFO_PRESENT_LBN 4
1641 #define MC_CMD_GET_VERSION_V2_OUT_MCFW_SECURITY_LEVEL_LEN 4
1645 /* The SUC firmware version as four numbers - a.b.c.d */
1647 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_LEN 4
1648 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_VERSION_NUM 4
1658 #define MC_CMD_GET_VERSION_V2_OUT_SUCFW_CHIP_ID_LEN 4
1659 /* The CMC firmware version as four numbers - a.b.c.d */
1661 #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_LEN 4
1662 #define MC_CMD_GET_VERSION_V2_OUT_CMCFW_VERSION_NUM 4
1670 * FPGA_VERSION[0]: x => Image H{x} FPGA_VERSION[1]: Revision letter (0 => A, 1
1674 #define MC_CMD_GET_VERSION_V2_OUT_FPGA_VERSION_LEN 4
1684 #define MC_CMD_GET_VERSION_V2_OUT_BOARD_REVISION_LEN 4
1708 /* enum: Send a PTP packet. This operation is used on Siena and Huntington.
1789 #define MC_CMD_PTP_IN_CMD_LEN 4
1790 #define MC_CMD_PTP_IN_PERIPH_ID_OFST 4
1791 #define MC_CMD_PTP_IN_PERIPH_ID_LEN 4
1794 #define MC_CMD_PTP_IN_ENABLE_QUEUE_LEN 4
1797 #define MC_CMD_PTP_IN_ENABLE_MODE_LEN 4
1814 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1815 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1816 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1825 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1826 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1827 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1830 #define MC_CMD_PTP_IN_TRANSMIT_LENGTH_LEN 4
1841 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1842 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1843 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1848 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1849 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1850 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1855 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1856 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1857 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1862 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1863 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1864 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1879 #define MC_CMD_PTP_IN_ADJUST_SECONDS_LEN 4
1882 #define MC_CMD_PTP_IN_ADJUST_MAJOR_LEN 4
1885 #define MC_CMD_PTP_IN_ADJUST_NANOSECONDS_LEN 4
1888 #define MC_CMD_PTP_IN_ADJUST_MINOR_LEN 4
1893 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1894 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1895 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1910 #define MC_CMD_PTP_IN_ADJUST_V2_SECONDS_LEN 4
1913 #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_LEN 4
1916 #define MC_CMD_PTP_IN_ADJUST_V2_NANOSECONDS_LEN 4
1919 #define MC_CMD_PTP_IN_ADJUST_V2_MINOR_LEN 4
1922 #define MC_CMD_PTP_IN_ADJUST_V2_MAJOR_HI_LEN 4
1927 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1928 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1929 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1932 #define MC_CMD_PTP_IN_SYNCHRONIZE_NUMTIMESETS_LEN 4
1944 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1945 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1946 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1951 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1952 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1953 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1956 #define MC_CMD_PTP_IN_MANFTEST_PACKET_TEST_ENABLE_LEN 4
1961 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1962 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1963 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1968 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1969 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1970 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1973 #define MC_CMD_PTP_IN_DEBUG_DEBUG_PARAM_LEN 4
1978 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1979 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1980 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1982 #define MC_CMD_PTP_IN_FPGAREAD_ADDR_LEN 4
1984 #define MC_CMD_PTP_IN_FPGAREAD_NUMBYTES_LEN 4
1993 /* MC_CMD_PTP_IN_CMD_LEN 4 */
1994 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
1995 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
1997 #define MC_CMD_PTP_IN_FPGAWRITE_ADDR_LEN 4
2007 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2008 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2009 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2012 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_SECONDS_LEN 4
2015 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MAJOR_LEN 4
2018 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_NANOSECONDS_LEN 4
2021 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_MINOR_LEN 4
2026 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2027 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2028 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2031 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_SECONDS_LEN 4
2034 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_LEN 4
2037 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_NANOSECONDS_LEN 4
2040 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MINOR_LEN 4
2043 #define MC_CMD_PTP_IN_CLOCK_OFFSET_ADJUST_V2_MAJOR_HI_LEN 4
2048 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2049 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2050 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2062 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2063 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2064 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2067 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_NUM_VLAN_TAGS_LEN 4
2070 #define MC_CMD_PTP_IN_RX_SET_VLAN_FILTER_VLAN_TAG_LEN 4
2076 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2077 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2078 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2081 #define MC_CMD_PTP_IN_RX_SET_UUID_FILTER_ENABLE_LEN 4
2091 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2092 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2093 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2096 #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_ENABLE_LEN 4
2099 #define MC_CMD_PTP_IN_RX_SET_DOMAIN_FILTER_DOMAIN_LEN 4
2104 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2105 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2106 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2109 #define MC_CMD_PTP_IN_SET_CLK_SRC_CLK_LEN 4
2118 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2119 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2120 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2125 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2127 #define MC_CMD_PTP_IN_PPS_ENABLE_OP_OFST 4
2128 #define MC_CMD_PTP_IN_PPS_ENABLE_OP_LEN 4
2135 #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_LEN 4
2140 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2141 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2142 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2147 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2148 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2149 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2154 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2155 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2156 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2161 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2162 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2163 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2166 #define MC_CMD_PTP_IN_TIME_EVENT_SUBSCRIBE_QUEUE_LEN 4
2177 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2178 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2179 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2182 #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_CONTROL_LEN 4
2183 /* enum: Unsubscribe a single queue */
2189 #define MC_CMD_PTP_IN_TIME_EVENT_UNSUBSCRIBE_QUEUE_LEN 4
2194 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2195 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2196 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2199 #define MC_CMD_PTP_IN_MANFTEST_PPS_TEST_ENABLE_LEN 4
2204 /* MC_CMD_PTP_IN_CMD_LEN 4 */
2205 /* MC_CMD_PTP_IN_PERIPH_ID_OFST 4 */
2206 /* MC_CMD_PTP_IN_PERIPH_ID_LEN 4 */
2209 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_STATUS_LEN 4
2218 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_TIMEOUT_LEN 4
2220 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED0_LEN 4
2222 #define MC_CMD_PTP_IN_SET_SYNC_STATUS_RESERVED1_LEN 4
2231 #define MC_CMD_PTP_OUT_TRANSMIT_SECONDS_LEN 4
2234 #define MC_CMD_PTP_OUT_TRANSMIT_MAJOR_LEN 4
2236 #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_OFST 4
2237 #define MC_CMD_PTP_OUT_TRANSMIT_NANOSECONDS_LEN 4
2239 #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_OFST 4
2240 #define MC_CMD_PTP_OUT_TRANSMIT_MINOR_LEN 4
2252 #define MC_CMD_PTP_OUT_READ_NIC_TIME_SECONDS_LEN 4
2255 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MAJOR_LEN 4
2257 #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_OFST 4
2258 #define MC_CMD_PTP_OUT_READ_NIC_TIME_NANOSECONDS_LEN 4
2260 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_OFST 4
2261 #define MC_CMD_PTP_OUT_READ_NIC_TIME_MINOR_LEN 4
2267 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_SECONDS_LEN 4
2270 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_LEN 4
2272 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_OFST 4
2273 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_NANOSECONDS_LEN 4
2275 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_OFST 4
2276 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MINOR_LEN 4
2279 #define MC_CMD_PTP_OUT_READ_NIC_TIME_V2_MAJOR_HI_LEN 4
2285 #define MC_CMD_PTP_OUT_STATUS_CLOCK_FREQ_LEN 4
2287 #define MC_CMD_PTP_OUT_STATUS_STATS_TX_OFST 4
2288 #define MC_CMD_PTP_OUT_STATUS_STATS_TX_LEN 4
2291 #define MC_CMD_PTP_OUT_STATUS_STATS_RX_LEN 4
2294 #define MC_CMD_PTP_OUT_STATUS_STATS_TS_LEN 4
2297 #define MC_CMD_PTP_OUT_STATUS_STATS_FM_LEN 4
2300 #define MC_CMD_PTP_OUT_STATUS_STATS_NFM_LEN 4
2303 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFLOW_LEN 4
2306 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_BAD_LEN 4
2309 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MIN_LEN 4
2312 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MAX_LEN 4
2315 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_LAST_LEN 4
2318 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_PER_MEAN_LEN 4
2321 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MIN_LEN 4
2324 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MAX_LEN 4
2327 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_LAST_LEN 4
2330 #define MC_CMD_PTP_OUT_STATUS_STATS_PPS_OFF_MEAN_LEN 4
2338 /* A set of host and NIC times */
2346 #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTSTART_LEN 4
2348 #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_OFST 4
2349 #define MC_CMD_PTP_OUT_SYNCHRONIZE_SECONDS_LEN 4
2351 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_OFST 4
2352 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MAJOR_LEN 4
2355 #define MC_CMD_PTP_OUT_SYNCHRONIZE_NANOSECONDS_LEN 4
2358 #define MC_CMD_PTP_OUT_SYNCHRONIZE_MINOR_LEN 4
2361 #define MC_CMD_PTP_OUT_SYNCHRONIZE_HOSTEND_LEN 4
2364 #define MC_CMD_PTP_OUT_SYNCHRONIZE_WAITNS_LEN 4
2370 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_RESULT_LEN 4
2402 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_OFST 4
2403 #define MC_CMD_PTP_OUT_MANFTEST_BASIC_TEST_EXTOSC_LEN 4
2409 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_RESULT_LEN 4
2411 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_OFST 4
2412 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FPGACOUNT_LEN 4
2415 #define MC_CMD_PTP_OUT_MANFTEST_PACKET_TEST_FILTERCOUNT_LEN 4
2430 #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_LEN 4
2433 * is not supported (older firmware) a format of seconds and nanoseconds should
2438 #define MC_CMD_PTP_OUT_GET_TIME_FORMAT_FORMAT_LEN 4
2450 * is not supported (older firmware) a format of seconds and nanoseconds should
2454 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_TIME_FORMAT_LEN 4
2464 /* Minimum acceptable value for a corrected synchronization timeset. When
2465 * comparing host and NIC clock times, the MC returns a set of samples that
2471 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_OFST 4
2472 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_SYNC_WINDOW_MIN_LEN 4
2475 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_CAPABILITIES_LEN 4
2489 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED0_LEN 4
2491 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED1_LEN 4
2493 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_LEN 4
2499 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_TRANSMIT_LEN 4
2501 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_OFST 4
2502 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_RECEIVE_LEN 4
2505 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_OUT_LEN 4
2508 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_PPS_IN_LEN 4
2514 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_TX_LEN 4
2516 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_OFST 4
2517 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PTP_RX_LEN 4
2520 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_OUT_LEN 4
2523 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_PPS_IN_LEN 4
2526 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_TX_LEN 4
2529 #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_V2_GENERAL_RX_LEN 4
2532 #define MC_CMD_PTP_OUT_MANFTEST_PPS_LEN 4
2535 #define MC_CMD_PTP_OUT_MANFTEST_PPS_TEST_RESULT_LEN 4
2556 #define MC_CMD_CSR_READ32_IN_ADDR_LEN 4
2557 #define MC_CMD_CSR_READ32_IN_STEP_OFST 4
2558 #define MC_CMD_CSR_READ32_IN_STEP_LEN 4
2560 #define MC_CMD_CSR_READ32_IN_NUMWORDS_LEN 4
2563 #define MC_CMD_CSR_READ32_OUT_LENMIN 4
2566 #define MC_CMD_CSR_READ32_OUT_LEN(num) (0+4*(num))
2567 #define MC_CMD_CSR_READ32_OUT_BUFFER_NUM(len) (((len)-0)/4)
2568 /* The last dword is the status, not a value read */
2570 #define MC_CMD_CSR_READ32_OUT_BUFFER_LEN 4
2589 #define MC_CMD_CSR_WRITE32_IN_LEN(num) (8+4*(num))
2590 #define MC_CMD_CSR_WRITE32_IN_BUFFER_NUM(len) (((len)-8)/4)
2593 #define MC_CMD_CSR_WRITE32_IN_ADDR_LEN 4
2594 #define MC_CMD_CSR_WRITE32_IN_STEP_OFST 4
2595 #define MC_CMD_CSR_WRITE32_IN_STEP_LEN 4
2597 #define MC_CMD_CSR_WRITE32_IN_BUFFER_LEN 4
2603 #define MC_CMD_CSR_WRITE32_OUT_LEN 4
2605 #define MC_CMD_CSR_WRITE32_OUT_STATUS_LEN 4
2622 * INTERVAL is interpreted as a command: 0: stop OCSD / 1: Report OCSD current
2627 #define MC_CMD_HP_IN_SUBCMD_LEN 4
2632 /* The address to the array of sensor fields. (Or NULL to use a sub-command.)
2634 #define MC_CMD_HP_IN_OCSD_ADDR_OFST 4
2636 #define MC_CMD_HP_IN_OCSD_ADDR_LO_OFST 4
2642 #define MC_CMD_HP_IN_OCSD_INTERVAL_LEN 4
2645 #define MC_CMD_HP_OUT_LEN 4
2647 #define MC_CMD_HP_OUT_OCSD_STATUS_LEN 4
2697 #define MC_CMD_MDIO_READ_IN_BUS_LEN 4
2703 #define MC_CMD_MDIO_READ_IN_PRTAD_OFST 4
2704 #define MC_CMD_MDIO_READ_IN_PRTAD_LEN 4
2707 #define MC_CMD_MDIO_READ_IN_DEVAD_LEN 4
2714 #define MC_CMD_MDIO_READ_IN_ADDR_LEN 4
2720 #define MC_CMD_MDIO_READ_OUT_VALUE_LEN 4
2721 /* Status the MDIO commands return the raw status bits from the MDIO block. A
2724 #define MC_CMD_MDIO_READ_OUT_STATUS_OFST 4
2725 #define MC_CMD_MDIO_READ_OUT_STATUS_LEN 4
2745 #define MC_CMD_MDIO_WRITE_IN_BUS_LEN 4
2751 #define MC_CMD_MDIO_WRITE_IN_PRTAD_OFST 4
2752 #define MC_CMD_MDIO_WRITE_IN_PRTAD_LEN 4
2755 #define MC_CMD_MDIO_WRITE_IN_DEVAD_LEN 4
2762 #define MC_CMD_MDIO_WRITE_IN_ADDR_LEN 4
2765 #define MC_CMD_MDIO_WRITE_IN_VALUE_LEN 4
2768 #define MC_CMD_MDIO_WRITE_OUT_LEN 4
2769 /* Status; the MDIO commands return the raw status bits from the MDIO block. A
2773 #define MC_CMD_MDIO_WRITE_OUT_STATUS_LEN 4
2808 #define MC_CMD_DBIWROP_TYPEDEF_ADDRESS_LEN 4
2811 #define MC_CMD_DBIWROP_TYPEDEF_PARMS_OFST 4
2812 #define MC_CMD_DBIWROP_TYPEDEF_PARMS_LEN 4
2813 #define MC_CMD_DBIWROP_TYPEDEF_VF_NUM_OFST 4
2816 #define MC_CMD_DBIWROP_TYPEDEF_VF_ACTIVE_OFST 4
2819 #define MC_CMD_DBIWROP_TYPEDEF_CS2_OFST 4
2825 #define MC_CMD_DBIWROP_TYPEDEF_VALUE_LEN 4
2832 * Read a 32-bit register from the indirect port register map. The port to
2838 #define MC_CMD_PORT_READ32_IN_LEN 4
2841 #define MC_CMD_PORT_READ32_IN_ADDR_LEN 4
2847 #define MC_CMD_PORT_READ32_OUT_VALUE_LEN 4
2849 #define MC_CMD_PORT_READ32_OUT_STATUS_OFST 4
2850 #define MC_CMD_PORT_READ32_OUT_STATUS_LEN 4
2855 * Write a 32-bit register to the indirect port register map. The port to
2864 #define MC_CMD_PORT_WRITE32_IN_ADDR_LEN 4
2866 #define MC_CMD_PORT_WRITE32_IN_VALUE_OFST 4
2867 #define MC_CMD_PORT_WRITE32_IN_VALUE_LEN 4
2870 #define MC_CMD_PORT_WRITE32_OUT_LEN 4
2873 #define MC_CMD_PORT_WRITE32_OUT_STATUS_LEN 4
2878 * Read a 128-bit register from the indirect port register map. The port to
2884 #define MC_CMD_PORT_READ128_IN_LEN 4
2887 #define MC_CMD_PORT_READ128_IN_ADDR_LEN 4
2896 #define MC_CMD_PORT_READ128_OUT_STATUS_LEN 4
2901 * Write a 128-bit register to the indirect port register map. The port to
2910 #define MC_CMD_PORT_WRITE128_IN_ADDR_LEN 4
2912 #define MC_CMD_PORT_WRITE128_IN_VALUE_OFST 4
2916 #define MC_CMD_PORT_WRITE128_OUT_LEN 4
2919 #define MC_CMD_PORT_WRITE128_OUT_STATUS_LEN 4
2922 #define MC_CMD_CAPABILITIES_LEN 4
2936 #define MC_CMD_CAPABILITIES_AOE_LBN 4
2967 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_TYPE_LEN 4
2968 #define MC_CMD_GET_BOARD_CFG_OUT_BOARD_NAME_OFST 4
2974 #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT0_LEN 4
2979 #define MC_CMD_GET_BOARD_CFG_OUT_CAPABILITIES_PORT1_LEN 4
2994 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT0_LEN 4
2999 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_COUNT_PORT1_LEN 4
3004 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT0_LEN 4
3009 #define MC_CMD_GET_BOARD_CFG_OUT_MAC_STRIDE_PORT1_LEN 4
3010 /* Siena only. This field contains a 16-bit value for each of the types of
3011 * NVRAM area. The values are defined in the firmware/mc/platform/.c file for a
3042 #define MC_CMD_DBI_READX_IN_DBIRDOP_HI_OFST 4
3048 #define MC_CMD_DBI_READX_OUT_LENMIN 4
3051 #define MC_CMD_DBI_READX_OUT_LEN(num) (0+4*(num))
3052 #define MC_CMD_DBI_READX_OUT_VALUE_NUM(len) (((len)-0)/4)
3055 #define MC_CMD_DBI_READX_OUT_VALUE_LEN 4
3063 #define MC_CMD_DBIRDOP_TYPEDEF_ADDRESS_LEN 4
3066 #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_OFST 4
3067 #define MC_CMD_DBIRDOP_TYPEDEF_PARMS_LEN 4
3068 #define MC_CMD_DBIRDOP_TYPEDEF_VF_NUM_OFST 4
3071 #define MC_CMD_DBIRDOP_TYPEDEF_VF_ACTIVE_OFST 4
3074 #define MC_CMD_DBIRDOP_TYPEDEF_CS2_OFST 4
3113 #define MC_CMD_LTSSM_HIST_OUT_LEN(num) (0+4*(num))
3114 #define MC_CMD_LTSSM_HIST_OUT_DATA_NUM(len) (((len)-0)/4)
3117 #define MC_CMD_LTSSM_HIST_OUT_DATA_LEN 4
3128 * issue a subsequent MC_CMD_GET_CAPABILITIES command to determine which
3141 #define MC_CMD_DRV_ATTACH_IN_NEW_STATE_LEN 4
3161 #define MC_CMD_DRV_ATTACH_IN_WANT_V2_LINKCHANGES_LBN 4
3170 #define MC_CMD_DRV_ATTACH_IN_UPDATE_OFST 4
3171 #define MC_CMD_DRV_ATTACH_IN_UPDATE_LEN 4
3174 #define MC_CMD_DRV_ATTACH_IN_FIRMWARE_ID_LEN 4
3212 #define MC_CMD_DRV_ATTACH_IN_V2_NEW_STATE_LEN 4
3232 #define MC_CMD_DRV_ATTACH_IN_V2_WANT_V2_LINKCHANGES_LBN 4
3241 #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_OFST 4
3242 #define MC_CMD_DRV_ATTACH_IN_V2_UPDATE_LEN 4
3245 #define MC_CMD_DRV_ATTACH_IN_V2_FIRMWARE_ID_LEN 4
3277 * handled by the NIC. This is a zero-terminated ASCII string.
3283 #define MC_CMD_DRV_ATTACH_OUT_LEN 4
3286 #define MC_CMD_DRV_ATTACH_OUT_OLD_STATE_LEN 4
3292 #define MC_CMD_DRV_ATTACH_EXT_OUT_OLD_STATE_LEN 4
3294 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4
3295 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4
3329 #define MC_CMD_SHMUART_IN_LEN 4
3332 #define MC_CMD_SHMUART_IN_FLAG_LEN 4
3366 #define MC_CMD_ENTITY_RESET_IN_LEN 4
3367 /* Optional flags field. Omitting this will perform a "legacy" reset action
3371 #define MC_CMD_ENTITY_RESET_IN_FLAG_LEN 4
3390 #define MC_CMD_PCIE_CREDITS_IN_POLL_PERIOD_LEN 4
3392 #define MC_CMD_PCIE_CREDITS_IN_WIPE_OFST 4
3393 #define MC_CMD_PCIE_CREDITS_IN_WIPE_LEN 4
3401 #define MC_CMD_PCIE_CREDITS_OUT_CURRENT_NP_HDR_OFST 4
3424 #define MC_CMD_RXD_MONITOR_IN_QID_LEN 4
3425 #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_OFST 4
3426 #define MC_CMD_RXD_MONITOR_IN_POLL_PERIOD_LEN 4
3428 #define MC_CMD_RXD_MONITOR_IN_WIPE_LEN 4
3433 #define MC_CMD_RXD_MONITOR_OUT_QID_LEN 4
3434 #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_OFST 4
3435 #define MC_CMD_RXD_MONITOR_OUT_RING_FILL_LEN 4
3437 #define MC_CMD_RXD_MONITOR_OUT_CACHE_FILL_LEN 4
3439 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_1_LEN 4
3441 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_2_LEN 4
3443 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_4_LEN 4
3445 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_8_LEN 4
3447 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_16_LEN 4
3449 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_32_LEN 4
3451 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_64_LEN 4
3453 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_128_LEN 4
3455 #define MC_CMD_RXD_MONITOR_OUT_RING_LT_256_LEN 4
3457 #define MC_CMD_RXD_MONITOR_OUT_RING_GE_256_LEN 4
3459 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_1_LEN 4
3461 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_2_LEN 4
3463 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_4_LEN 4
3465 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_8_LEN 4
3467 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_16_LEN 4
3469 #define MC_CMD_RXD_MONITOR_OUT_CACHE_LT_32_LEN 4
3471 #define MC_CMD_RXD_MONITOR_OUT_CACHE_GE_32_LEN 4
3490 #define MC_CMD_PUTS_IN_DEST_LEN 4
3497 #define MC_CMD_PUTS_IN_DHOST_OFST 4
3511 * Report PHY configuration. This guarantees to succeed even if the PHY is in a
3526 #define MC_CMD_GET_PHY_CFG_OUT_FLAGS_LEN 4
3540 #define MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN 4
3549 #define MC_CMD_GET_PHY_CFG_OUT_TYPE_OFST 4
3550 #define MC_CMD_GET_PHY_CFG_OUT_TYPE_LEN 4
3553 #define MC_CMD_GET_PHY_CFG_OUT_SUPPORTED_CAP_LEN 4
3564 #define MC_CMD_PHY_CAP_100FDX_LBN 4
3619 #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4
3622 #define MC_CMD_GET_PHY_CFG_OUT_PRT_LEN 4
3625 #define MC_CMD_GET_PHY_CFG_OUT_STATS_MASK_LEN 4
3631 #define MC_CMD_GET_PHY_CFG_OUT_MEDIA_TYPE_LEN 4
3647 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4
3667 * Start a BIST test on the PHY. Locks required: PHY_LOCK if doing a PHY BIST
3676 #define MC_CMD_START_BIST_IN_LEN 4
3679 #define MC_CMD_START_BIST_IN_TYPE_LEN 4
3703 * Poll for BIST completion. Returns a single status code, and optionally some
3705 * after validating OUTLEN and MC_CMD_GET_PHY_CFG.TYPE. If a driver can't
3707 * OUT.RESULT. Locks required: PHY_LOCK if doing a PHY BIST. Return code: 0,
3722 #define MC_CMD_POLL_BIST_OUT_RESULT_LEN 4
3731 #define MC_CMD_POLL_BIST_OUT_PRIVATE_OFST 4
3732 #define MC_CMD_POLL_BIST_OUT_PRIVATE_LEN 4
3738 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3741 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_OFST 4
3742 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A_LEN 4
3744 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B_LEN 4
3746 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C_LEN 4
3748 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D_LEN 4
3749 /* Status of each channel A */
3751 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_A_LEN 4
3764 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_B_LEN 4
3769 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_C_LEN 4
3774 #define MC_CMD_POLL_BIST_OUT_SFT9001_CABLE_STATUS_D_LEN 4
3782 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3785 #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_OFST 4
3786 #define MC_CMD_POLL_BIST_OUT_MRSFP_TEST_LEN 4
3810 /* MC_CMD_POLL_BIST_OUT_RESULT_LEN 4 */
3813 #define MC_CMD_POLL_BIST_OUT_MEM_TEST_OFST 4
3814 #define MC_CMD_POLL_BIST_OUT_MEM_TEST_LEN 4
3831 #define MC_CMD_POLL_BIST_OUT_MEM_ADDR_LEN 4
3834 #define MC_CMD_POLL_BIST_OUT_MEM_BUS_LEN 4
3855 #define MC_CMD_POLL_BIST_OUT_MEM_EXPECT_LEN 4
3858 #define MC_CMD_POLL_BIST_OUT_MEM_ACTUAL_LEN 4
3861 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_LEN 4
3864 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_PARITY_LEN 4
3867 #define MC_CMD_POLL_BIST_OUT_MEM_ECC_FATAL_LEN 4
3882 #define MC_CMD_FLUSH_RX_QUEUES_IN_LENMIN 4
3885 #define MC_CMD_FLUSH_RX_QUEUES_IN_LEN(num) (0+4*(num))
3886 #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_NUM(len) (((len)-0)/4)
3888 #define MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_LEN 4
3899 * Returns a bitmask of loopback modes available at each speed.
3915 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_OFST 4
4031 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_OFST 4
4161 #define AN_TYPE_LEN 4
4163 #define AN_TYPE_TYPE_LEN 4
4179 #define FEC_TYPE_LEN 4
4181 #define FEC_TYPE_TYPE_LEN 4
4184 /* enum: Clause 74 BASE-R FEC (a.k.a Firecode) */
4211 #define MC_CMD_GET_LINK_OUT_CAP_LEN 4
4215 #define MC_CMD_GET_LINK_OUT_LP_CAP_OFST 4
4216 #define MC_CMD_GET_LINK_OUT_LP_CAP_LEN 4
4221 #define MC_CMD_GET_LINK_OUT_LINK_SPEED_LEN 4
4224 #define MC_CMD_GET_LINK_OUT_LOOPBACK_MODE_LEN 4
4228 #define MC_CMD_GET_LINK_OUT_FLAGS_LEN 4
4255 #define MC_CMD_GET_LINK_OUT_FCNTL_LEN 4
4259 #define MC_CMD_GET_LINK_OUT_MAC_FAULT_LEN 4
4279 #define MC_CMD_GET_LINK_OUT_V2_CAP_LEN 4
4283 #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_OFST 4
4284 #define MC_CMD_GET_LINK_OUT_V2_LP_CAP_LEN 4
4289 #define MC_CMD_GET_LINK_OUT_V2_LINK_SPEED_LEN 4
4292 #define MC_CMD_GET_LINK_OUT_V2_LOOPBACK_MODE_LEN 4
4296 #define MC_CMD_GET_LINK_OUT_V2_FLAGS_LEN 4
4323 #define MC_CMD_GET_LINK_OUT_V2_FCNTL_LEN 4
4327 #define MC_CMD_GET_LINK_OUT_V2_MAC_FAULT_LEN 4
4348 #define MC_CMD_GET_LINK_OUT_V2_LD_CAP_LEN 4
4351 #define MC_CMD_GET_LINK_OUT_V2_AN_TYPE_LEN 4
4356 #define MC_CMD_GET_LINK_OUT_V2_FEC_TYPE_LEN 4
4360 #define MC_CMD_GET_LINK_OUT_V2_EXT_FLAGS_LEN 4
4374 #define MC_CMD_GET_LINK_OUT_V2_PCS_LOCK_LBN 4
4409 #define MC_CMD_SET_LINK_IN_CAP_LEN 4
4411 #define MC_CMD_SET_LINK_IN_FLAGS_OFST 4
4412 #define MC_CMD_SET_LINK_IN_FLAGS_LEN 4
4413 #define MC_CMD_SET_LINK_IN_LOWPOWER_OFST 4
4416 #define MC_CMD_SET_LINK_IN_POWEROFF_OFST 4
4419 #define MC_CMD_SET_LINK_IN_TXDIS_OFST 4
4422 #define MC_CMD_SET_LINK_IN_LINKDOWN_OFST 4
4427 #define MC_CMD_SET_LINK_IN_LOOPBACK_MODE_LEN 4
4430 /* A loopback speed of "0" is supported, and means (choose any available
4434 #define MC_CMD_SET_LINK_IN_LOOPBACK_SPEED_LEN 4
4445 #define MC_CMD_SET_LINK_IN_V2_CAP_LEN 4
4447 #define MC_CMD_SET_LINK_IN_V2_FLAGS_OFST 4
4448 #define MC_CMD_SET_LINK_IN_V2_FLAGS_LEN 4
4449 #define MC_CMD_SET_LINK_IN_V2_LOWPOWER_OFST 4
4452 #define MC_CMD_SET_LINK_IN_V2_POWEROFF_OFST 4
4455 #define MC_CMD_SET_LINK_IN_V2_TXDIS_OFST 4
4458 #define MC_CMD_SET_LINK_IN_V2_LINKDOWN_OFST 4
4463 #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_MODE_LEN 4
4466 /* A loopback speed of "0" is supported, and means (choose any available
4470 #define MC_CMD_SET_LINK_IN_V2_LOOPBACK_SPEED_LEN 4
4494 #define MC_CMD_SET_ID_LED_IN_LEN 4
4497 #define MC_CMD_SET_ID_LED_IN_STATE_LEN 4
4521 #define MC_CMD_SET_MAC_IN_MTU_LEN 4
4522 #define MC_CMD_SET_MAC_IN_DRAIN_OFST 4
4523 #define MC_CMD_SET_MAC_IN_DRAIN_LEN 4
4529 #define MC_CMD_SET_MAC_IN_REJECT_LEN 4
4537 #define MC_CMD_SET_MAC_IN_FCNTL_LEN 4
4551 #define MC_CMD_SET_MAC_IN_FLAGS_LEN 4
4562 #define MC_CMD_SET_MAC_EXT_IN_MTU_LEN 4
4563 #define MC_CMD_SET_MAC_EXT_IN_DRAIN_OFST 4
4564 #define MC_CMD_SET_MAC_EXT_IN_DRAIN_LEN 4
4570 #define MC_CMD_SET_MAC_EXT_IN_REJECT_LEN 4
4578 #define MC_CMD_SET_MAC_EXT_IN_FCNTL_LEN 4
4592 #define MC_CMD_SET_MAC_EXT_IN_FLAGS_LEN 4
4596 /* Select which parameters to configure. A parameter will only be modified if
4602 #define MC_CMD_SET_MAC_EXT_IN_CONTROL_LEN 4
4616 #define MC_CMD_SET_MAC_EXT_IN_CFG_FCS_LBN 4
4623 #define MC_CMD_SET_MAC_V2_OUT_LEN 4
4629 #define MC_CMD_SET_MAC_V2_OUT_MTU_LEN 4
4634 * Get generic PHY statistics. This call returns the statistics for a generic
4635 * PHY in a sparse array (indexed by the enumerate). Each value is represented
4636 * by a 32bit number. If the DMA_ADDR is 0, then no DMA is performed, and the
4652 #define MC_CMD_PHY_STATS_IN_DMA_ADDR_HI_OFST 4
4660 #define MC_CMD_PHY_STATS_OUT_NO_DMA_STATISTICS_LEN 4
4672 /* enum: PMA-PMD SNR A. */
4734 #define MC_CMD_MAC_STATS_IN_DMA_ADDR_HI_OFST 4
4736 #define MC_CMD_MAC_STATS_IN_CMD_LEN 4
4750 #define MC_CMD_MAC_STATS_IN_PERIODIC_CLEAR_LBN 4
4764 #define MC_CMD_MAC_STATS_IN_DMA_LEN_LEN 4
4767 #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4
4777 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_OFST 4
4933 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_OFST 4
4952 * GENERATION_END in a MAC_STATS_V2 response and otherwise unused.
4966 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_OFST 4
4970 /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the
4974 /* enum: Number of times a CTPIO send wrote beyond frame end (informational
4996 /* enum: Number of CTPIO failures because the host started a new frame before
5000 /* enum: Number of CTPIO failures because a write was not a multiple of 32 bits
5005 * sending a CTPIO frame
5026 * GENERATION_END in a MAC_STATS_V3 response and otherwise unused.
5040 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_OFST 4
5057 * GENERATION_END in a MAC_STATS_V4 response and otherwise unused.
5073 #define MC_CMD_SRIOV_IN_ENABLE_LEN 4
5074 #define MC_CMD_SRIOV_IN_VI_BASE_OFST 4
5075 #define MC_CMD_SRIOV_IN_VI_BASE_LEN 4
5077 #define MC_CMD_SRIOV_IN_VF_COUNT_LEN 4
5082 #define MC_CMD_SRIOV_OUT_VI_SCALE_LEN 4
5083 #define MC_CMD_SRIOV_OUT_VF_TOTAL_OFST 4
5084 #define MC_CMD_SRIOV_OUT_VF_TOTAL_LEN 4
5090 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_NUM_RECORDS_LEN 4
5093 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_OFST 4
5094 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_TO_RID_LEN 4
5104 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_FROM_RID_LEN 4
5115 #define MC_CMD_MEMCPY_RECORD_TYPEDEF_LENGTH_LEN 4
5125 * A common pattern is for a client to use generation counts to signal a dma
5126 * update of a datastructure. To facilitate this, this MCDI operation can
5131 * The source data can either come from a DMA from the host, or it can be
5132 * embedded within the request directly, thereby eliminating a DMA read. To
5161 * Set a WoL filter.
5171 #define MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4
5174 /* A type value of 1 is unused. */
5175 #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4
5176 #define MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4
5192 #define MC_CMD_WOL_FILTER_SET_IN_DATA_LEN 4
5198 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5199 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5200 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5209 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5210 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5211 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5213 #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_SRC_IP_LEN 4
5215 #define MC_CMD_WOL_FILTER_SET_IN_IPV4_SYN_DST_IP_LEN 4
5224 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5225 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5226 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5239 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5240 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5241 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5256 /* MC_CMD_WOL_FILTER_SET_IN_FILTER_MODE_LEN 4 */
5257 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_OFST 4 */
5258 /* MC_CMD_WOL_FILTER_SET_IN_WOL_TYPE_LEN 4 */
5260 #define MC_CMD_WOL_FILTER_SET_IN_LINK_MASK_LEN 4
5269 #define MC_CMD_WOL_FILTER_SET_OUT_LEN 4
5271 #define MC_CMD_WOL_FILTER_SET_OUT_FILTER_ID_LEN 4
5276 * Remove a WoL filter. Locks required: None. Returns: 0, EINVAL, ENOSYS
5284 #define MC_CMD_WOL_FILTER_REMOVE_IN_LEN 4
5286 #define MC_CMD_WOL_FILTER_REMOVE_IN_FILTER_ID_LEN 4
5303 #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4
5305 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4
5344 #define MC_CMD_NVRAM_TYPES_OUT_LEN 4
5347 #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4
5394 * Read info about a virtual NVRAM partition. Locks required: none. Returns: 0,
5403 #define MC_CMD_NVRAM_INFO_IN_LEN 4
5405 #define MC_CMD_NVRAM_INFO_IN_TYPE_LEN 4
5412 #define MC_CMD_NVRAM_INFO_OUT_TYPE_LEN 4
5415 #define MC_CMD_NVRAM_INFO_OUT_SIZE_OFST 4
5416 #define MC_CMD_NVRAM_INFO_OUT_SIZE_LEN 4
5418 #define MC_CMD_NVRAM_INFO_OUT_ERASESIZE_LEN 4
5420 #define MC_CMD_NVRAM_INFO_OUT_FLAGS_LEN 4
5443 #define MC_CMD_NVRAM_INFO_OUT_PHYSDEV_LEN 4
5445 #define MC_CMD_NVRAM_INFO_OUT_PHYSADDR_LEN 4
5450 #define MC_CMD_NVRAM_INFO_V2_OUT_TYPE_LEN 4
5453 #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_OFST 4
5454 #define MC_CMD_NVRAM_INFO_V2_OUT_SIZE_LEN 4
5456 #define MC_CMD_NVRAM_INFO_V2_OUT_ERASESIZE_LEN 4
5458 #define MC_CMD_NVRAM_INFO_V2_OUT_FLAGS_LEN 4
5475 #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSDEV_LEN 4
5477 #define MC_CMD_NVRAM_INFO_V2_OUT_PHYSADDR_LEN 4
5481 #define MC_CMD_NVRAM_INFO_V2_OUT_WRITESIZE_LEN 4
5486 * Start a group of update operations on a virtual NVRAM partition. Locks
5488 * PHY_LOCK required and not held). In an adapter bound to a TSA controller,
5489 * MC_CMD_NVRAM_UPDATE_START can only be used on a subset of partition types
5491 * perform this operation on a restricted partition will return the error
5502 #define MC_CMD_NVRAM_UPDATE_START_IN_LEN 4
5504 #define MC_CMD_NVRAM_UPDATE_START_IN_TYPE_LEN 4
5515 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_TYPE_LEN 4
5518 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_OFST 4
5519 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAGS_LEN 4
5520 #define MC_CMD_NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT_OFST 4
5530 * Read data from a virtual NVRAM partition. Locks required: PHY_LOCK if
5542 #define MC_CMD_NVRAM_READ_IN_TYPE_LEN 4
5545 #define MC_CMD_NVRAM_READ_IN_OFFSET_OFST 4
5546 #define MC_CMD_NVRAM_READ_IN_OFFSET_LEN 4
5549 #define MC_CMD_NVRAM_READ_IN_LENGTH_LEN 4
5554 #define MC_CMD_NVRAM_READ_IN_V2_TYPE_LEN 4
5557 #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_OFST 4
5558 #define MC_CMD_NVRAM_READ_IN_V2_OFFSET_LEN 4
5561 #define MC_CMD_NVRAM_READ_IN_V2_LENGTH_LEN 4
5562 /* Optional control info. If a partition is stored with an A/B versioning
5565 * from. This allows it to perform a read-modify-write-verify with the write
5571 #define MC_CMD_NVRAM_READ_IN_V2_MODE_LEN 4
5577 /* enum: Read from the current partition of an A/B pair, even if holding the
5581 /* enum: Read from the non-current (i.e. to be updated) partition of an A/B
5601 * Write data to a virtual NVRAM partition. Locks required: PHY_LOCK if
5617 #define MC_CMD_NVRAM_WRITE_IN_TYPE_LEN 4
5620 #define MC_CMD_NVRAM_WRITE_IN_OFFSET_OFST 4
5621 #define MC_CMD_NVRAM_WRITE_IN_OFFSET_LEN 4
5623 #define MC_CMD_NVRAM_WRITE_IN_LENGTH_LEN 4
5636 * Erase sector(s) from a virtual NVRAM partition. Locks required: PHY_LOCK if
5648 #define MC_CMD_NVRAM_ERASE_IN_TYPE_LEN 4
5651 #define MC_CMD_NVRAM_ERASE_IN_OFFSET_OFST 4
5652 #define MC_CMD_NVRAM_ERASE_IN_OFFSET_LEN 4
5654 #define MC_CMD_NVRAM_ERASE_IN_LENGTH_LEN 4
5662 * Finish a group of update operations on a virtual NVRAM partition. Locks
5665 * a TSA controller, MC_CMD_NVRAM_UPDATE_FINISH can only be used on a subset of
5667 * Attempting to perform this operation on a restricted partition will return
5680 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_TYPE_LEN 4
5683 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_OFST 4
5684 #define MC_CMD_NVRAM_UPDATE_FINISH_IN_REBOOT_LEN 4
5693 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_TYPE_LEN 4
5696 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_OFST 4
5697 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_REBOOT_LEN 4
5699 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_FLAGS_LEN 4
5722 * This process takes a few seconds to complete. So is likely to take more than
5725 * MCDI command is run in a background MCDI processing thread. This response
5730 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN 4
5733 * the field are marked with a prefix 'Internal-error'.
5736 #define MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE_LEN 4
5767 /* enum: The image contains a test-signed certificate, but the adapter accepts
5771 /* enum: The image has a lower security level than the current firmware. */
5779 /* enum: Internal-error. The bundle does not have a valid reflash image layout.
5790 /* enum: Internal-error. The number of components in a bundle do not match the
5802 /* enum: Internal-error. The hash of a component does not match the hash stored
5808 /* enum: Internal-error. The component does not have a valid reflash image
5812 /* enum: The bundle processing code failed to copy a component to its target
5825 * assertion failure (at which point it is expected to perform a complete tear
5835 * Locks required: NONE Returns: Nothing. You get back a response with ERR=1,
5844 #define MC_CMD_REBOOT_IN_LEN 4
5846 #define MC_CMD_REBOOT_IN_FLAGS_LEN 4
5868 #define MC_CMD_SCHEDINFO_OUT_LENMIN 4
5871 #define MC_CMD_SCHEDINFO_OUT_LEN(num) (0+4*(num))
5872 #define MC_CMD_SCHEDINFO_OUT_DATA_NUM(len) (((len)-0)/4)
5874 #define MC_CMD_SCHEDINFO_OUT_DATA_LEN 4
5891 #define MC_CMD_REBOOT_MODE_IN_LEN 4
5893 #define MC_CMD_REBOOT_MODE_IN_VALUE_LEN 4
5907 #define MC_CMD_REBOOT_MODE_OUT_LEN 4
5909 #define MC_CMD_REBOOT_MODE_OUT_VALUE_LEN 4
5916 * Each sensor has a single (16bit) value, and a corresponding state. The
5920 * This call returns a mask (32bit) of the sensors that are supported by this
5924 * equal limit values. If one range is used, a value outside that range results
5925 * in STATE_FATAL. If two ranges are used, a value outside the second range
5926 * results in STATE_FATAL while a value outside the first and inside the second
5934 * If the request does not contain a PAGE value then firmware will only return
5937 * If the request contains a PAGE value then firmware responds with the sensor
5952 #define MC_CMD_SENSOR_INFO_EXT_IN_LEN 4
5960 #define MC_CMD_SENSOR_INFO_EXT_IN_PAGE_LEN 4
5971 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_PAGE_LEN 4
5973 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_OFST 4
5974 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_FLAGS_LEN 4
5975 #define MC_CMD_SENSOR_INFO_EXT_IN_V2_ENGINEERING_OFST 4
5980 #define MC_CMD_SENSOR_INFO_OUT_LENMIN 4
5983 #define MC_CMD_SENSOR_INFO_OUT_LEN(num) (4+8*(num))
5984 #define MC_CMD_SENSOR_INFO_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)
5986 #define MC_CMD_SENSOR_INFO_OUT_MASK_LEN 4
6033 /* enum: Fan 4 speed: RPM */
6049 /* enum: Not a sensor: reserved for the next page flag */
6085 /* enum: 0.9v power phase A voltage: mV */
6087 /* enum: 0.9v power phase A current: mA */
6089 /* enum: 0.9V voltage regulator phase A temperature: degC */
6107 /* enum: Not a sensor: reserved for the next page flag */
6167 /* enum: Engineering sensor 4 */
6177 /* enum: Not a sensor: reserved for the next page flag */
6180 #define MC_CMD_SENSOR_ENTRY_OFST 4
6182 #define MC_CMD_SENSOR_ENTRY_LO_OFST 4
6189 #define MC_CMD_SENSOR_INFO_EXT_OUT_LENMIN 4
6192 #define MC_CMD_SENSOR_INFO_EXT_OUT_LEN(num) (4+8*(num))
6193 #define MC_CMD_SENSOR_INFO_EXT_OUT_MC_CMD_SENSOR_ENTRY_NUM(len) (((len)-4)/8)
6195 #define MC_CMD_SENSOR_INFO_EXT_OUT_MASK_LEN 4
6202 /* MC_CMD_SENSOR_ENTRY_OFST 4 */
6204 /* MC_CMD_SENSOR_ENTRY_LO_OFST 4 */
6220 #define MC_CMD_SENSOR_INFO_ENTRY_TYPEDEF_MIN2_OFST 4
6234 * sensors), into host memory. Each array element is a
6242 * The MC will send a SENSOREVT event every time any sensor changes state. The
6254 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6262 #define MC_CMD_READ_SENSORS_IN_DMA_ADDR_HI_OFST 4
6266 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6274 #define MC_CMD_READ_SENSORS_EXT_IN_DMA_ADDR_HI_OFST 4
6277 #define MC_CMD_READ_SENSORS_EXT_IN_LENGTH_LEN 4
6281 /* DMA address of host buffer for sensor readings (must be 4Kbyte aligned).
6289 #define MC_CMD_READ_SENSORS_EXT_IN_V2_DMA_ADDR_HI_OFST 4
6292 #define MC_CMD_READ_SENSORS_EXT_IN_V2_LENGTH_LEN 4
6295 #define MC_CMD_READ_SENSORS_EXT_IN_V2_FLAGS_LEN 4
6307 #define MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_LEN 4
6322 /* enum: Sensor is working but does not currently have a reading. */
6338 * Report current state of PHY. A 'zombie' PHY is a PHY that has failed to boot
6351 #define MC_CMD_GET_PHY_STATE_OUT_LEN 4
6353 #define MC_CMD_GET_PHY_STATE_OUT_STATE_LEN 4
6363 * disable 802.Qbb for a given priority.
6389 #define MC_CMD_WOL_FILTER_GET_OUT_LEN 4
6391 #define MC_CMD_WOL_FILTER_GET_OUT_FILTER_ID_LEN 4
6396 * Add a protocol offload to NIC for lights-out state. Locks required: None.
6408 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_LEN(num) (4+4*(num))
6409 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_NUM(len) (((len)-4)/4)
6411 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4
6414 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_OFST 4
6415 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_DATA_LEN 4
6423 /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */
6424 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_MAC_OFST 4
6427 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_ARP_IP_LEN 4
6432 /* MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4 */
6433 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_IN_NS_MAC_OFST 4
6441 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_LEN 4
6443 #define MC_CMD_ADD_LIGHTSOUT_OFFLOAD_OUT_FILTER_ID_LEN 4
6448 * Remove a protocol offload from NIC for lights-out state. Locks required:
6459 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_PROTOCOL_LEN 4
6460 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_OFST 4
6461 #define MC_CMD_REMOVE_LIGHTSOUT_OFFLOAD_IN_FILTER_ID_LEN 4
6498 #define MC_CMD_TESTASSERT_V2_IN_LEN 4
6501 #define MC_CMD_TESTASSERT_V2_IN_TYPE_LEN 4
6508 /* enum: Deliberately trigger a watchdog */
6510 /* enum: Deliberately trigger a trap by loading from an invalid address */
6512 /* enum: Deliberately trigger a trap by storing to an invalid address */
6523 * Enable/Disable a given workaround. The mcfw will return EINVAL if it doesn't
6524 * understand the given workaround number - which should not be treated as a
6526 * workaround, that's between the driver and the mcfw on a per-workaround
6538 #define MC_CMD_WORKAROUND_IN_TYPE_LEN 4
6566 #define MC_CMD_WORKAROUND_IN_ENABLED_OFST 4
6567 #define MC_CMD_WORKAROUND_IN_ENABLED_LEN 4
6575 #define MC_CMD_WORKAROUND_EXT_OUT_LEN 4
6577 #define MC_CMD_WORKAROUND_EXT_OUT_FLAGS_LEN 4
6588 * output data, are interpreted on a per-type basis. For SFP+: PAGE=0 or 1
6589 * returns a 128-byte block read from module I2C address 0xA0 offset 0 or 0x80.
6598 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN 4
6600 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_PAGE_LEN 4
6606 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(num) (4+1*(num))
6607 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_NUM(len) (((len)-4)/1)
6610 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATALEN_LEN 4
6611 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST 4
6620 * Test a particular NVRAM partition for valid contents (where "valid" depends
6629 #define MC_CMD_NVRAM_TEST_IN_LEN 4
6631 #define MC_CMD_NVRAM_TEST_IN_TYPE_LEN 4
6636 #define MC_CMD_NVRAM_TEST_OUT_LEN 4
6638 #define MC_CMD_NVRAM_TEST_OUT_RESULT_LEN 4
6659 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_LEVEL_LEN 4
6661 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_OFST 4
6662 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_TXEQ_DT_CFG_LEN 4
6665 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_BOOST_LEN 4
6668 #define MC_CMD_MRSFP_TWEAK_IN_EQ_CONFIG_RXEQ_DT_CFG_LEN 4
6677 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_INPUTS_LEN 4
6679 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_OFST 4
6680 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_OUTPUTS_LEN 4
6683 #define MC_CMD_MRSFP_TWEAK_OUT_IOEXP_DIRECTION_LEN 4
6692 * Adjusts the sensor limits. This is a warranty-voiding operation. Returns:
6704 #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4
6708 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4
6709 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4
6712 #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4
6715 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4
6718 #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4
6735 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_BUFTBL_LEN 4
6736 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_OFST 4
6737 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_EVQ_LEN 4
6739 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_RXQ_LEN 4
6741 #define MC_CMD_GET_RESOURCE_LIMITS_OUT_TXQ_LEN 4
6758 #define MC_CMD_NVRAM_PARTITIONS_OUT_LENMIN 4
6761 #define MC_CMD_NVRAM_PARTITIONS_OUT_LEN(num) (4+4*(num))
6762 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_NUM(len) (((len)-4)/4)
6765 #define MC_CMD_NVRAM_PARTITIONS_OUT_NUM_PARTITIONS_LEN 4
6767 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_OFST 4
6768 #define MC_CMD_NVRAM_PARTITIONS_OUT_TYPE_ID_LEN 4
6776 * Reads soft metadata for a virtual NVRAM partition type. Locks required:
6785 #define MC_CMD_NVRAM_METADATA_IN_LEN 4
6788 #define MC_CMD_NVRAM_METADATA_IN_TYPE_LEN 4
6798 #define MC_CMD_NVRAM_METADATA_OUT_TYPE_LEN 4
6799 #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_OFST 4
6800 #define MC_CMD_NVRAM_METADATA_OUT_FLAGS_LEN 4
6801 #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_OFST 4
6804 #define MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_OFST 4
6807 #define MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_OFST 4
6812 #define MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_LEN 4
6822 /* 4th component of W.X.Y.Z version number for content of this partition */
6855 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_COUNT_LEN 4
6858 #define MC_CMD_GET_MAC_ADDRESSES_OUT_MAC_STRIDE_LEN 4
6863 * Perform a CLP related operation, see SF-110495-PS for details of CLP
6874 #define MC_CMD_CLP_IN_LEN 4
6877 #define MC_CMD_CLP_IN_OP_LEN 4
6893 #define MC_CMD_CLP_IN_DEFAULT_LEN 4
6895 /* MC_CMD_CLP_IN_OP_LEN 4 */
6903 /* MC_CMD_CLP_IN_OP_LEN 4 */
6904 /* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00
6906 * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
6908 #define MC_CMD_CLP_IN_SET_MAC_ADDR_OFST 4
6920 /* MC_CMD_CLP_IN_OP_LEN 4 */
6921 /* The MAC address assigned to port. A zero MAC address of 00:00:00:00:00:00
6923 * port. A non-zero MAC address persists until a PCIe reset or a power cycle.
6925 #define MC_CMD_CLP_IN_SET_MAC_V2_ADDR_OFST 4
6931 #define MC_CMD_CLP_IN_SET_MAC_V2_FLAGS_LEN 4
6937 #define MC_CMD_CLP_IN_GET_MAC_LEN 4
6939 /* MC_CMD_CLP_IN_OP_LEN 4 */
6944 /* MC_CMD_CLP_IN_OP_LEN 4 */
6945 #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_OFST 4
6946 #define MC_CMD_CLP_IN_GET_MAC_V2_FLAGS_LEN 4
6947 #define MC_CMD_CLP_IN_GET_MAC_V2_PERMANENT_OFST 4
6963 /* MC_CMD_CLP_IN_OP_LEN 4 */
6965 #define MC_CMD_CLP_IN_SET_BOOT_FLAG_OFST 4
6972 #define MC_CMD_CLP_IN_GET_BOOT_LEN 4
6974 /* MC_CMD_CLP_IN_OP_LEN 4 */
6977 #define MC_CMD_CLP_OUT_GET_BOOT_LEN 4
6988 * Perform a MUM operation
6996 #define MC_CMD_MUM_IN_LEN 4
6998 #define MC_CMD_MUM_IN_OP_HDR_LEN 4
7036 #define MC_CMD_MUM_IN_NULL_LEN 4
7039 #define MC_CMD_MUM_IN_CMD_LEN 4
7042 #define MC_CMD_MUM_IN_GET_VERSION_LEN 4
7045 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7051 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7053 #define MC_CMD_MUM_IN_READ_DEVICE_OFST 4
7054 #define MC_CMD_MUM_IN_READ_DEVICE_LEN 4
7061 #define MC_CMD_MUM_IN_READ_ADDR_LEN 4
7064 #define MC_CMD_MUM_IN_READ_NUMWORDS_LEN 4
7070 #define MC_CMD_MUM_IN_WRITE_LEN(num) (12+4*(num))
7071 #define MC_CMD_MUM_IN_WRITE_BUFFER_NUM(len) (((len)-12)/4)
7074 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7076 #define MC_CMD_MUM_IN_WRITE_DEVICE_OFST 4
7077 #define MC_CMD_MUM_IN_WRITE_DEVICE_LEN 4
7082 #define MC_CMD_MUM_IN_WRITE_ADDR_LEN 4
7085 #define MC_CMD_MUM_IN_WRITE_BUFFER_LEN 4
7098 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7100 #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_OFST 4
7101 #define MC_CMD_MUM_IN_RAW_CMD_CMD_CODE_LEN 4
7104 #define MC_CMD_MUM_IN_RAW_CMD_NUM_WRITE_LEN 4
7107 #define MC_CMD_MUM_IN_RAW_CMD_NUM_READ_LEN 4
7119 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7120 #define MC_CMD_MUM_IN_LOG_OP_OFST 4
7121 #define MC_CMD_MUM_IN_LOG_OP_LEN 4
7127 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7128 /* MC_CMD_MUM_IN_LOG_OP_OFST 4 */
7129 /* MC_CMD_MUM_IN_LOG_OP_LEN 4 */
7132 #define MC_CMD_MUM_IN_LOG_OP_UART_ENABLE_LEN 4
7138 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7139 #define MC_CMD_MUM_IN_GPIO_HDR_OFST 4
7140 #define MC_CMD_MUM_IN_GPIO_HDR_LEN 4
7141 #define MC_CMD_MUM_IN_GPIO_OPCODE_OFST 4
7154 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7155 #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_OFST 4
7156 #define MC_CMD_MUM_IN_GPIO_IN_READ_HDR_LEN 4
7161 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7162 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_OFST 4
7163 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_HDR_LEN 4
7166 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK1_LEN 4
7169 #define MC_CMD_MUM_IN_GPIO_OUT_WRITE_GPIOMASK2_LEN 4
7174 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7175 #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_OFST 4
7176 #define MC_CMD_MUM_IN_GPIO_OUT_READ_HDR_LEN 4
7181 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7182 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_OFST 4
7183 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_HDR_LEN 4
7186 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK1_LEN 4
7189 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_WRITE_GPIOMASK2_LEN 4
7194 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7195 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_OFST 4
7196 #define MC_CMD_MUM_IN_GPIO_OUT_ENABLE_READ_HDR_LEN 4
7201 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7202 #define MC_CMD_MUM_IN_GPIO_OP_HDR_OFST 4
7203 #define MC_CMD_MUM_IN_GPIO_OP_HDR_LEN 4
7204 #define MC_CMD_MUM_IN_GPIO_OP_BITWISE_OP_OFST 4
7211 #define MC_CMD_MUM_IN_GPIO_OP_GPIO_NUMBER_OFST 4
7218 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7219 #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_OFST 4
7220 #define MC_CMD_MUM_IN_GPIO_OP_OUT_READ_HDR_LEN 4
7225 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7226 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_OFST 4
7227 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_HDR_LEN 4
7228 #define MC_CMD_MUM_IN_GPIO_OP_OUT_WRITE_WRITEBIT_OFST 4
7235 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7236 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_OFST 4
7237 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_HDR_LEN 4
7238 #define MC_CMD_MUM_IN_GPIO_OP_OUT_CONFIG_CFG_OFST 4
7245 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7246 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_OFST 4
7247 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_HDR_LEN 4
7248 #define MC_CMD_MUM_IN_GPIO_OP_OUT_ENABLE_ENABLEBIT_OFST 4
7256 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7257 #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_OFST 4
7258 #define MC_CMD_MUM_IN_READ_SENSORS_PARAMS_LEN 4
7259 #define MC_CMD_MUM_IN_READ_SENSORS_SENSOR_ID_OFST 4
7262 #define MC_CMD_MUM_IN_READ_SENSORS_NUM_SENSORS_OFST 4
7270 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7272 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_OFST 4
7273 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_MASK_LEN 4
7279 #define MC_CMD_MUM_IN_PROGRAM_CLOCKS_FLAGS_LEN 4
7294 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7296 #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_OFST 4
7297 #define MC_CMD_MUM_IN_FPGA_LOAD_ENABLE_LEN 4
7300 #define MC_CMD_MUM_IN_READ_ATB_SENSOR_LEN 4
7303 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7309 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7310 #define MC_CMD_MUM_IN_QSFP_HDR_OFST 4
7311 #define MC_CMD_MUM_IN_QSFP_HDR_LEN 4
7312 #define MC_CMD_MUM_IN_QSFP_OPCODE_OFST 4
7314 #define MC_CMD_MUM_IN_QSFP_OPCODE_WIDTH 4
7322 #define MC_CMD_MUM_IN_QSFP_IDX_LEN 4
7327 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7328 #define MC_CMD_MUM_IN_QSFP_INIT_HDR_OFST 4
7329 #define MC_CMD_MUM_IN_QSFP_INIT_HDR_LEN 4
7331 #define MC_CMD_MUM_IN_QSFP_INIT_IDX_LEN 4
7333 #define MC_CMD_MUM_IN_QSFP_INIT_CAGE_LEN 4
7338 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7339 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_OFST 4
7340 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_HDR_LEN 4
7342 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_IDX_LEN 4
7344 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_TX_DISABLE_LEN 4
7346 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LANES_LEN 4
7348 #define MC_CMD_MUM_IN_QSFP_RECONFIGURE_PORT_LINK_SPEED_LEN 4
7353 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7354 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_OFST 4
7355 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_HDR_LEN 4
7357 #define MC_CMD_MUM_IN_QSFP_GET_SUPPORTED_CAP_IDX_LEN 4
7362 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7363 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_OFST 4
7364 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_HDR_LEN 4
7366 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_IDX_LEN 4
7368 #define MC_CMD_MUM_IN_QSFP_GET_MEDIA_INFO_PAGE_LEN 4
7373 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7374 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_OFST 4
7375 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_HDR_LEN 4
7377 #define MC_CMD_MUM_IN_QSFP_FILL_STATS_IDX_LEN 4
7382 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7383 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_OFST 4
7384 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_HDR_LEN 4
7386 #define MC_CMD_MUM_IN_QSFP_POLL_BIST_IDX_LEN 4
7389 #define MC_CMD_MUM_IN_READ_DDR_INFO_LEN 4
7392 /* MC_CMD_MUM_IN_CMD_LEN 4 */
7403 #define MC_CMD_MUM_OUT_GET_VERSION_FIRMWARE_LEN 4
7404 #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_OFST 4
7406 #define MC_CMD_MUM_OUT_GET_VERSION_VERSION_LO_OFST 4
7423 #define MC_CMD_MUM_OUT_READ_LENMIN 4
7426 #define MC_CMD_MUM_OUT_READ_LEN(num) (0+4*(num))
7427 #define MC_CMD_MUM_OUT_READ_BUFFER_NUM(len) (((len)-0)/4)
7429 #define MC_CMD_MUM_OUT_READ_BUFFER_LEN 4
7447 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK1_LEN 4
7449 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_OFST 4
7450 #define MC_CMD_MUM_OUT_GPIO_IN_READ_GPIOMASK2_LEN 4
7459 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK1_LEN 4
7461 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_OFST 4
7462 #define MC_CMD_MUM_OUT_GPIO_OUT_READ_GPIOMASK2_LEN 4
7470 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK1_LEN 4
7471 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_OFST 4
7472 #define MC_CMD_MUM_OUT_GPIO_OUT_ENABLE_READ_GPIOMASK2_LEN 4
7475 #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_LEN 4
7477 #define MC_CMD_MUM_OUT_GPIO_OP_OUT_READ_BIT_READ_LEN 4
7489 #define MC_CMD_MUM_OUT_READ_SENSORS_LENMIN 4
7492 #define MC_CMD_MUM_OUT_READ_SENSORS_LEN(num) (0+4*(num))
7493 #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_NUM(len) (((len)-0)/4)
7495 #define MC_CMD_MUM_OUT_READ_SENSORS_DATA_LEN 4
7510 #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_LEN 4
7512 #define MC_CMD_MUM_OUT_PROGRAM_CLOCKS_OK_MASK_LEN 4
7518 #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_LEN 4
7520 #define MC_CMD_MUM_OUT_READ_ATB_SENSOR_RESULT_LEN 4
7528 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LP_CAP_LEN 4
7529 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_OFST 4
7530 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_FLAGS_LEN 4
7531 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_READY_OFST 4
7534 #define MC_CMD_MUM_OUT_QSFP_RECONFIGURE_PORT_PHY_LINK_UP_OFST 4
7539 #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_LEN 4
7541 #define MC_CMD_MUM_OUT_QSFP_GET_SUPPORTED_CAP_PORT_PHY_LP_CAP_LEN 4
7547 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_LEN(num) (4+1*(num))
7548 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_NUM(len) (((len)-4)/1)
7551 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATALEN_LEN 4
7552 #define MC_CMD_MUM_OUT_QSFP_GET_MEDIA_INFO_DATA_OFST 4
7561 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PMA_PMD_LINK_UP_LEN 4
7562 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_OFST 4
7563 #define MC_CMD_MUM_OUT_QSFP_FILL_STATS_PORT_PHY_STATS_PCS_LINK_UP_LEN 4
7566 #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_LEN 4
7568 #define MC_CMD_MUM_OUT_QSFP_POLL_BIST_TEST_LEN 4
7578 #define MC_CMD_MUM_OUT_READ_DDR_INFO_DISCRETE_DDR_INFO_LEN 4
7586 #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_OFST 4
7587 #define MC_CMD_MUM_OUT_READ_DDR_INFO_NUM_RECORDS_LEN 4
7610 #define MC_CMD_MUM_OUT_READ_DDR_INFO_RANK_WIDTH 4
7613 #define MC_CMD_MUM_OUT_READ_DDR_INFO_VOLTAGE_WIDTH 4
7628 #define MC_CMD_MUM_OUT_READ_DDR_INFO_STATE_WIDTH 4
7652 /* A value below this will trigger a warning event. */
7654 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_WARNING_LEN 4
7657 /* A value below this will trigger a critical event. */
7658 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_OFST 4
7659 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_CRITICAL_LEN 4
7662 /* A value below this will shut down the card. */
7664 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_LO_FATAL_LEN 4
7667 /* A value above this will trigger a warning event. */
7669 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_WARNING_LEN 4
7672 /* A value above this will trigger a critical event. */
7674 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_CRITICAL_LEN 4
7677 /* A value above this will shut down the card. */
7679 #define MC_CMD_DYNAMIC_SENSORS_LIMITS_HI_FATAL_LEN 4
7683 /* MC_CMD_DYNAMIC_SENSORS_DESCRIPTION structuredef: Description of a sensor.
7692 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_HANDLE_LEN 4
7695 /* A human-readable name for the sensor (zero terminated string, max 32 bytes)
7697 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_NAME_OFST 4
7705 #define MC_CMD_DYNAMIC_SENSORS_DESCRIPTION_TYPE_LEN 4
7706 /* enum: A voltage sensor. Unit is mV */
7708 /* enum: A current sensor. Unit is mA */
7710 /* enum: A power sensor. Unit is mW */
7712 /* enum: A temperature sensor. Unit is Celsius */
7714 /* enum: A cooling fan sensor. Unit is RPM */
7718 /* A single MC_CMD_DYNAMIC_SENSORS_LIMITS structure */
7724 /* MC_CMD_DYNAMIC_SENSORS_READING structuredef: State and value of a sensor.
7731 #define MC_CMD_DYNAMIC_SENSORS_READING_HANDLE_LEN 4
7735 #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_OFST 4
7736 #define MC_CMD_DYNAMIC_SENSORS_READING_VALUE_LEN 4
7741 #define MC_CMD_DYNAMIC_SENSORS_READING_STATE_LEN 4
7762 * Return a complete list of handles for sensors currently managed by the MC,
7763 * and a generation count for this version of the sensor table. On systems
7774 * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated
7779 * The sensor count is provided to allow a future path to supporting more than
7781 * the maximum number that will fit in a single response. As this is a fairly
7785 * On Riverhead this command is implemented as a wrapper for `list` in the
7800 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_LEN(num) (8+4*(num))
7801 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_NUM(len) (((len)-8)/4)
7802 /* Generation count, which will be updated each time a sensor is added to or
7806 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_GENERATION_LEN 4
7810 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_OFST 4
7811 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_COUNT_LEN 4
7814 #define MC_CMD_DYNAMIC_SENSORS_LIST_OUT_HANDLES_LEN 4
7822 * Get descriptions for a set of sensors, specified as an array of sensor
7825 * Any handles which do not correspond to a sensor currently managed by the MC
7826 * will be dropped from from the response. This may happen when a sensor table
7830 * On Riverhead this command is implemented as a wrapper for
7842 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_LEN(num) (0+4*(num))
7843 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_NUM(len) (((len)-0)/4)
7846 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_IN_HANDLES_LEN 4
7867 * Read the state and value for a set of sensors, specified as an array of
7870 * In the case of a broken sensor, then the state of the response's
7874 * Any handles which do not correspond to a sensor currently managed by the MC
7875 * will be dropped from from the response. This may happen when a sensor table
7879 * On Riverhead this command is implemented as a wrapper for `get_readings`
7891 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_LEN(num) (0+4*(num))
7892 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_NUM(len) (((len)-0)/4)
7895 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_LEN 4
7928 #define MC_CMD_EVENT_CTRL_IN_LEN(num) (0+4*(num))
7929 #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_NUM(len) (((len)-0)/4)
7932 #define MC_CMD_EVENT_CTRL_IN_EVENT_TYPE_LEN 4
7954 #define EVB_PORT_ID_LEN 4
7956 #define EVB_PORT_ID_PORT_ID_LEN 4
7978 #define EVB_VLAN_TAG_MODE_WIDTH 4
7997 #define BUFTBL_ENTRY_RAWADDR_OFST 4
7999 #define BUFTBL_ENTRY_RAWADDR_LO_OFST 4
8080 /* enum: Spare partition 4 */
8101 * platforms. See SF-119124-PS. The STATIC_CONFIG partition may contain a
8108 * a bundle update in TLV format
8127 #define LICENSED_APP_ID_LEN 4
8129 #define LICENSED_APP_ID_ID_LEN 4
8171 #define LICENSED_FEATURES_MASK_HI_OFST 4
8185 #define LICENSED_FEATURES_RX_TIMESTAMPS_LBN 4
8211 #define LICENSED_V3_APPS_MASK_HI_OFST 4
8225 #define LICENSED_V3_APPS_PERF_MONITOR_LBN 4
8269 #define LICENSED_V3_FEATURES_MASK_HI_OFST 4
8283 #define LICENSED_V3_FEATURES_RX_TIMESTAMPS_LBN 4
8314 /* enum: This is a TX completion event, not a timestamp */
8316 /* enum: This is a TX completion event for a CTPIO transmit. The event format
8320 /* enum: This is the low part of a TX timestamp for a CTPIO transmission. The
8324 /* enum: This is the high part of a TX timestamp for a CTPIO transmission. The
8328 /* enum: This is the low part of a TX timestamp event */
8330 /* enum: This is the high part of a TX timestamp event */
8335 #define TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI_OFST 4
8342 /* The RSS mode for a particular packet type is a value from 0 - 15 which can
8343 * be considered as 4 bits selecting which fields are included in the hash. (A
8345 * generation tools require this structure to be a whole number of bytes wide,
8346 * but only 4 bits are relevant.
8366 #define CTPIO_STATS_MAP_LEN 4
8381 * Get a dump of the MCPU registers
8393 /* Whether the corresponding register entry contains a valid value */
8400 #define MC_CMD_READ_REGS_OUT_REGS_LEN 4
8407 * end with an address for each 4k of host memory required to back the EVQ.
8422 #define MC_CMD_INIT_EVQ_IN_SIZE_LEN 4
8423 /* Desired instance. Must be set to a specific instance, which is a function
8426 #define MC_CMD_INIT_EVQ_IN_INSTANCE_OFST 4
8427 #define MC_CMD_INIT_EVQ_IN_INSTANCE_LEN 4
8431 #define MC_CMD_INIT_EVQ_IN_TMR_LOAD_LEN 4
8434 #define MC_CMD_INIT_EVQ_IN_TMR_RELOAD_LEN 4
8437 #define MC_CMD_INIT_EVQ_IN_FLAGS_LEN 4
8451 #define MC_CMD_INIT_EVQ_IN_FLAG_RX_MERGE_LBN 4
8460 #define MC_CMD_INIT_EVQ_IN_TMR_MODE_LEN 4
8471 #define MC_CMD_INIT_EVQ_IN_TARGET_EVQ_LEN 4
8473 * MC_CMD_RESOURCE_INSTANCE_ANY unless a specific one required for test
8477 #define MC_CMD_INIT_EVQ_IN_IRQ_NUM_LEN 4
8480 #define MC_CMD_INIT_EVQ_IN_COUNT_MODE_LEN 4
8491 #define MC_CMD_INIT_EVQ_IN_COUNT_THRSHLD_LEN 4
8492 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8502 #define MC_CMD_INIT_EVQ_OUT_LEN 4
8505 #define MC_CMD_INIT_EVQ_OUT_IRQ_LEN 4
8515 #define MC_CMD_INIT_EVQ_V2_IN_SIZE_LEN 4
8516 /* Desired instance. Must be set to a specific instance, which is a function
8519 #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_OFST 4
8520 #define MC_CMD_INIT_EVQ_V2_IN_INSTANCE_LEN 4
8524 #define MC_CMD_INIT_EVQ_V2_IN_TMR_LOAD_LEN 4
8527 #define MC_CMD_INIT_EVQ_V2_IN_TMR_RELOAD_LEN 4
8530 #define MC_CMD_INIT_EVQ_V2_IN_FLAGS_LEN 4
8544 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_RX_MERGE_LBN 4
8554 #define MC_CMD_INIT_EVQ_V2_IN_FLAG_TYPE_WIDTH 4
8578 #define MC_CMD_INIT_EVQ_V2_IN_TMR_MODE_LEN 4
8589 #define MC_CMD_INIT_EVQ_V2_IN_TARGET_EVQ_LEN 4
8591 * MC_CMD_RESOURCE_INSTANCE_ANY unless a specific one required for test
8595 #define MC_CMD_INIT_EVQ_V2_IN_IRQ_NUM_LEN 4
8598 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_MODE_LEN 4
8609 #define MC_CMD_INIT_EVQ_V2_IN_COUNT_THRSHLD_LEN 4
8610 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8623 #define MC_CMD_INIT_EVQ_V2_OUT_IRQ_LEN 4
8625 #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_OFST 4
8626 #define MC_CMD_INIT_EVQ_V2_OUT_FLAGS_LEN 4
8627 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_CUT_THRU_OFST 4
8630 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RX_MERGE_OFST 4
8633 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_TX_MERGE_OFST 4
8636 #define MC_CMD_INIT_EVQ_V2_OUT_FLAG_RXQ_FORCE_EV_MERGING_OFST 4
8643 #define QUEUE_CRC_MODE_MODE_WIDTH 4
8656 #define QUEUE_CRC_MODE_SPARE_LBN 4
8657 #define QUEUE_CRC_MODE_SPARE_WIDTH 4
8662 * set up a receive queue according to the supplied parameters. The IN
8663 * arguments end with an address for each 4k of host memory required to back
8681 #define MC_CMD_INIT_RXQ_IN_SIZE_LEN 4
8684 #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_OFST 4
8685 #define MC_CMD_INIT_RXQ_IN_TARGET_EVQ_LEN 4
8688 #define MC_CMD_INIT_RXQ_IN_LABEL_LEN 4
8689 /* Desired instance. Must be set to a specific instance, which is a function
8693 #define MC_CMD_INIT_RXQ_IN_INSTANCE_LEN 4
8696 #define MC_CMD_INIT_RXQ_IN_FLAGS_LEN 4
8708 #define MC_CMD_INIT_RXQ_IN_CRC_MODE_WIDTH 4
8723 #define MC_CMD_INIT_RXQ_IN_OWNER_ID_LEN 4
8726 #define MC_CMD_INIT_RXQ_IN_PORT_ID_LEN 4
8727 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8742 #define MC_CMD_INIT_RXQ_EXT_IN_SIZE_LEN 4
8746 #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_OFST 4
8747 #define MC_CMD_INIT_RXQ_EXT_IN_TARGET_EVQ_LEN 4
8753 #define MC_CMD_INIT_RXQ_EXT_IN_LABEL_LEN 4
8754 /* Desired instance. Must be set to a specific instance, which is a function
8758 #define MC_CMD_INIT_RXQ_EXT_IN_INSTANCE_LEN 4
8761 #define MC_CMD_INIT_RXQ_EXT_IN_FLAGS_LEN 4
8773 #define MC_CMD_INIT_RXQ_EXT_IN_CRC_MODE_WIDTH 4
8785 #define MC_CMD_INIT_RXQ_EXT_IN_DMA_MODE_WIDTH 4
8792 * multiple fixed-size packet buffers within each bucket. For a full
8821 #define MC_CMD_INIT_RXQ_EXT_IN_OWNER_ID_LEN 4
8824 #define MC_CMD_INIT_RXQ_EXT_IN_PORT_ID_LEN 4
8825 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8833 #define MC_CMD_INIT_RXQ_EXT_IN_SNAPSHOT_LENGTH_LEN 4
8839 #define MC_CMD_INIT_RXQ_V3_IN_SIZE_LEN 4
8843 #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_OFST 4
8844 #define MC_CMD_INIT_RXQ_V3_IN_TARGET_EVQ_LEN 4
8850 #define MC_CMD_INIT_RXQ_V3_IN_LABEL_LEN 4
8851 /* Desired instance. Must be set to a specific instance, which is a function
8855 #define MC_CMD_INIT_RXQ_V3_IN_INSTANCE_LEN 4
8858 #define MC_CMD_INIT_RXQ_V3_IN_FLAGS_LEN 4
8870 #define MC_CMD_INIT_RXQ_V3_IN_CRC_MODE_WIDTH 4
8882 #define MC_CMD_INIT_RXQ_V3_IN_DMA_MODE_WIDTH 4
8889 * multiple fixed-size packet buffers within each bucket. For a full
8918 #define MC_CMD_INIT_RXQ_V3_IN_OWNER_ID_LEN 4
8921 #define MC_CMD_INIT_RXQ_V3_IN_PORT_ID_LEN 4
8922 /* 64-bit address of 4k of 4k-aligned host memory buffer */
8930 #define MC_CMD_INIT_RXQ_V3_IN_SNAPSHOT_LENGTH_LEN 4
8936 #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
8943 #define MC_CMD_INIT_RXQ_V3_IN_ES_MAX_DMA_LEN_LEN 4
8944 /* The length in bytes of a single packet buffer within a
8949 #define MC_CMD_INIT_RXQ_V3_IN_ES_PACKET_STRIDE_LEN 4
8952 * are still no descriptors then the packet will be dropped. A timeout of 0
8957 #define MC_CMD_INIT_RXQ_V3_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
8960 * for systems with a QDMA (currently, Riverhead)
8965 #define MC_CMD_INIT_RXQ_V4_IN_SIZE_LEN 4
8969 #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_OFST 4
8970 #define MC_CMD_INIT_RXQ_V4_IN_TARGET_EVQ_LEN 4
8976 #define MC_CMD_INIT_RXQ_V4_IN_LABEL_LEN 4
8977 /* Desired instance. Must be set to a specific instance, which is a function
8981 #define MC_CMD_INIT_RXQ_V4_IN_INSTANCE_LEN 4
8984 #define MC_CMD_INIT_RXQ_V4_IN_FLAGS_LEN 4
8996 #define MC_CMD_INIT_RXQ_V4_IN_CRC_MODE_WIDTH 4
9008 #define MC_CMD_INIT_RXQ_V4_IN_DMA_MODE_WIDTH 4
9015 * multiple fixed-size packet buffers within each bucket. For a full
9044 #define MC_CMD_INIT_RXQ_V4_IN_OWNER_ID_LEN 4
9047 #define MC_CMD_INIT_RXQ_V4_IN_PORT_ID_LEN 4
9048 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9056 #define MC_CMD_INIT_RXQ_V4_IN_SNAPSHOT_LENGTH_LEN 4
9062 #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
9069 #define MC_CMD_INIT_RXQ_V4_IN_ES_MAX_DMA_LEN_LEN 4
9070 /* The length in bytes of a single packet buffer within a
9075 #define MC_CMD_INIT_RXQ_V4_IN_ES_PACKET_STRIDE_LEN 4
9078 * are still no descriptors then the packet will be dropped. A timeout of 0
9083 #define MC_CMD_INIT_RXQ_V4_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
9086 #define MC_CMD_INIT_RXQ_V4_IN_V4_DATA_LEN 4
9089 * Riverhead there is a global limit of eight different buffer sizes across all
9090 * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a
9091 * request for a different buffer size will fail if there are already eight
9096 #define MC_CMD_INIT_RXQ_V4_IN_BUFFER_SIZE_BYTES_LEN 4
9098 /* MC_CMD_INIT_RXQ_V5_IN msgrequest: INIT_RXQ request with ability to request a
9104 #define MC_CMD_INIT_RXQ_V5_IN_SIZE_LEN 4
9108 #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_OFST 4
9109 #define MC_CMD_INIT_RXQ_V5_IN_TARGET_EVQ_LEN 4
9115 #define MC_CMD_INIT_RXQ_V5_IN_LABEL_LEN 4
9116 /* Desired instance. Must be set to a specific instance, which is a function
9120 #define MC_CMD_INIT_RXQ_V5_IN_INSTANCE_LEN 4
9123 #define MC_CMD_INIT_RXQ_V5_IN_FLAGS_LEN 4
9135 #define MC_CMD_INIT_RXQ_V5_IN_CRC_MODE_WIDTH 4
9147 #define MC_CMD_INIT_RXQ_V5_IN_DMA_MODE_WIDTH 4
9154 * multiple fixed-size packet buffers within each bucket. For a full
9183 #define MC_CMD_INIT_RXQ_V5_IN_OWNER_ID_LEN 4
9186 #define MC_CMD_INIT_RXQ_V5_IN_PORT_ID_LEN 4
9187 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9195 #define MC_CMD_INIT_RXQ_V5_IN_SNAPSHOT_LENGTH_LEN 4
9201 #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_BUFFERS_PER_BUCKET_LEN 4
9208 #define MC_CMD_INIT_RXQ_V5_IN_ES_MAX_DMA_LEN_LEN 4
9209 /* The length in bytes of a single packet buffer within a
9214 #define MC_CMD_INIT_RXQ_V5_IN_ES_PACKET_STRIDE_LEN 4
9217 * are still no descriptors then the packet will be dropped. A timeout of 0
9222 #define MC_CMD_INIT_RXQ_V5_IN_ES_HEAD_OF_LINE_BLOCK_TIMEOUT_LEN 4
9225 #define MC_CMD_INIT_RXQ_V5_IN_V4_DATA_LEN 4
9228 * Riverhead there is a global limit of eight different buffer sizes across all
9229 * active queues. A 2KB and 4KB buffer is guaranteed to be available, but a
9230 * request for a different buffer size will fail if there are already eight
9235 #define MC_CMD_INIT_RXQ_V5_IN_BUFFER_SIZE_BYTES_LEN 4
9237 * Zero is always a valid prefix id and means the default prefix format
9239 * MC_CMD_GET_RX_PREFIX_ID with a requested set of prefix fields.
9242 #define MC_CMD_INIT_RXQ_V5_IN_RX_PREFIX_ID_LEN 4
9278 #define MC_CMD_INIT_TXQ_IN_SIZE_LEN 4
9282 #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_OFST 4
9283 #define MC_CMD_INIT_TXQ_IN_TARGET_EVQ_LEN 4
9286 #define MC_CMD_INIT_TXQ_IN_LABEL_LEN 4
9287 /* Desired instance. Must be set to a specific instance, which is a function
9291 #define MC_CMD_INIT_TXQ_IN_INSTANCE_LEN 4
9294 #define MC_CMD_INIT_TXQ_IN_FLAGS_LEN 4
9308 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_LBN 4
9309 #define MC_CMD_INIT_TXQ_IN_CRC_MODE_WIDTH 4
9324 #define MC_CMD_INIT_TXQ_IN_OWNER_ID_LEN 4
9327 #define MC_CMD_INIT_TXQ_IN_PORT_ID_LEN 4
9328 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9343 #define MC_CMD_INIT_TXQ_EXT_IN_SIZE_LEN 4
9347 #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_OFST 4
9348 #define MC_CMD_INIT_TXQ_EXT_IN_TARGET_EVQ_LEN 4
9351 #define MC_CMD_INIT_TXQ_EXT_IN_LABEL_LEN 4
9352 /* Desired instance. Must be set to a specific instance, which is a function
9356 #define MC_CMD_INIT_TXQ_EXT_IN_INSTANCE_LEN 4
9359 #define MC_CMD_INIT_TXQ_EXT_IN_FLAGS_LEN 4
9373 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_LBN 4
9374 #define MC_CMD_INIT_TXQ_EXT_IN_CRC_MODE_WIDTH 4
9404 #define MC_CMD_INIT_TXQ_EXT_IN_OWNER_ID_LEN 4
9407 #define MC_CMD_INIT_TXQ_EXT_IN_PORT_ID_LEN 4
9408 /* 64-bit address of 4k of 4k-aligned host memory buffer */
9418 #define MC_CMD_INIT_TXQ_EXT_IN_QBB_FLAGS_LEN 4
9443 #define MC_CMD_FINI_EVQ_IN_LEN 4
9448 #define MC_CMD_FINI_EVQ_IN_INSTANCE_LEN 4
9456 * Teardown a RXQ.
9464 #define MC_CMD_FINI_RXQ_IN_LEN 4
9467 #define MC_CMD_FINI_RXQ_IN_INSTANCE_LEN 4
9475 * Teardown a TXQ.
9483 #define MC_CMD_FINI_TXQ_IN_LEN 4
9486 #define MC_CMD_FINI_TXQ_IN_INSTANCE_LEN 4
9505 #define MC_CMD_DRIVER_EVENT_IN_EVQ_LEN 4
9507 #define MC_CMD_DRIVER_EVENT_IN_DATA_OFST 4
9509 #define MC_CMD_DRIVER_EVENT_IN_DATA_LO_OFST 4
9518 * Allocate a set of buffer table entries using the specified owner ID. This
9531 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_OWNER_LEN 4
9532 /* Size of buffer table pages to use, in bytes (note that only a few values are
9535 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_OFST 4
9536 #define MC_CMD_ALLOC_BUFTBL_CHUNK_IN_PAGE_SIZE_LEN 4
9541 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_HANDLE_LEN 4
9542 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_OFST 4
9543 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_NUMENTRIES_LEN 4
9546 #define MC_CMD_ALLOC_BUFTBL_CHUNK_OUT_ID_LEN 4
9551 * Reprogram a set of buffer table entries in the specified chunk.
9565 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_HANDLE_LEN 4
9567 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_OFST 4
9568 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_FIRSTID_LEN 4
9571 #define MC_CMD_PROGRAM_BUFTBL_ENTRIES_IN_NUMENTRIES_LEN 4
9594 #define MC_CMD_FREE_BUFTBL_CHUNK_IN_LEN 4
9596 #define MC_CMD_FREE_BUFTBL_CHUNK_IN_HANDLE_LEN 4
9615 #define MC_CMD_FILTER_OP_IN_OP_LEN 4
9629 #define MC_CMD_FILTER_OP_IN_HANDLE_OFST 4
9631 #define MC_CMD_FILTER_OP_IN_HANDLE_LO_OFST 4
9636 #define MC_CMD_FILTER_OP_IN_PORT_ID_LEN 4
9639 #define MC_CMD_FILTER_OP_IN_MATCH_FIELDS_LEN 4
9653 #define MC_CMD_FILTER_OP_IN_MATCH_DST_MAC_LBN 4
9684 #define MC_CMD_FILTER_OP_IN_RX_DEST_LEN 4
9697 #define MC_CMD_FILTER_OP_IN_RX_QUEUE_LEN 4
9700 #define MC_CMD_FILTER_OP_IN_RX_MODE_LEN 4
9707 /* enum: install a filter entry that will never match; for test purposes only
9715 #define MC_CMD_FILTER_OP_IN_RX_CONTEXT_LEN 4
9718 #define MC_CMD_FILTER_OP_IN_TX_DOMAIN_LEN 4
9724 #define MC_CMD_FILTER_OP_IN_TX_DEST_LEN 4
9759 #define MC_CMD_FILTER_OP_IN_FWDEF0_LEN 4
9762 #define MC_CMD_FILTER_OP_IN_FWDEF1_LEN 4
9781 #define MC_CMD_FILTER_OP_EXT_IN_OP_LEN 4
9785 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_OFST 4
9787 #define MC_CMD_FILTER_OP_EXT_IN_HANDLE_LO_OFST 4
9792 #define MC_CMD_FILTER_OP_EXT_IN_PORT_ID_LEN 4
9795 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_FIELDS_LEN 4
9809 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_DST_MAC_LBN 4
9882 #define MC_CMD_FILTER_OP_EXT_IN_RX_DEST_LEN 4
9895 #define MC_CMD_FILTER_OP_EXT_IN_RX_QUEUE_LEN 4
9898 #define MC_CMD_FILTER_OP_EXT_IN_RX_MODE_LEN 4
9905 /* enum: install a filter entry that will never match; for test purposes only
9913 #define MC_CMD_FILTER_OP_EXT_IN_RX_CONTEXT_LEN 4
9916 #define MC_CMD_FILTER_OP_EXT_IN_TX_DOMAIN_LEN 4
9922 #define MC_CMD_FILTER_OP_EXT_IN_TX_DEST_LEN 4
9957 #define MC_CMD_FILTER_OP_EXT_IN_FWDEF0_LEN 4
9963 #define MC_CMD_FILTER_OP_EXT_IN_VNI_OR_VSID_LEN 4
10033 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF0_LEN 4
10038 #define MC_CMD_FILTER_OP_EXT_IN_IFRM_FWDEF1_LEN 4
10059 #define MC_CMD_FILTER_OP_V3_IN_OP_LEN 4
10063 #define MC_CMD_FILTER_OP_V3_IN_HANDLE_OFST 4
10065 #define MC_CMD_FILTER_OP_V3_IN_HANDLE_LO_OFST 4
10070 #define MC_CMD_FILTER_OP_V3_IN_PORT_ID_LEN 4
10073 #define MC_CMD_FILTER_OP_V3_IN_MATCH_FIELDS_LEN 4
10087 #define MC_CMD_FILTER_OP_V3_IN_MATCH_DST_MAC_LBN 4
10160 #define MC_CMD_FILTER_OP_V3_IN_RX_DEST_LEN 4
10173 #define MC_CMD_FILTER_OP_V3_IN_RX_QUEUE_LEN 4
10176 #define MC_CMD_FILTER_OP_V3_IN_RX_MODE_LEN 4
10183 /* enum: install a filter entry that will never match; for test purposes only
10191 #define MC_CMD_FILTER_OP_V3_IN_RX_CONTEXT_LEN 4
10194 #define MC_CMD_FILTER_OP_V3_IN_TX_DOMAIN_LEN 4
10200 #define MC_CMD_FILTER_OP_V3_IN_TX_DEST_LEN 4
10235 #define MC_CMD_FILTER_OP_V3_IN_FWDEF0_LEN 4
10241 #define MC_CMD_FILTER_OP_V3_IN_VNI_OR_VSID_LEN 4
10311 #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF0_LEN 4
10316 #define MC_CMD_FILTER_OP_V3_IN_IFRM_FWDEF1_LEN 4
10334 #define MC_CMD_FILTER_OP_V3_IN_MATCH_ACTION_LEN 4
10347 /* the mark value for MATCH_ACTION_MARK. Requesting a value larger than the
10352 #define MC_CMD_FILTER_OP_V3_IN_MATCH_MARK_VALUE_LEN 4
10358 #define MC_CMD_FILTER_OP_OUT_OP_LEN 4
10362 * handles should be considered opaque to the host, although a value of
10363 * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle.
10365 #define MC_CMD_FILTER_OP_OUT_HANDLE_OFST 4
10367 #define MC_CMD_FILTER_OP_OUT_HANDLE_LO_OFST 4
10378 #define MC_CMD_FILTER_OP_EXT_OUT_OP_LEN 4
10382 * handles should be considered opaque to the host, although a value of
10383 * 0xFFFFFFFF_FFFFFFFF is guaranteed never to be a valid handle.
10385 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_OFST 4
10387 #define MC_CMD_FILTER_OP_EXT_OUT_HANDLE_LO_OFST 4
10403 #define MC_CMD_GET_PARSER_DISP_INFO_IN_LEN 4
10406 #define MC_CMD_GET_PARSER_DISP_INFO_IN_OP_LEN 4
10418 * encapsulated frames, which follow a different match sequence to normal
10431 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(num) (8+4*(num))
10432 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_NUM(len) (((len)-8)/4)
10435 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_OP_LEN 4
10439 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_OFST 4
10440 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES_LEN 4
10445 #define MC_CMD_GET_PARSER_DISP_INFO_OUT_SUPPORTED_MATCHES_LEN 4
10454 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_OP_LEN 4
10458 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_OFST 4
10459 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_RESTRICTION_FLAGS_LEN 4
10460 #define MC_CMD_GET_PARSER_DISP_RESTRICTIONS_OUT_DST_IP_MCAST_ONLY_OFST 4
10465 * returned if a MC_CMD_GET_PARSER_DISP_INFO_IN request is sent with OP value
10473 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_LEN(num) (8+4*(num))
10474 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_NUM(len) (((len)-8)/4)
10477 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_OP_LEN 4
10481 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_OFST 4
10482 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_NUM_SUPPORTED_MATCHES_LEN 4
10487 #define MC_CMD_GET_PARSER_DISP_VNIC_ENCAP_MATCHES_OUT_SUPPORTED_MATCHES_LEN 4
10506 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN 4
10509 #define MC_CMD_GET_PORT_ASSIGNMENT_OUT_PORT_LEN 4
10522 #define MC_CMD_SET_PORT_ASSIGNMENT_IN_LEN 4
10525 #define MC_CMD_SET_PORT_ASSIGNMENT_IN_PORT_LEN 4
10544 #define MC_CMD_ALLOC_VIS_IN_MIN_VI_COUNT_LEN 4
10546 #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_OFST 4
10547 #define MC_CMD_ALLOC_VIS_IN_MAX_VI_COUNT_LEN 4
10555 #define MC_CMD_ALLOC_VIS_OUT_VI_COUNT_LEN 4
10559 #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_OFST 4
10560 #define MC_CMD_ALLOC_VIS_OUT_VI_BASE_LEN 4
10566 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_COUNT_LEN 4
10570 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_OFST 4
10571 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_BASE_LEN 4
10574 #define MC_CMD_ALLOC_VIS_EXT_OUT_VI_SHIFT_LEN 4
10610 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_CURRENT_LEN 4
10612 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_OFST 4
10613 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_MAX_LEN 4
10615 #define MC_CMD_GET_SRIOV_CFG_OUT_FLAGS_LEN 4
10621 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_OFFSET_LEN 4
10624 #define MC_CMD_GET_SRIOV_CFG_OUT_VF_STRIDE_LEN 4
10640 #define MC_CMD_SET_SRIOV_CFG_IN_VF_CURRENT_LEN 4
10642 #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_OFST 4
10643 #define MC_CMD_SET_SRIOV_CFG_IN_VF_MAX_LEN 4
10645 #define MC_CMD_SET_SRIOV_CFG_IN_FLAGS_LEN 4
10653 #define MC_CMD_SET_SRIOV_CFG_IN_VF_OFFSET_LEN 4
10655 * MC_CMD_RESOURCE_INSTANCE_ANY to allow the system to allocate a stride.
10658 #define MC_CMD_SET_SRIOV_CFG_IN_VF_STRIDE_LEN 4
10681 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_COUNT_LEN 4
10685 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_OFST 4
10686 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_BASE_LEN 4
10689 #define MC_CMD_GET_VI_ALLOC_INFO_OUT_VI_SHIFT_LEN 4
10694 * For CmdClient use. Dump pertinent information on a specific absolute VI.
10702 #define MC_CMD_DUMP_VI_STATE_IN_LEN 4
10705 #define MC_CMD_DUMP_VI_STATE_IN_VI_NUMBER_LEN 4
10716 #define MC_CMD_DUMP_VI_STATE_OUT_FUNC_VI_BASE_OFST 4
10739 #define MC_CMD_DUMP_VI_STATE_OUT_VI_EV_META_LEN 4
10820 * Allocate a push I/O buffer for later use with a tx queue.
10831 #define MC_CMD_ALLOC_PIOBUF_OUT_LEN 4
10834 #define MC_CMD_ALLOC_PIOBUF_OUT_PIOBUF_HANDLE_LEN 4
10839 * Free a push I/O buffer.
10847 #define MC_CMD_FREE_PIOBUF_IN_LEN 4
10850 #define MC_CMD_FREE_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
10875 #define MC_CMD_GET_CAPABILITIES_OUT_FLAGS1_LEN 4
10880 #define MC_CMD_GET_CAPABILITIES_OUT_TX_STRIPING_LBN 4
10964 #define MC_CMD_GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID_OFST 4
10984 /* enum: RXDP Test firmware image 4 */
11026 #define MC_CMD_GET_CAPABILITIES_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11077 #define MC_CMD_GET_CAPABILITIES_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11116 #define MC_CMD_GET_CAPABILITIES_OUT_HW_CAPABILITIES_LEN 4
11119 #define MC_CMD_GET_CAPABILITIES_OUT_LICENSE_CAPABILITIES_LEN 4
11128 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS1_LEN 4
11133 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TX_STRIPING_LBN 4
11217 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_DPCPU_FW_ID_OFST 4
11237 /* enum: RXDP Test firmware image 4 */
11279 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11330 #define MC_CMD_GET_CAPABILITIES_V2_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11369 #define MC_CMD_GET_CAPABILITIES_V2_OUT_HW_CAPABILITIES_LEN 4
11372 #define MC_CMD_GET_CAPABILITIES_V2_OUT_LICENSE_CAPABILITIES_LEN 4
11375 #define MC_CMD_GET_CAPABILITIES_V2_OUT_FLAGS2_LEN 4
11389 #define MC_CMD_GET_CAPABILITIES_V2_OUT_RX_CUT_THROUGH_LBN 4
11484 * PF, indexed by PF number. Special values indicate that a PF is either not
11497 * in this field. It is intended for a possible future situation where a more
11499 * should look for a new field supporting the new scheme. The current/old
11503 /* One byte per PF containing the number of its VFs, indexed by PF number. A
11504 * special value indicates that a PF is not present.
11516 #define MC_CMD_GET_CAPABILITIES_V2_OUT_NUM_VIS_PER_PORT_NUM 4
11530 /* Size of a single PIO buffer */
11538 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS1_LEN 4
11543 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TX_STRIPING_LBN 4
11627 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_DPCPU_FW_ID_OFST 4
11647 /* enum: RXDP Test firmware image 4 */
11689 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
11740 #define MC_CMD_GET_CAPABILITIES_V3_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
11779 #define MC_CMD_GET_CAPABILITIES_V3_OUT_HW_CAPABILITIES_LEN 4
11782 #define MC_CMD_GET_CAPABILITIES_V3_OUT_LICENSE_CAPABILITIES_LEN 4
11785 #define MC_CMD_GET_CAPABILITIES_V3_OUT_FLAGS2_LEN 4
11799 #define MC_CMD_GET_CAPABILITIES_V3_OUT_RX_CUT_THROUGH_LBN 4
11894 * PF, indexed by PF number. Special values indicate that a PF is either not
11907 * in this field. It is intended for a possible future situation where a more
11909 * should look for a new field supporting the new scheme. The current/old
11913 /* One byte per PF containing the number of its VFs, indexed by PF number. A
11914 * special value indicates that a PF is not present.
11926 #define MC_CMD_GET_CAPABILITIES_V3_OUT_NUM_VIS_PER_PORT_NUM 4
11940 /* Size of a single PIO buffer */
11944 * is configurable. This is a global setting that the driver must query to
11950 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
11954 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
11956 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
11973 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS1_LEN 4
11978 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TX_STRIPING_LBN 4
12062 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_DPCPU_FW_ID_OFST 4
12082 /* enum: RXDP Test firmware image 4 */
12124 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
12175 #define MC_CMD_GET_CAPABILITIES_V4_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
12214 #define MC_CMD_GET_CAPABILITIES_V4_OUT_HW_CAPABILITIES_LEN 4
12217 #define MC_CMD_GET_CAPABILITIES_V4_OUT_LICENSE_CAPABILITIES_LEN 4
12220 #define MC_CMD_GET_CAPABILITIES_V4_OUT_FLAGS2_LEN 4
12234 #define MC_CMD_GET_CAPABILITIES_V4_OUT_RX_CUT_THROUGH_LBN 4
12329 * PF, indexed by PF number. Special values indicate that a PF is either not
12342 * in this field. It is intended for a possible future situation where a more
12344 * should look for a new field supporting the new scheme. The current/old
12348 /* One byte per PF containing the number of its VFs, indexed by PF number. A
12349 * special value indicates that a PF is not present.
12361 #define MC_CMD_GET_CAPABILITIES_V4_OUT_NUM_VIS_PER_PORT_NUM 4
12375 /* Size of a single PIO buffer */
12379 * is configurable. This is a global setting that the driver must query to
12385 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
12389 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
12391 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
12404 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
12416 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS1_LEN 4
12421 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TX_STRIPING_LBN 4
12505 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_DPCPU_FW_ID_OFST 4
12525 /* enum: RXDP Test firmware image 4 */
12567 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
12618 #define MC_CMD_GET_CAPABILITIES_V5_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
12657 #define MC_CMD_GET_CAPABILITIES_V5_OUT_HW_CAPABILITIES_LEN 4
12660 #define MC_CMD_GET_CAPABILITIES_V5_OUT_LICENSE_CAPABILITIES_LEN 4
12663 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FLAGS2_LEN 4
12677 #define MC_CMD_GET_CAPABILITIES_V5_OUT_RX_CUT_THROUGH_LBN 4
12772 * PF, indexed by PF number. Special values indicate that a PF is either not
12785 * in this field. It is intended for a possible future situation where a more
12787 * should look for a new field supporting the new scheme. The current/old
12791 /* One byte per PF containing the number of its VFs, indexed by PF number. A
12792 * special value indicates that a PF is not present.
12804 #define MC_CMD_GET_CAPABILITIES_V5_OUT_NUM_VIS_PER_PORT_NUM 4
12818 /* Size of a single PIO buffer */
12822 * is configurable. This is a global setting that the driver must query to
12828 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
12832 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
12834 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
12847 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
12858 #define MC_CMD_GET_CAPABILITIES_V5_OUT_FILTER_ACTION_MARK_MAX_LEN 4
12864 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS1_LEN 4
12869 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TX_STRIPING_LBN 4
12953 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_DPCPU_FW_ID_OFST 4
12973 /* enum: RXDP Test firmware image 4 */
13015 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
13066 #define MC_CMD_GET_CAPABILITIES_V6_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
13105 #define MC_CMD_GET_CAPABILITIES_V6_OUT_HW_CAPABILITIES_LEN 4
13108 #define MC_CMD_GET_CAPABILITIES_V6_OUT_LICENSE_CAPABILITIES_LEN 4
13111 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FLAGS2_LEN 4
13125 #define MC_CMD_GET_CAPABILITIES_V6_OUT_RX_CUT_THROUGH_LBN 4
13220 * PF, indexed by PF number. Special values indicate that a PF is either not
13233 * in this field. It is intended for a possible future situation where a more
13235 * should look for a new field supporting the new scheme. The current/old
13239 /* One byte per PF containing the number of its VFs, indexed by PF number. A
13240 * special value indicates that a PF is not present.
13252 #define MC_CMD_GET_CAPABILITIES_V6_OUT_NUM_VIS_PER_PORT_NUM 4
13266 /* Size of a single PIO buffer */
13270 * is configurable. This is a global setting that the driver must query to
13276 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
13280 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
13282 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
13295 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
13306 #define MC_CMD_GET_CAPABILITIES_V6_OUT_FILTER_ACTION_MARK_MAX_LEN 4
13308 * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when
13309 * they create an RX queue. Due to hardware limitations, only a small number of
13316 #define MC_CMD_GET_CAPABILITIES_V6_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
13323 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS1_LEN 4
13328 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TX_STRIPING_LBN 4
13412 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_DPCPU_FW_ID_OFST 4
13432 /* enum: RXDP Test firmware image 4 */
13474 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
13525 #define MC_CMD_GET_CAPABILITIES_V7_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
13564 #define MC_CMD_GET_CAPABILITIES_V7_OUT_HW_CAPABILITIES_LEN 4
13567 #define MC_CMD_GET_CAPABILITIES_V7_OUT_LICENSE_CAPABILITIES_LEN 4
13570 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS2_LEN 4
13584 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RX_CUT_THROUGH_LBN 4
13679 * PF, indexed by PF number. Special values indicate that a PF is either not
13692 * in this field. It is intended for a possible future situation where a more
13694 * should look for a new field supporting the new scheme. The current/old
13698 /* One byte per PF containing the number of its VFs, indexed by PF number. A
13699 * special value indicates that a PF is not present.
13711 #define MC_CMD_GET_CAPABILITIES_V7_OUT_NUM_VIS_PER_PORT_NUM 4
13725 /* Size of a single PIO buffer */
13729 * is configurable. This is a global setting that the driver must query to
13735 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
13739 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
13741 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
13754 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
13765 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FILTER_ACTION_MARK_MAX_LEN 4
13767 * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when
13768 * they create an RX queue. Due to hardware limitations, only a small number of
13775 #define MC_CMD_GET_CAPABILITIES_V7_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
13779 #define MC_CMD_GET_CAPABILITIES_V7_OUT_FLAGS3_LEN 4
13793 #define MC_CMD_GET_CAPABILITIES_V7_OUT_VDPA_SUPPORTED_LBN 4
13809 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS1_LEN 4
13814 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TX_STRIPING_LBN 4
13898 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_DPCPU_FW_ID_OFST 4
13918 /* enum: RXDP Test firmware image 4 */
13960 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
14011 #define MC_CMD_GET_CAPABILITIES_V8_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
14050 #define MC_CMD_GET_CAPABILITIES_V8_OUT_HW_CAPABILITIES_LEN 4
14053 #define MC_CMD_GET_CAPABILITIES_V8_OUT_LICENSE_CAPABILITIES_LEN 4
14056 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS2_LEN 4
14070 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RX_CUT_THROUGH_LBN 4
14165 * PF, indexed by PF number. Special values indicate that a PF is either not
14178 * in this field. It is intended for a possible future situation where a more
14180 * should look for a new field supporting the new scheme. The current/old
14184 /* One byte per PF containing the number of its VFs, indexed by PF number. A
14185 * special value indicates that a PF is not present.
14197 #define MC_CMD_GET_CAPABILITIES_V8_OUT_NUM_VIS_PER_PORT_NUM 4
14211 /* Size of a single PIO buffer */
14215 * is configurable. This is a global setting that the driver must query to
14221 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
14225 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
14227 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
14240 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
14251 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FILTER_ACTION_MARK_MAX_LEN 4
14253 * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when
14254 * they create an RX queue. Due to hardware limitations, only a small number of
14261 #define MC_CMD_GET_CAPABILITIES_V8_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
14265 #define MC_CMD_GET_CAPABILITIES_V8_OUT_FLAGS3_LEN 4
14279 #define MC_CMD_GET_CAPABILITIES_V8_OUT_VDPA_SUPPORTED_LBN 4
14303 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS1_LEN 4
14308 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TX_STRIPING_LBN 4
14392 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_DPCPU_FW_ID_OFST 4
14412 /* enum: RXDP Test firmware image 4 */
14454 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RXPD_FW_VERSION_TYPE_WIDTH 4
14505 #define MC_CMD_GET_CAPABILITIES_V9_OUT_TXPD_FW_VERSION_TYPE_WIDTH 4
14544 #define MC_CMD_GET_CAPABILITIES_V9_OUT_HW_CAPABILITIES_LEN 4
14547 #define MC_CMD_GET_CAPABILITIES_V9_OUT_LICENSE_CAPABILITIES_LEN 4
14550 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS2_LEN 4
14564 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RX_CUT_THROUGH_LBN 4
14659 * PF, indexed by PF number. Special values indicate that a PF is either not
14672 * in this field. It is intended for a possible future situation where a more
14674 * should look for a new field supporting the new scheme. The current/old
14678 /* One byte per PF containing the number of its VFs, indexed by PF number. A
14679 * special value indicates that a PF is not present.
14691 #define MC_CMD_GET_CAPABILITIES_V9_OUT_NUM_VIS_PER_PORT_NUM 4
14705 /* Size of a single PIO buffer */
14709 * is configurable. This is a global setting that the driver must query to
14715 /* enum: Each VI occupies 8k as on Huntington and Medford. PIO is at offset 4k.
14719 /* enum: Each VI occupies 16k. PIO is at offset 4k. CTPIO is at offset 12k. */
14721 /* enum: Each VI occupies 64k. PIO is at offset 4k. CTPIO is at offset 12k. */
14734 * entry. For MAC stats DMA, drivers should allocate a buffer large enough to
14745 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FILTER_ACTION_MARK_MAX_LEN 4
14747 * GET_CAPABILITIES_OUT_V2) is set, drivers have to specify a buffer size when
14748 * they create an RX queue. Due to hardware limitations, only a small number of
14755 #define MC_CMD_GET_CAPABILITIES_V9_OUT_GUARANTEED_RX_BUFFER_SIZES_LEN 4
14759 #define MC_CMD_GET_CAPABILITIES_V9_OUT_FLAGS3_LEN 4
14773 #define MC_CMD_GET_CAPABILITIES_V9_OUT_VDPA_SUPPORTED_LBN 4
14793 * from the pool for an RSS context. Note that the table size used must be a
14797 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MIN_INDIRECTION_TABLE_SIZE_LEN 4
14799 * from the pool for an RSS context. Note that the table size used must be a
14803 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_TABLE_SIZE_LEN 4
14805 * mode. In exclusive mode the context has a configurable indirection table and
14806 * a configurable RSS key.
14809 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_INDIRECTION_QUEUES_LEN 4
14812 * but it does have a configurable RSS key.
14815 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_MAX_EVEN_SPREADING_QUEUES_LEN 4
14818 * availability of indirection table space allocated from a common pool.
14821 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_NUM_CONTEXTS_LEN 4
14826 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_TABLE_POOL_SIZE_LEN 4
14831 * Encapsulation for a v2 extended command
14836 #define MC_CMD_V2_EXTN_IN_LEN 4
14851 #define MC_CMD_V2_EXTN_IN_MESSAGE_TYPE_WIDTH 4
14854 /* enum: MCDI command directed to a TSA controller. MCDI responses of this type
14862 * Link a push I/O buffer to a TxQ
14873 #define MC_CMD_LINK_PIOBUF_IN_PIOBUF_HANDLE_LEN 4
14875 #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_OFST 4
14876 #define MC_CMD_LINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
14884 * Unlink a push I/O buffer from a TxQ
14892 #define MC_CMD_UNLINK_PIOBUF_IN_LEN 4
14895 #define MC_CMD_UNLINK_PIOBUF_IN_TXQ_INSTANCE_LEN 4
14903 * allocate and initialise a v-switch.
14914 #define MC_CMD_VSWITCH_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
14916 #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_OFST 4
14917 #define MC_CMD_VSWITCH_ALLOC_IN_TYPE_LEN 4
14930 #define MC_CMD_VSWITCH_ALLOC_IN_FLAGS_LEN 4
14942 #define MC_CMD_VSWITCH_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
14950 * de-allocate a v-switch.
14958 #define MC_CMD_VSWITCH_FREE_IN_LEN 4
14961 #define MC_CMD_VSWITCH_FREE_IN_UPSTREAM_PORT_ID_LEN 4
14970 * It may be used to check if a v-switch is connected to a given EVB port (if
14979 #define MC_CMD_VSWITCH_QUERY_IN_LEN 4
14982 #define MC_CMD_VSWITCH_QUERY_IN_UPSTREAM_PORT_ID_LEN 4
14990 * allocate a v-port.
15001 #define MC_CMD_VPORT_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15003 #define MC_CMD_VPORT_ALLOC_IN_TYPE_OFST 4
15004 #define MC_CMD_VPORT_ALLOC_IN_TYPE_LEN 4
15011 /* enum: A normal v-port receives packets which match a specified MAC and/or
15025 #define MC_CMD_VPORT_ALLOC_IN_FLAGS_LEN 4
15037 #define MC_CMD_VPORT_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
15040 #define MC_CMD_VPORT_ALLOC_IN_VLAN_TAGS_LEN 4
15049 #define MC_CMD_VPORT_ALLOC_OUT_LEN 4
15052 #define MC_CMD_VPORT_ALLOC_OUT_VPORT_ID_LEN 4
15057 * de-allocate a v-port.
15065 #define MC_CMD_VPORT_FREE_IN_LEN 4
15068 #define MC_CMD_VPORT_FREE_IN_VPORT_ID_LEN 4
15076 * allocate a v-adaptor.
15087 #define MC_CMD_VADAPTOR_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15090 #define MC_CMD_VADAPTOR_ALLOC_IN_FLAGS_LEN 4
15099 #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLANS_LEN 4
15102 #define MC_CMD_VADAPTOR_ALLOC_IN_NUM_VLAN_TAGS_LEN 4
15105 #define MC_CMD_VADAPTOR_ALLOC_IN_VLAN_TAGS_LEN 4
15124 * de-allocate a v-adaptor.
15132 #define MC_CMD_VADAPTOR_FREE_IN_LEN 4
15135 #define MC_CMD_VADAPTOR_FREE_IN_UPSTREAM_PORT_ID_LEN 4
15143 * assign a new MAC address to a v-adaptor.
15154 #define MC_CMD_VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID_LEN 4
15156 #define MC_CMD_VADAPTOR_SET_MAC_IN_MACADDR_OFST 4
15165 * read the MAC address assigned to a v-adaptor.
15173 #define MC_CMD_VADAPTOR_GET_MAC_IN_LEN 4
15176 #define MC_CMD_VADAPTOR_GET_MAC_IN_UPSTREAM_PORT_ID_LEN 4
15195 #define MC_CMD_VADAPTOR_QUERY_IN_LEN 4
15198 #define MC_CMD_VADAPTOR_QUERY_IN_UPSTREAM_PORT_ID_LEN 4
15204 #define MC_CMD_VADAPTOR_QUERY_OUT_PORT_FLAGS_LEN 4
15206 #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_OFST 4
15207 #define MC_CMD_VADAPTOR_QUERY_OUT_VADAPTOR_FLAGS_LEN 4
15210 #define MC_CMD_VADAPTOR_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4
15215 * assign a port to a PCI function.
15226 #define MC_CMD_EVB_PORT_ASSIGN_IN_PORT_ID_LEN 4
15228 #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_OFST 4
15229 #define MC_CMD_EVB_PORT_ASSIGN_IN_FUNCTION_LEN 4
15230 #define MC_CMD_EVB_PORT_ASSIGN_IN_PF_OFST 4
15233 #define MC_CMD_EVB_PORT_ASSIGN_IN_VF_OFST 4
15253 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION0_LEN 4
15254 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_OFST 4
15255 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION1_LEN 4
15257 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION2_LEN 4
15259 #define MC_CMD_RDWR_A64_REGIONS_IN_REGION3_LEN 4
15262 #define MC_CMD_RDWR_A64_REGIONS_IN_WRITE_MASK_WIDTH 4
15271 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION0_LEN 4
15272 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_OFST 4
15273 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION1_LEN 4
15275 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION2_LEN 4
15277 #define MC_CMD_RDWR_A64_REGIONS_OUT_REGION3_LEN 4
15290 #define MC_CMD_ONLOAD_STACK_ALLOC_IN_LEN 4
15293 #define MC_CMD_ONLOAD_STACK_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15296 #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_LEN 4
15299 #define MC_CMD_ONLOAD_STACK_ALLOC_OUT_ONLOAD_STACK_ID_LEN 4
15312 #define MC_CMD_ONLOAD_STACK_FREE_IN_LEN 4
15315 #define MC_CMD_ONLOAD_STACK_FREE_IN_ONLOAD_STACK_ID_LEN 4
15334 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID_LEN 4
15336 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_OFST 4
15337 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_LEN 4
15338 /* enum: Allocate a context for exclusive use. The key and indirection table
15342 /* enum: Allocate a context for shared use; this will spread across a range of
15344 * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64.
15347 /* enum: Allocate a context to spread evenly across an arbitrary number of
15360 * be useful as a way of obtaining the Toeplitz hash.
15363 #define MC_CMD_RSS_CONTEXT_ALLOC_IN_NUM_QUEUES_LEN 4
15369 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_UPSTREAM_PORT_ID_LEN 4
15371 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_OFST 4
15372 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_TYPE_LEN 4
15373 /* enum: Allocate a context for exclusive use. The key and indirection table
15377 /* enum: Allocate a context for shared use; this will spread across a range of
15379 * changed. For this mode, NUM_QUEUES must 2, 4, 8, 16, 32 or 64.
15382 /* enum: Allocate a context to spread evenly across an arbitrary number of
15395 * be useful as a way of obtaining the Toeplitz hash.
15398 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_NUM_QUEUES_LEN 4
15400 * Must be a power of 2. The minimum and maximum table size can be queried
15407 #define MC_CMD_RSS_CONTEXT_ALLOC_V2_IN_INDIRECTION_TABLE_SIZE_LEN 4
15410 #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN 4
15412 * host, although a value of 0xFFFFFFFF is guaranteed never to be a valid
15416 #define MC_CMD_RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID_LEN 4
15431 #define MC_CMD_RSS_CONTEXT_FREE_IN_LEN 4
15434 #define MC_CMD_RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID_LEN 4
15453 #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID_LEN 4
15455 #define MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_OFST 4
15472 #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_LEN 4
15475 #define MC_CMD_RSS_CONTEXT_GET_KEY_IN_RSS_CONTEXT_ID_LEN 4
15480 #define MC_CMD_RSS_CONTEXT_GET_KEY_OUT_TOEPLITZ_KEY_OFST 4
15488 * when the RSS context is allocated without specifying a table size.
15499 #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15501 #define MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_OFST 4
15512 * when the RSS context is allocated without specifying a table size.
15520 #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_LEN 4
15523 #define MC_CMD_RSS_CONTEXT_GET_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15528 #define MC_CMD_RSS_CONTEXT_GET_TABLE_OUT_INDIRECTION_TABLE_OFST 4
15534 * Write a portion of a selectable-size indirection table for an RSS context.
15547 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_LEN(num) (4+4*(num))
15548 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_NUM(len) (((len)-4)/4)
15551 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15555 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_OFST 4
15556 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_IN_ENTRIES_LEN 4
15565 #define MC_CMD_RSS_CONTEXT_WRITE_TABLE_ENTRY_LEN 4
15580 * Read a portion of a selectable-size indirection table for an RSS context.
15593 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_LEN(num) (4+2*(num))
15594 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_NUM(len) (((len)-4)/2)
15597 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_RSS_CONTEXT_ID_LEN 4
15599 #define MC_CMD_RSS_CONTEXT_READ_TABLE_IN_INDICES_OFST 4
15611 /* A buffer containing the requested entries read from the table. */
15632 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID_LEN 4
15639 * reject any attempt to set the FLAGS field to a value > 0xff with EINVAL. In
15645 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_OFST 4
15646 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_FLAGS_LEN 4
15647 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN_OFST 4
15650 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN_OFST 4
15653 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN_OFST 4
15656 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN_OFST 4
15659 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_OFST 4
15660 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_LBN 4
15661 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_RESERVED_WIDTH 4
15662 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_OFST 4
15664 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH 4
15665 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_OFST 4
15667 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV4_RSS_MODE_WIDTH 4
15668 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_OFST 4
15670 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH 4
15671 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_OFST 4
15673 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH 4
15674 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_OFST 4
15676 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_UDP_IPV6_RSS_MODE_WIDTH 4
15677 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_OFST 4
15679 #define MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH 4
15695 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_LEN 4
15698 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_IN_RSS_CONTEXT_ID_LEN 4
15707 * guaranteed to be consistent with the _EN flags for a freshly-allocated RSS
15712 * mode by looking only at the _MODE bits; the value returned by a GET can
15713 * always be used for a SET regardless of old/new driver vs. old/new firmware.
15715 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_OFST 4
15716 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_FLAGS_LEN 4
15717 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV4_EN_OFST 4
15720 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV4_EN_OFST 4
15723 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_IPV6_EN_OFST 4
15726 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TOEPLITZ_TCPV6_EN_OFST 4
15729 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_OFST 4
15730 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_LBN 4
15731 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_RESERVED_WIDTH 4
15732 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_OFST 4
15734 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV4_RSS_MODE_WIDTH 4
15735 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_OFST 4
15737 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV4_RSS_MODE_WIDTH 4
15738 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_OFST 4
15740 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV4_RSS_MODE_WIDTH 4
15741 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_OFST 4
15743 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_TCP_IPV6_RSS_MODE_WIDTH 4
15744 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_OFST 4
15746 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_UDP_IPV6_RSS_MODE_WIDTH 4
15747 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_OFST 4
15749 #define MC_CMD_RSS_CONTEXT_GET_FLAGS_OUT_OTHER_IPV6_RSS_MODE_WIDTH 4
15754 * Add a MAC address to a v-port
15765 #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_VPORT_ID_LEN 4
15767 #define MC_CMD_VPORT_ADD_MAC_ADDRESS_IN_MACADDR_OFST 4
15776 * Delete a MAC address from a v-port
15787 #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_VPORT_ID_LEN 4
15789 #define MC_CMD_VPORT_DEL_MAC_ADDRESS_IN_MACADDR_OFST 4
15798 * Delete a MAC address from a v-port
15806 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_LEN 4
15809 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_IN_VPORT_ID_LEN 4
15812 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LENMIN 4
15815 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_LEN(num) (4+6*(num))
15816 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_NUM(len) (((len)-4)/6)
15819 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_COUNT_LEN 4
15821 #define MC_CMD_VPORT_GET_MAC_ADDRESSES_OUT_MACADDR_OFST 4
15843 #define MC_CMD_VPORT_RECONFIGURE_IN_VPORT_ID_LEN 4
15845 #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_OFST 4
15846 #define MC_CMD_VPORT_RECONFIGURE_IN_FLAGS_LEN 4
15847 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_VLAN_TAGS_OFST 4
15850 #define MC_CMD_VPORT_RECONFIGURE_IN_REPLACE_MACADDRS_OFST 4
15858 #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_VLAN_TAGS_LEN 4
15861 #define MC_CMD_VPORT_RECONFIGURE_IN_VLAN_TAGS_LEN 4
15870 #define MC_CMD_VPORT_RECONFIGURE_IN_NUM_MACADDRS_LEN 4
15874 #define MC_CMD_VPORT_RECONFIGURE_IN_MACADDRS_NUM 4
15877 #define MC_CMD_VPORT_RECONFIGURE_OUT_LEN 4
15879 #define MC_CMD_VPORT_RECONFIGURE_OUT_FLAGS_LEN 4
15895 #define MC_CMD_EVB_PORT_QUERY_IN_LEN 4
15898 #define MC_CMD_EVB_PORT_QUERY_IN_PORT_ID_LEN 4
15904 #define MC_CMD_EVB_PORT_QUERY_OUT_PORT_FLAGS_LEN 4
15905 /* The number of VLAN tags that may be used on a v-adaptor connected to this
15908 #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_OFST 4
15909 #define MC_CMD_EVB_PORT_QUERY_OUT_NUM_AVAILABLE_VLAN_TAGS_LEN 4
15928 #define MC_CMD_GET_CLOCK_OUT_SYS_FREQ_LEN 4
15930 #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_OFST 4
15931 #define MC_CMD_GET_CLOCK_OUT_DPCPU_FREQ_LEN 4
15944 #define MC_CMD_TRIGGER_INTERRUPT_IN_LEN 4
15947 #define MC_CMD_TRIGGER_INTERRUPT_IN_INTR_LEVEL_LEN 4
15963 #define MC_CMD_SHMBOOT_OP_IN_LEN 4
15966 #define MC_CMD_SHMBOOT_OP_IN_SHMBOOT_OP_LEN 4
15976 * Adjusts power supply parameters. This is a warranty-voiding operation.
15988 #define MC_CMD_SET_PSU_IN_PARAM_LEN 4
15990 #define MC_CMD_SET_PSU_IN_RAIL_OFST 4
15991 #define MC_CMD_SET_PSU_IN_RAIL_LEN 4
15996 #define MC_CMD_SET_PSU_IN_VALUE_LEN 4
16017 #define MC_CMD_GET_FUNCTION_INFO_OUT_PF_LEN 4
16018 #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_OFST 4
16019 #define MC_CMD_GET_FUNCTION_INFO_OUT_VF_LEN 4
16053 #define MC_CMD_READ_FUSES_IN_OFFSET_LEN 4
16055 #define MC_CMD_READ_FUSES_IN_LENGTH_OFST 4
16056 #define MC_CMD_READ_FUSES_IN_LENGTH_LEN 4
16059 #define MC_CMD_READ_FUSES_OUT_LENMIN 4
16062 #define MC_CMD_READ_FUSES_OUT_LEN(num) (4+1*(num))
16063 #define MC_CMD_READ_FUSES_OUT_DATA_NUM(len) (((len)-4)/1)
16066 #define MC_CMD_READ_FUSES_OUT_LENGTH_LEN 4
16068 #define MC_CMD_READ_FUSES_OUT_DATA_OFST 4
16086 #define MC_CMD_LICENSING_IN_LEN 4
16089 #define MC_CMD_LICENSING_IN_OP_LEN 4
16090 /* enum: re-read and apply licenses after a license key partition update; note
16091 * that this operation returns a zero-length response
16101 #define MC_CMD_LICENSING_OUT_VALID_APP_KEYS_LEN 4
16105 #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_OFST 4
16106 #define MC_CMD_LICENSING_OUT_INVALID_APP_KEYS_LEN 4
16109 #define MC_CMD_LICENSING_OUT_BLACKLISTED_APP_KEYS_LEN 4
16112 #define MC_CMD_LICENSING_OUT_UNVERIFIABLE_APP_KEYS_LEN 4
16116 #define MC_CMD_LICENSING_OUT_WRONG_NODE_APP_KEYS_LEN 4
16121 #define MC_CMD_LICENSING_OUT_LICENSING_STATE_LEN 4
16124 #define MC_CMD_LICENSING_OUT_LICENSING_SELF_TEST_LEN 4
16142 #define MC_CMD_LICENSING_V3_IN_LEN 4
16145 #define MC_CMD_LICENSING_V3_IN_OP_LEN 4
16146 /* enum: re-read and apply licenses after a license key partition update; note
16147 * that this operation returns a zero-length response
16159 #define MC_CMD_LICENSING_V3_OUT_VALID_KEYS_LEN 4
16163 #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_OFST 4
16164 #define MC_CMD_LICENSING_V3_OUT_INVALID_KEYS_LEN 4
16167 #define MC_CMD_LICENSING_V3_OUT_UNVERIFIABLE_KEYS_LEN 4
16170 #define MC_CMD_LICENSING_V3_OUT_WRONG_NODE_KEYS_LEN 4
16175 #define MC_CMD_LICENSING_V3_OUT_LICENSING_STATE_LEN 4
16178 #define MC_CMD_LICENSING_V3_OUT_LICENSING_SELF_TEST_LEN 4
16222 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_TYPE_LEN 4
16224 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_OFST 4
16225 #define MC_CMD_LICENSING_GET_ID_V3_OUT_LICENSE_ID_LENGTH_LEN 4
16238 * or a reboot of the MC.) Not used for V3 licensing
16246 #define MC_CMD_GET_LICENSED_APP_STATE_IN_LEN 4
16249 #define MC_CMD_GET_LICENSED_APP_STATE_IN_APP_ID_LEN 4
16252 #define MC_CMD_GET_LICENSED_APP_STATE_OUT_LEN 4
16255 #define MC_CMD_GET_LICENSED_APP_STATE_OUT_STATE_LEN 4
16258 /* enum: a valid license is present for the application */
16266 * operation or a reboot of the MC.) Used for V3 licensing (Medford)
16275 /* application ID to query (LICENSED_V3_APPS_xxx) expressed as a single bit
16281 #define MC_CMD_GET_LICENSED_V3_APP_STATE_IN_APP_ID_HI_OFST 4
16284 #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_LEN 4
16287 #define MC_CMD_GET_LICENSED_V3_APP_STATE_OUT_STATE_LEN 4
16290 /* enum: a valid license is present for the application */
16298 * operation or a reboot of the MC.) Used for V3 licensing (Medford)
16307 /* features to query (LICENSED_V3_FEATURES_xxx) expressed as a mask with one or
16313 #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_IN_FEATURES_HI_OFST 4
16321 #define MC_CMD_GET_LICENSED_V3_FEATURE_STATES_OUT_STATES_HI_OFST 4
16338 #define MC_CMD_LICENSED_APP_OP_IN_LEN(num) (8+4*(num))
16339 #define MC_CMD_LICENSED_APP_OP_IN_ARGS_NUM(len) (((len)-8)/4)
16342 #define MC_CMD_LICENSED_APP_OP_IN_APP_ID_LEN 4
16344 #define MC_CMD_LICENSED_APP_OP_IN_OP_OFST 4
16345 #define MC_CMD_LICENSED_APP_OP_IN_OP_LEN 4
16352 #define MC_CMD_LICENSED_APP_OP_IN_ARGS_LEN 4
16361 #define MC_CMD_LICENSED_APP_OP_OUT_LEN(num) (0+4*(num))
16362 #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_NUM(len) (((len)-0)/4)
16365 #define MC_CMD_LICENSED_APP_OP_OUT_RESULT_LEN 4
16374 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_APP_ID_LEN 4
16376 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_OFST 4
16377 #define MC_CMD_LICENSED_APP_OP_VALIDATE_IN_OP_LEN 4
16386 #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_EXPIRY_LEN 4
16388 #define MC_CMD_LICENSED_APP_OP_VALIDATE_OUT_RESPONSE_OFST 4
16395 #define MC_CMD_LICENSED_APP_OP_MASK_IN_APP_ID_LEN 4
16397 #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_OFST 4
16398 #define MC_CMD_LICENSED_APP_OP_MASK_IN_OP_LEN 4
16401 #define MC_CMD_LICENSED_APP_OP_MASK_IN_FLAG_LEN 4
16422 /* application ID expressed as a single bit mask */
16431 * of two 384-bit integers, r and s, in big-endian order. The signature signs a
16432 * SHA-384 digest of a message constructed from the concatenation of the input
16434 * bytes] ... expiry_time[4 bytes] ...
16440 #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_TIME_LEN 4
16443 #define MC_CMD_LICENSED_V3_VALIDATE_APP_OUT_EXPIRY_UNITS_LEN 4
16448 /* base MAC address of the NIC stored in NVRAM (note that this is a constant
16449 * value for a given NIC regardless which function is calling, effectively this
16476 #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_MASK_HI_OFST 4
16479 #define MC_CMD_LICENSED_V3_MASK_FEATURES_IN_FLAG_LEN 4
16491 * Perform operations to support installation of a single temporary license in
16494 * stored in MC persistent data and so will survive a MC reboot, but will be
16503 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_LEN 4
16506 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_OP_LEN 4
16507 /* enum: install a new license, overwriting any existing temporary license.
16524 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_OP_LEN 4
16526 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_SET_LICENSE_OFST 4
16530 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_LEN 4
16532 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_CLEAR_OP_LEN 4
16535 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_LEN 4
16537 #define MC_CMD_LICENSING_V3_TEMPORARY_IN_STATUS_OP_LEN 4
16543 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_STATUS_LEN 4
16553 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_OFST 4
16555 #define MC_CMD_LICENSING_V3_TEMPORARY_OUT_STATUS_LICENSED_FEATURES_LO_OFST 4
16572 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_LEN(num) (8+4*(num))
16573 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_NUM(len) (((len)-8)/4)
16576 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4
16578 * internal loopback. (ENTITY is a queue handle, VALUE is a single boolean.)
16582 * internal loopback path. (ENTITY is an EVB_PORT_ID, VALUE is a single
16589 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4
16590 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4
16595 #define MC_CMD_SET_PARSER_DISP_CONFIG_IN_VALUE_LEN 4
16617 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_TYPE_LEN 4
16623 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_OFST 4
16624 #define MC_CMD_GET_PARSER_DISP_CONFIG_IN_ENTITY_LEN 4
16627 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LENMIN 4
16630 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_LEN(num) (0+4*(num))
16631 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_NUM(len) (((len)-0)/4)
16636 #define MC_CMD_GET_PARSER_DISP_CONFIG_OUT_VALUE_LEN 4
16660 #define MC_CMD_GET_PORT_MODES_OUT_MODES_LEN 4
16662 #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_OFST 4
16663 #define MC_CMD_GET_PORT_MODES_OUT_DEFAULT_MODE_LEN 4
16666 #define MC_CMD_GET_PORT_MODES_OUT_CURRENT_MODE_LEN 4
16674 #define MC_CMD_GET_PORT_MODES_OUT_V2_MODES_LEN 4
16676 #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_OFST 4
16677 #define MC_CMD_GET_PORT_MODES_OUT_V2_DEFAULT_MODE_LEN 4
16680 #define MC_CMD_GET_PORT_MODES_OUT_V2_CURRENT_MODE_LEN 4
16682 * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that
16683 * contains all modes implemented in firmware for a particular board. Modes
16691 #define MC_CMD_GET_PORT_MODES_OUT_V2_ENGINEERING_MODES_LEN 4
16698 * warm reboot. A cold reboot resets the override. It is assumed that a
16710 #define MC_CMD_OVERRIDE_PORT_MODE_IN_FLAGS_LEN 4
16715 #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_OFST 4
16716 #define MC_CMD_OVERRIDE_PORT_MODE_IN_MODE_LEN 4
16734 /* Each workaround is represented by a single bit according to the enums below.
16737 #define MC_CMD_GET_WORKAROUNDS_OUT_IMPLEMENTED_LEN 4
16738 #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_OFST 4
16739 #define MC_CMD_GET_WORKAROUNDS_OUT_ENABLED_LEN 4
16775 #define MC_CMD_PRIVILEGE_MASK_IN_FUNCTION_LEN 4
16786 #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_OFST 4
16787 #define MC_CMD_PRIVILEGE_MASK_IN_NEW_MASK_LEN 4
16804 /* enum: Privilege that allows a Function to change the MAC address configured
16808 /* enum: Privilege that allows a Function to install filters that specify VLANs
16811 * only a set of permitted VLANs. See the vPort flag FLAG_VLAN_RESTRICT.
16820 * an adapter has Bound to a remote ServerLock Controller (see doxbox
16824 /* enum: Set this bit to indicate that a new privilege mask is to be set,
16830 #define MC_CMD_PRIVILEGE_MASK_OUT_LEN 4
16833 #define MC_CMD_PRIVILEGE_MASK_OUT_OLD_MASK_LEN 4
16838 * Read/set link state mode of a VF
16847 /* The target function to have its link state mode read or set, must be a VF
16851 #define MC_CMD_LINK_STATE_MODE_IN_FUNCTION_LEN 4
16859 #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_OFST 4
16860 #define MC_CMD_LINK_STATE_MODE_IN_NEW_MODE_LEN 4
16869 #define MC_CMD_LINK_STATE_MODE_OUT_LEN 4
16871 #define MC_CMD_LINK_STATE_MODE_OUT_OLD_MODE_LEN 4
16890 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_MISMATCH_BITS_LEN 4
16891 /* Total number of unexpectedly clear (set in B but not A) bits in area 0 */
16892 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_OFST 4
16893 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_A_BAD_BITS_LEN 4
16894 /* Total number of unexpectedly clear (set in A but not B) bits in area 0 */
16896 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_PAIR_B_BAD_BITS_LEN 4
16899 #define MC_CMD_FUSE_DIAGS_OUT_AREA0_CHECKSUM_LEN 4
16902 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_MISMATCH_BITS_LEN 4
16903 /* Total number of unexpectedly clear (set in B but not A) bits in area 1 */
16905 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_A_BAD_BITS_LEN 4
16906 /* Total number of unexpectedly clear (set in A but not B) bits in area 1 */
16908 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_PAIR_B_BAD_BITS_LEN 4
16911 #define MC_CMD_FUSE_DIAGS_OUT_AREA1_CHECKSUM_LEN 4
16914 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_MISMATCH_BITS_LEN 4
16915 /* Total number of unexpectedly clear (set in B but not A) bits in area 2 */
16917 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_A_BAD_BITS_LEN 4
16918 /* Total number of unexpectedly clear (set in A but not B) bits in area 2 */
16920 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_PAIR_B_BAD_BITS_LEN 4
16923 #define MC_CMD_FUSE_DIAGS_OUT_AREA2_CHECKSUM_LEN 4
16928 * Modify the privileges of a set of PCIe functions. Note that this operation
16941 #define MC_CMD_PRIVILEGE_MODIFY_IN_FN_GROUP_LEN 4
16949 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_OFST 4
16950 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_LEN 4
16951 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_PF_OFST 4
16954 #define MC_CMD_PRIVILEGE_MODIFY_IN_FUNCTION_VF_OFST 4
16961 #define MC_CMD_PRIVILEGE_MODIFY_IN_ADD_MASK_LEN 4
16966 #define MC_CMD_PRIVILEGE_MODIFY_IN_REMOVE_MASK_LEN 4
16973 #define TUNNEL_ENCAP_UDP_PORT_ENTRY_LEN 4
17000 * cause all functions to see a reset. (Available on Medford only.)
17008 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LENMIN 4
17011 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_LEN(num) (4+4*(num))
17012 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_NUM(len) (((len)-4)/4)
17022 /* Entries defining the UDP port to protocol mapping, each laid out as a
17025 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_OFST 4
17026 #define MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS_IN_ENTRIES_LEN 4
17043 …a rule for detecting encapsulations in the VNIC stage. Currently this only affects checksum valida…
17054 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MPORT_SELECTOR_LEN 4
17059 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_OFST 4
17060 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_FLAGS_LEN 4
17061 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_ETHER_TYPE_OFST 4
17064 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_OUTER_VLAN_OFST 4
17067 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_IP_OFST 4
17070 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_IP_PROTO_OFST 4
17073 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_OFST 4
17074 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_MATCH_DST_PORT_LBN 4
17093 * case of IPv4, the IP should be in the first 4 bytes and all other bytes
17112 #define MC_CMD_VNIC_ENCAP_RULE_ADD_IN_ENCAP_TYPE_LEN 4
17115 #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_LEN 4
17118 #define MC_CMD_VNIC_ENCAP_RULE_ADD_OUT_HANDLE_LEN 4
17123 …* Remove a VNIC encapsulation rule. Packets which would have previously matched the rule will then…
17131 #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_LEN 4
17134 #define MC_CMD_VNIC_ENCAP_RULE_REMOVE_IN_HANDLE_LEN 4
17142 #define FUNCTION_PERSONALITY_LEN 4
17144 #define FUNCTION_PERSONALITY_ID_LEN 4
17155 /* enum: Function has virtio block device configuration registers and a
17156 * doorbell for a single virtqueue.
17159 /* enum: Function is a Xilinx acceleration device - management function */
17161 /* enum: Function is a Xilinx acceleration device - user function */
17166 /* PCIE_FUNCTION structuredef: Structure representing a PCIe function ID
17188 /* enum: Function is a PF (when PF != PF_NULL) or invalid function (when PF ==
17195 #define PCIE_FUNCTION_INTF_OFST 4
17196 #define PCIE_FUNCTION_INTF_LEN 4