Searched +full:2 +full:c400000 (Results 1 – 18 of 18) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/spmi/ |
D | qcom,x1e80100-spmi-pmic-arb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 15 devices to control up to 2 SPMI separate buses. 39 const: 2 42 const: 2 87 cell 2: peripheral ID for requested interrupt (0-255) 105 #address-cells = <2>; 106 #size-cells = <2>; 108 spmi: arbiter@c400000 { 118 #address-cells = <2>; 119 #size-cells = <2>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/samsung/ |
D | s3c64xx.dtsi | 67 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 78 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 84 sdhci2: mmc@7c400000 { 89 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
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/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
D | arm,gic-v3.yaml | 33 enum: [ 0, 1, 2 ] 35 enum: [ 1, 2 ] 47 interrupts, 2 for interrupts in the Extended SPI range, 3 for the 50 The 2nd cell contains the interrupt number for the interrupt type. 86 minItems: 2 127 minItems: 2 128 maxItems: 2 138 maxItems: 2 227 minItems: 2 228 maxItems: 2 [all …]
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/linux-6.12.1/arch/arm/boot/dts/qcom/ |
D | qcom-sdx65-mtp.dts | 8 #define PM7250B_SID 2 35 mpss_dsm: memory@8c400000 { 304 drive-strength = <2>; 311 drive-strength = <2>; 318 drive-strength = <2>;
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/linux-6.12.1/arch/arm/boot/dts/st/ |
D | spear1310.dtsi | 23 #gpio-cells = <2>; 48 phy-id = <2>; 89 #size-cells = <2>; 106 #size-cells = <2>; 123 #size-cells = <2>; 131 gmac1: eth@5c400000 { 292 #gpio-cells = <2>;
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | sdm845-lg-common.dtsi | 31 #address-cells = <2>; 32 #size-cells = <2>; 37 #address-cells = <2>; 38 #size-cells = <2>; 51 ipa_fw_mem: memory@8c400000 { 199 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 436 regulators-2 {
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D | sdm850-samsung-w737.dts | 43 #address-cells = <2>; 44 #size-cells = <2>; 75 wlan_msa_mem: memory@8c400000 { 404 drive-strength = <2>; 409 drive-strength = <2>; 414 drive-strength = <2>; 435 dai@2 { 436 reg = <2>; 515 sound-dai = <&wcd9340 2>; 533 drive-strength = <2>; [all …]
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D | sdm850-lenovo-yoga-c630.dts | 63 wlan_msa_mem: memory@8c400000 { 412 port@2 { 413 reg = <2>; 449 tsc2: hid@2c { 482 sn65dsi86: bridge@2c { 573 data-lanes = <0 1 2 3>; 600 drive-strength = <2>; 605 drive-strength = <2>; 626 dai@2 { 627 reg = <2>; [all …]
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D | sdx75.dtsi | 22 #address-cells = <2>; 23 #size-cells = <2>; 43 #address-cells = <2>; 61 cache-level = <2>; 87 cache-level = <2>; 108 cache-level = <2>; 129 cache-level = <2>; 195 CLUSTER_SLEEP_2: cluster-sleep-2 { 213 #interconnect-cells = <2>; 220 #interconnect-cells = <2>; [all …]
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D | qdu1000.dtsi | 19 #address-cells = <2>; 20 #size-cells = <2>; 25 #address-cells = <2>; 40 cache-level = <2>; 63 cache-level = <2>; 81 cache-level = <2>; 99 cache-level = <2>; 166 #interconnect-cells = <2>; 172 #interconnect-cells = <2>; 221 #address-cells = <2>; [all …]
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D | sm8650.dtsi | 32 #address-cells = <2>; 33 #size-cells = <2>; 54 clock-div = <2>; 63 clock-div = <2>; 68 #address-cells = <2>; 88 #cooling-cells = <2>; 92 cache-level = <2>; 121 #cooling-cells = <2>; 141 #cooling-cells = <2>; 145 cache-level = <2>; [all …]
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D | sm8550.dtsi | 30 #address-cells = <2>; 31 #size-cells = <2>; 51 clock-div = <2>; 59 clock-div = <2>; 64 #address-cells = <2>; 79 #cooling-cells = <2>; 82 cache-level = <2>; 105 #cooling-cells = <2>; 108 cache-level = <2>; 126 #cooling-cells = <2>; [all …]
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D | sm8450.dtsi | 31 #address-cells = <2>; 32 #size-cells = <2>; 51 #address-cells = <2>; 63 #cooling-cells = <2>; 67 cache-level = <2>; 87 #cooling-cells = <2>; 91 cache-level = <2>; 106 #cooling-cells = <2>; 110 cache-level = <2>; 125 #cooling-cells = <2>; [all …]
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D | sdm845.dtsi | 35 #address-cells = <2>; 36 #size-cells = <2>; 91 #address-cells = <2>; 108 #cooling-cells = <2>; 112 cache-level = <2>; 137 #cooling-cells = <2>; 141 cache-level = <2>; 161 #cooling-cells = <2>; 165 cache-level = <2>; 183 #cooling-cells = <2>; [all …]
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D | x1e80100.dtsi | 27 #address-cells = <2>; 28 #size-cells = <2>; 51 clock-div = <2>; 60 clock-div = <2>; 65 #address-cells = <2>; 80 cache-level = <2>; 130 cache-level = <2>; 180 cache-level = <2>; 318 #interconnect-cells = <2>; 324 #interconnect-cells = <2>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/apm/ |
D | apm-shadowcat.dtsi | 11 #address-cells = <2>; 12 #size-cells = <2>; 15 #address-cells = <2>; 100 cache-level = <2>; 105 cache-level = <2>; 108 xgene_L2_2: l2-cache-2 { 110 cache-level = <2>; 115 cache-level = <2>; 123 #address-cells = <2>; 124 #size-cells = <2>; [all …]
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D | apm-storm.dtsi | 11 #address-cells = <2>; 12 #size-cells = <2>; 15 #address-cells = <2>; 84 cache-level = <2>; 89 cache-level = <2>; 92 xgene_L2_2: l2-cache-2 { 94 cache-level = <2>; 99 cache-level = <2>; 138 #address-cells = <2>; 139 #size-cells = <2>; [all …]
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/linux-6.12.1/drivers/clk/spear/ |
D | spear1310_clock.c | 23 #define SPEAR1310_RAS_SYNT2_3_CLK_MASK 2 25 #define SPEAR1310_RAS_SYNT_CLK_MASK 2 27 #define SPEAR1310_PLL_CLK_MASK 2 51 #define SPEAR1310_UART_CLK_SYNT_VAL 2 52 #define SPEAR1310_UART_CLK_MASK 2 57 #define SPEAR1310_CLCD_CLK_MASK 2 58 #define SPEAR1310_CLCD_CLK_SHIFT 2 67 #define SPEAR1310_GMAC_PHY_INPUT_CLK_MASK 2 84 #define SPEAR1310_I2S_REF_SHIFT 2 85 #define SPEAR1310_I2S_SRC_CLK_MASK 2 [all …]
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