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/linux-6.12.1/arch/powerpc/crypto/
Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
81 stdu 1,-752(1)
87 SAVE_GPR 18, 144, 1
94 SAVE_GPR 25, 200, 1
108 SAVE_VRS 25, 80, 9
120 SAVE_VSX 18, 256, 9
127 SAVE_VSX 25, 368, 9
[all …]
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
95 stdu 1,-752(1)
[all …]
Daes-gcm-p10.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 # Accelerated AES-GCM stitched implementation for ppc64le.
5 # Copyright 2022- IBM Inc. All rights reserved
22 # Hash keys = v3 - v14
29 # v31 - counter 1
32 # vs0 - vs14 for round keys
35 # This implementation uses stitched AES-GCM approach to improve overall performance.
48 # v15 - v18 - input states
49 # vs1 - vs9 - round keys
60 vcipher 18, 18, 19
[all …]
/linux-6.12.1/arch/alpha/include/asm/
Dxor.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * include/asm-alpha/xor.h
5 * Optimized RAID-5 checksumming functions for alpha EV5 and EV6
56 ldq $1,0($18) \n\
58 ldq $3,8($18) \n\
61 ldq $5,16($18) \n\
63 ldq $7,24($18) \n\
66 ldq $20,32($18) \n\
68 ldq $22,40($18) \n\
71 ldq $24,48($18) \n\
[all …]
Dpal.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 :"$1", "$16", "$22", "$23", "$24", "$25"); \
38 : "$1", "$22", "$23", "$24", "$25"); \
50 : "$1", "$22", "$23", "$24", "$25"); \
62 : "$1", "$22", "$23", "$24", "$25"); \
76 : "$1", "$22", "$23", "$24", "$25"); \
106 :"$0", "$1", "$22", "$23", "$24", "$25"); \
113 #define tbiap() __tbi(-1, /* no second argument */)
114 #define tbia() __tbi(-2, /* no second argument */)
129 : "$17", "$18", "$19", "$20", "$21"); in qemu_get_walltime()
[all …]
/linux-6.12.1/arch/arm64/crypto/
Dsha512-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * sha512-ce-core.S - core SHA-384/SHA-512 transform using v8 Crypto Extensions
15 .irp b,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19
37 * The SHA-512 round constants
111 ld1 {v8.2d-v11.2d}, [x0]
115 ld1 {v20.2d-v23.2d}, [x3], #64
118 0: ld1 {v12.2d-v15.2d}, [x1], #64
119 ld1 {v16.2d-v19.2d}, [x1], #64
138 // v0 ab cd -- ef gh ab
139 // v1 cd -- ef gh ab cd
[all …]
/linux-6.12.1/Documentation/translations/zh_CN/core-api/
Dpacking.rst1 .. SPDX-License-Identifier: GPL-2.0+
3 .. include:: ../disclaimer-zh_CN.rst
5 :Original: Documentation/core-api/packing.rst
22 --------
42 --------
46 - 将一个CPU可使用的数字打包到内存缓冲区中（具有硬件约束/特殊性）。
47 - 将内存缓冲区（具有硬件约束/特殊性）解压缩为一个CPU可使用的数字。
63 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
77 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
89 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
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/linux-6.12.1/Documentation/core-api/
Dpacking.rst6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
[all …]
/linux-6.12.1/include/dt-bindings/memory/
Dmt8195-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
9 #include <dt-bindings/memory/mtk-memory-port.h>
20 * modules dma-address-region larbs-ports
29 * iommu-vdo: larb0/2/5/7/9/10/11/13/17/19/21/24/25/28
30 * iommu-vpp: larb1/3/4/6/8/12/14/16/18/20/22/23/26/27
118 #define M4U_PORT_L9_IMG_YUVO_T5_B MTK_M4U_ID(9, 18)
140 #define M4U_PORT_L10_IMG_FEO_D1_A MTK_M4U_ID(10, 18)
230 #define M4U_PORT_L18_CAM_CCUI MTK_M4U_ID(18, 0)
231 #define M4U_PORT_L18_CAM_CCUO MTK_M4U_ID(18, 1)
232 #define M4U_PORT_L18_CAM_CCUI2 MTK_M4U_ID(18, 2)
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h1 /* SPDX-License-Identifier: ISC */
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
28 #define MT_RXD1_NORMAL_PAYLOAD_FORMAT GENMASK(25, 24)
47 #define MT_RXD2_NORMAL_LLC_MIS BIT(25)
54 #define MT_RXD2_NORMAL_CM BIT(18)
64 #define MT_RXD3_NORMAL_WOL GENMASK(18, 14)
77 #define MT_RXV1_HT_AGGR BIT(18)
108 #define MT_RXV5_LTF_PROC_TIME GENMASK(25, 19)
109 #define MT_RXV5_FOE GENMASK(18, 7)
115 #define MT_RXV6_NS_TS_FIELD GENMASK(27, 25)
[all …]
/linux-6.12.1/security/apparmor/include/
Dsig_names.h18 [SIGTRAP] = 5, /* -, 5, - */
19 [SIGABRT] = 6, /* SIGIOT: -, 6, - */
30 [SIGSTKFLT] = 16, /* -, 16, - */
32 [SIGCHLD] = 17, /* 20, 17, 18. SIGCHLD -, -, 18 */
33 [SIGCONT] = 18, /* 19, 18, 25 */
35 [SIGTSTP] = 20, /* 18, 20, 24 */
40 [SIGXFSZ] = 25, /* 25, 25, 31 */
45 [SIGPWR] = 30, /* 29, 30, 19. SIGINFO 29, -, - */
50 [SIGEMT] = 32, /* 7, - , 7 */
57 [SIGUNUSED] = 34, /* -, 31, - */
/linux-6.12.1/drivers/media/platform/verisilicon/
Drockchip_vpu981_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
64 #define av1_allow_warp AV1_DEC_REG(5, 18, 0x1)
70 #define av1_strm_start_bit AV1_DEC_REG(5, 25, 0x7f)
140 #define av1_qp_delta_ch_dc_av1 AV1_DEC_REG(13, 18, 0x7f)
141 #define av1_qp_delta_y_dc_av1 AV1_DEC_REG(13, 25, 0x7f)
171 #define av1_quant_seg4 AV1_DEC_REG(18, 0, 0xff)
172 #define av1_filt_level_seg4 AV1_DEC_REG(18, 8, 0x3f)
173 #define av1_skip_seg4 AV1_DEC_REG(18, 14, 0x1)
174 #define av1_refpic_seg4 AV1_DEC_REG(18, 15, 0xf)
175 #define av1_filt_level_delta0_seg4 AV1_DEC_REG(18, 19, 0x7f)
[all …]
Dhantro_g2_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
61 #define g2_start_bit G2_DEC_REG(5, 25, 0x7f)
76 #define g2_filter_over_slices G2_DEC_REG(7, 25, 0x1)
83 #define g2_filter_override G2_DEC_REG(7, 18, 0x1)
109 #define g2_init_qp_old G2_DEC_REG(10, 25, 0x3f)
147 #define hevc_rlist_b2 G2_DEC_REG(14, 25, 0x1f)
154 #define hevc_rlist_b5 G2_DEC_REG(15, 25, 0x1f)
161 #define hevc_rlist_b8 G2_DEC_REG(16, 25, 0x1f)
168 #define hevc_rlist_b11 G2_DEC_REG(17, 25, 0x1f)
170 #define hevc_rlist_f12 G2_DEC_REG(18, 0, 0x1f)
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/
Dmt76_connac3_mac.h1 /* SPDX-License-Identifier: ISC */
28 #define MT_RXD0_MESH BIT(18)
40 #define MT_RXD1_NORMAL_GROUP_3 BIT(18)
46 #define MT_RXD1_NORMAL_ICV_ERR BIT(25)
63 #define MT_RXD2_NORMAL_HDR_TRANS_ERROR BIT(25)
76 #define MT_RXD3_NORMAL_HTC_VLD BIT(18)
101 /* P-RXV */
119 /* C-RXV */
141 #define MT_CRXV_HE_RU2 GENMASK(26, 18)
161 #define MT_CRXV_EHT_RU2 GENMASK(26, 18)
[all …]
/linux-6.12.1/arch/alpha/lib/
Dfpreg.c1 // SPDX-License-Identifier: GPL-2.0
29 if (current_thread_info()->status & TS_SAVED_FP) in alpha_read_fp_reg()
30 val = current_thread_info()->fp[reg]; in alpha_read_fp_reg()
50 case 18: STT(18, val); break; in alpha_read_fp_reg()
57 case 25: STT(25, val); break; in alpha_read_fp_reg()
83 if (current_thread_info()->status & TS_SAVED_FP) { in alpha_write_fp_reg()
84 current_thread_info()->status |= TS_RESTORE_FP; in alpha_write_fp_reg()
85 current_thread_info()->fp[reg] = val; in alpha_write_fp_reg()
105 case 18: LDT(18, val); break; in alpha_write_fp_reg()
112 case 25: LDT(25, val); break; in alpha_write_fp_reg()
[all …]
/linux-6.12.1/include/dt-bindings/clock/
Dexynos5433.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 #define CLK_MOUT_ACLK_CAM1_552_B 18
29 #define CLK_MOUT_ACLK_GSCL_333 25
219 #define CLK_MOUT_CLK2X_PHY_C 18
226 #define CLK_MOUT_ACLK_MIFNM_400 25
413 #define CLK_PCLK_I2C0 18
420 #define CLK_PCLK_HSI2C7 25
483 #define CLK_PCLK_TZPC8 18
490 #define CLK_PCLK_TZPC1 25
526 #define CLK_MOUT_PHYCLK_UFS_RX1_SYMBOL_USER 18
[all …]
Dexynos5260-clk.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define TOP_MOUT_SCLK_PERI_UART0_UCLK 18
40 #define TOP_MOUT_BUS2_BUSTOP_400 25
187 #define MIF_DOUT_MEDIA_PLL 18
194 #define MIF_CLK_INTMEM 25
252 #define GSCL_CLK_SMMU3_LITE_D 18
259 #define GSCL_SCLK_CSIS1_WRAP 25
281 #define FSYS_PHYCLK_USBHOST20 18
302 #define PERI_CLK_I2C5 18
309 #define PERI_CLK_EFUSE_WRITER 25
[all …]
/linux-6.12.1/drivers/comedi/drivers/ni_routing/ni_device_routes/
Dpci-6602.c1 // SPDX-License-Identifier: GPL-2.0+
3 * comedi/drivers/ni_routing/ni_device_routes/pci-6602.c
6 * COMEDI - Linux Control and Measurement Device Interface
31 .device = "pci-6602",
275 .dest = NI_PFI(18),
395 .dest = NI_PFI(25),
446 NI_PFI(18),
478 NI_PFI(18),
525 NI_PFI(25),
557 NI_PFI(25),
[all …]
/linux-6.12.1/arch/riscv/include/asm/
Dgpr-num.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
29 .equ .L__gpr_num_s2, 18
36 .equ .L__gpr_num_s9, 25
47 " .irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31\n"…
68 " .equ .L__gpr_num_s2, 18\n" \
75 " .equ .L__gpr_num_s9, 25\n" \
/linux-6.12.1/drivers/staging/media/rkvdec/
Drkvdec-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 * Jeffy Chen <jeffy.chen@rock-chips.com>
12 #include <media/v4l2-h264.h>
13 #include <media/v4l2-mem2mem.h>
16 #include "rkvdec-regs.h"
48 #define BIT_DEPTH_CHROMA PS_FIELD(18, 3)
133 /* Table 9-12 – Values of variables m and n for ctxIdx from 0 to 10 */
134 CABAC_ENTRY(0, 20, -15, 20, -15, 20, -15, 20, -15),
137 CABAC_ENTRY(3, 20, -15, 20, -15, 20, -15, 20, -15),
140 CABAC_ENTRY(6, -28, 127, -28, 127, -28, 127, -28, 127),
[all …]
/linux-6.12.1/include/linux/netfilter/
Dnf_conntrack_h323_types.h1 /* SPDX-License-Identifier: GPL-2.0-only */
147 eH2250LogicalChannelParameters_silenceSuppression = (1 << 25),
259 eSetup_UUIE_callServices = (1 << 25),
266 eSetup_UUIE_fastStart = (1 << 18),
305 eCallProceeding_UUIE_multipleCalls = (1 << 25),
327 eConnect_UUIE_multipleCalls = (1 << 25),
334 eConnect_UUIE_serviceControl = (1 << 18),
355 eAlerting_UUIE_multipleCalls = (1 << 25),
362 eAlerting_UUIE_capacity = (1 << 18),
398 eFacility_UUIE_tokens = (1 << 25),
[all …]
/linux-6.12.1/arch/alpha/kernel/
Dentry.S1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Kernel entry-points.
8 #include <asm/asm-offsets.h>
34 .cfi_rel_offset $18, 40
39 .size \func, . - \func
43 * This defines the normal kernel pt-regs layout.
45 * regs 9-15 preserved by C code
46 * regs 16-18 saved by PAL-code
47 * regs 29-30 saved and set up by PAL-code
48 * JRP - Save regs 16-18 in a special area of the stack, so that
[all …]
/linux-6.12.1/arch/mips/include/asm/
Dmipsregs.h19 #include <asm/isa-rev.h>
184 #define CP0_WATCHLO $18
185 #define C0_WATCHLO 18, 0
208 #define CP0_PERFORMANCE $25
209 #define C0_PERFORMANCE 25, 0
249 #define CP0_IWATCH $18
290 #define MIPS_ENTRYLO_XI (_ULCAST_(1) << (BITS_PER_LONG - 2))
291 #define MIPS_ENTRYLO_RI (_ULCAST_(1) << (BITS_PER_LONG - 1))
372 #define PL_256K 18
522 /* in-kernel enabled CUs */
[all …]
Dregdef.h8 * Copyright (C) 1990 - 1992, 1999 Silicon Graphics, Inc.
10 * written by Ralf Baechle <ralf@linux-mips.org>
44 #define GPR_S2 18
51 #define GPR_T9 25
52 #define GPR_JP 25 /* PIC jump register */
67 #define GPR_V0 2 /* return value - caller saved */
87 #define GPR_S2 18
94 #define GPR_T9 25 /* callee address for PIC/temp */
95 #define GPR_JP 25 /* PIC jump register */
98 #define GPR_GP 28 /* global pointer - caller saved for PIC */
[all …]
/linux-6.12.1/drivers/usb/dwc2/
Dhw.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * hw.h - DesignWare HS OTG Controller hardware definitions
5 * Copyright 2004-2013 Synopsys, Inc.
21 #define GOTGCTL_ASESVLD BIT(18)
40 #define GOTGINT_A_DEV_TOUT_CHG BIT(18)
72 #define GUSBCFG_ULPI_INT_PROT_DIS BIT(25)
79 #define GUSBCFG_ULPI_AUTO_RES BIT(18)
132 #define GINTSTS_HCHINT BIT(25)
140 #define GINTSTS_IEPINT BIT(18)
162 #define GRXSTS_FN_MASK (0x7f << 25)
[all …]

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