/linux-6.12.1/arch/mips/include/asm/mach-cavium-octeon/ |
D | kernel-entry-init.h | 14 #define CP0_DCACHE_ERR_REG $27, 1 25 # a2 = 1 if init core, zero otherwise 30 dmfc0 v0, CP0_CVMMEMCTL_REG 32 dins v0, $0, 0, 6 33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE 34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register 35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register 38 or v0, v0, 0x5001 39 xor v0, v0, 0x1001 43 and v0, v0, v1 [all …]
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/linux-6.12.1/arch/arm64/crypto/ |
D | aes-ce-core.S | 13 ld1 {v0.16b}, [x2] 22 1: aese v0.16b, v2.16b 23 aesmc v0.16b, v0.16b 25 aese v0.16b, v3.16b 26 aesmc v0.16b, v0.16b 29 aese v0.16b, v1.16b 30 aesmc v0.16b, v0.16b 32 bpl 1b 33 aese v0.16b, v2.16b 34 eor v0.16b, v0.16b, v3.16b [all …]
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D | sm4-ce-core.S | 17 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \ 51 ld1 {v0.16b}, [x0]; 52 rev32 v0.16b, v0.16b; 59 eor v0.16b, v0.16b, v1.16b; 61 sm4ekey v0.4s, v0.4s, v24.4s; 62 sm4ekey v1.4s, v0.4s, v25.4s; 73 st1 {v0.16b-v3.16b}, [x1], #64; 83 tbl v23.16b, {v0.16b}, v24.16b 100 ld1 {v0.16b}, [x2]; 101 SM4_CRYPT_BLK(v0); [all …]
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D | aes-modes.S | 26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7 31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7 37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7 42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7 62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */ 66 st1 {v0.16b-v3.16b}, [x0], #64 73 ld1 {v0.16b}, [x1], #16 /* get next pt block */ 74 encrypt_block v0, w3, x2, x5, w6 75 st1 {v0.16b}, [x0], #16 76 subs w4, w4, #1 [all …]
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D | sm4-ce-gcm-core.S | 18 .irp b, 0, 1, 2, 3, 24, 25, 26, 27, 28, 29, 30, 31 41 pmull r0.1q, m0.1d, m1.1d; \ 42 pmull T1.1q, m0.1d, T0.1d; \ 43 pmull2 T0.1q, m0.2d, T0.2d; \ 44 pmull2 r1.1q, m0.2d, m1.2d; \ 59 pmull r0.1q, m0.1d, m1.1d; \ 60 pmull r2.1q, m2.1d, m3.1d; \ 61 pmull r4.1q, m4.1d, m5.1d; \ 62 pmull r6.1q, m6.1d, m7.1d; \ 63 pmull T1.1q, m0.1d, T0.1d; \ [all …]
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D | crct10dif-ce-core.S | 136 ext t4.8b, ad.8b, ad.8b, #1 // A1 253 pmull \rd\().1q, \rn\().1d, \rm\().1d 255 pmull2 \rd\().1q, \rn\().2d, \rm\().2d 275 CPU_LE( rev64 v0.16b, v0.16b ) 283 CPU_LE( ext v0.16b, v0.16b, v0.16b, #8 ) 295 eor v0.16b, v0.16b, v8.16b 305 // While >= 128 data bytes remain (not counting v0-v7), fold the 128 306 // bytes v0-v7 into them, storing the result back into v0-v7. 308 fold_32_bytes \p, v0, v1 316 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7. [all …]
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D | sm3-ce-core.S | 12 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12 46 shl \t1\().4s, \t0\().4s, #1 63 round \ab, \s0, v12, v11, 1 89 0: ld1 {v0.16b-v3.16b}, [x1], #64 90 sub w2, w2, #1 95 CPU_LE( rev32 v0.16b, v0.16b ) 102 qround a, v0, v1, v2, v3, v4 103 qround a, v1, v2, v3, v4, v0 104 qround a, v2, v3, v4, v0, v1 105 qround a, v3, v4, v0, v1, v2 [all …]
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/linux-6.12.1/tools/testing/selftests/powerpc/math/ |
D | vmx_asm.S | 9 # Should be safe from C, only touches r4, r5 and v0,v1,v2 13 li r3,1 # assume a bad result 15 lvx v0,r5,r4 16 vcmpequd. v1,v0,v20 20 lvx v0,r5,r4 21 vcmpequd. v1,v0,v21 25 lvx v0,r5,r4 26 vcmpequd. v1,v0,v22 30 lvx v0,r5,r4 31 vcmpequd. v1,v0,v23 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/amdkfd/ |
D | cwsr_trap_handler_gfx10.asm | 53 #define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX … 56 #define S_COHERENCE glc:1 57 #define V_COHERENCE slc:1 glc:1 77 var SQ_WAVE_IB_STS2_WAVE64_SIZE = 1 92 var SQ_WAVE_STATUS_WAVE64_SIZE = 1 467 SQ_WAVE_STATE_PRIV_POISON_ERR_SHIFT - SQ_WAVE_STATE_PRIV_SCC_SHIFT + 1), s_save_status 491 …s_setreg_b32 hwreg(S_TRAPSTS_HWREG, S_TRAPSTS_SAVE_CONTEXT_SHIFT, 1), s_save_tmp //clear saveCtx b… 510 // sleep 1 (64clk) is not enough for 8 waves per SIMD, which will cause 533 // Save v0 by itself since it requires only two SGPRs. 538 global_store_dword_addtid v0, [s_save_ttmps_lo, s_save_ttmps_hi] V_COHERENCE [all …]
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/linux-6.12.1/arch/powerpc/crypto/ |
D | crc32-vpmsum_core.S | 101 vspltisw v0,-1 103 vsldoi mask_32bit,zeroes,v0,4 104 vsldoi mask_64bit,zeroes,v0,8 127 1: lis r7,MAX_SIZE@h 148 addi r7,r7,-1 156 /* zero v0-v7 which will contain our checksums */ 157 vxor v0,v0,v0 172 cmpdi r0,1 256 vxor v0,v0,v8 313 vxor v0,v0,v8 [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/device/ |
D | ctrl.c | 38 struct nvif_control_pstate_info_v0 v0; in nvkm_control_mthd_pstate_info() member 44 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_control_mthd_pstate_info() 46 args->v0.version); in nvkm_control_mthd_pstate_info() 51 args->v0.count = clk->state_nr; in nvkm_control_mthd_pstate_info() 52 args->v0.ustate_ac = clk->ustate_ac; in nvkm_control_mthd_pstate_info() 53 args->v0.ustate_dc = clk->ustate_dc; in nvkm_control_mthd_pstate_info() 54 args->v0.pwrsrc = clk->pwrsrc; in nvkm_control_mthd_pstate_info() 55 args->v0.pstate = clk->pstate; in nvkm_control_mthd_pstate_info() 57 args->v0.count = 0; in nvkm_control_mthd_pstate_info() 58 args->v0.ustate_ac = NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE; in nvkm_control_mthd_pstate_info() [all …]
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D | user.c | 80 struct nv_device_info_v0 v0; in nvkm_udevice_info() member 86 if (!(ret = nvif_unpack(ret, &data, &size, args->v1, 1, 1, true))) { in nvkm_udevice_info() 96 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_udevice_info() 97 nvif_ioctl(object, "device info vers %d\n", args->v0.version); in nvkm_udevice_info() 112 args->v0.platform = NV_DEVICE_INFO_V0_IGP; in nvkm_udevice_info() 117 args->v0.platform = NV_DEVICE_INFO_V0_PCI; in nvkm_udevice_info() 120 args->v0.platform = NV_DEVICE_INFO_V0_AGP; in nvkm_udevice_info() 123 args->v0.platform = NV_DEVICE_INFO_V0_PCIE; in nvkm_udevice_info() 126 args->v0.platform = NV_DEVICE_INFO_V0_SOC; in nvkm_udevice_info() 129 WARN_ON(1); in nvkm_udevice_info() [all …]
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/linux-6.12.1/lib/ |
D | siphash.c | 20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3) 23 u64 v0 = SIPHASH_CONST_0; \ 28 v3 ^= key->key[1]; \ 30 v1 ^= key->key[1]; \ 31 v0 ^= key->key[0]; 37 v0 ^= b; \ 43 return (v0 ^ v1) ^ (v2 ^ v3); 49 const u8 left = len & (sizeof(u64) - 1); in __siphash_aligned() 57 v0 ^= m; in __siphash_aligned() 71 case 1: b |= end[0]; in __siphash_aligned() [all …]
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/linux-6.12.1/arch/mips/kernel/ |
D | scall32-o32.S | 81 * syscall number is in v0 unless we called syscall(__NR_###) 84 subu t2, v0, __NR_O32_Linux 85 bnez t2, 1f /* __NR_syscall at offset 0 */ 88 1: 89 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number 97 subu v0, v0, __NR_O32_Linux # check syscall number 98 sltiu t0, v0, __NR_O32_Linux_syscalls 101 sll t0, v0, 2 110 li t0, -EMAXERRNO - 1 # error? 111 sltu t0, t0, v0 [all …]
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D | bmips_5xxx_init.S | 31 subu t2, linesize, 1 ; \ 34 addiu t1, t1, -1 ; \ 59 #define CP0_BRCM_MODE $22, 1 63 #define CP0_ICACHE_DATA_LO $28, 1 67 #define CP0_ICACHE_DATA_HI $29, 1 70 #define CP0_BRCM_MODE_Luc_MASK (1 << 11) 71 #define CP0_BRCM_CONFIG0_CWF_MASK (1 << 20) 72 #define CP0_BRCM_CONFIG0_TSE_MASK (1 << 19) 73 #define CP0_BRCM_MODE_SET_MASK (1 << 7) 95 #define BRCM_ZSC_CONFIG_LMB1En 1 << (15) [all …]
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D | scall64-o32.S | 36 dsubu t0, v0, __NR_O32_Linux # check syscall number 43 move a1, v0 83 * absolute syscall number is in v0 unless we called syscall(__NR_###) 90 subu t2, v0, __NR_O32_Linux 91 bnez t2, 1f /* __NR_syscall at offset 0 */ 94 1: 95 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number 104 dsll t0, v0, 3 # offset into table 109 li t0, -EMAXERRNO - 1 # error? 110 sltu t0, t0, v0 [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | uoutp.c | 38 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_vcpi() 40 if (!ior->func->dp || !ior->func->dp->vcpi || !nvkm_head_find(outp->disp, args->v0.head)) in nvkm_uoutp_mthd_dp_mst_vcpi() 43 ior->func->dp->vcpi(ior, args->v0.head, args->v0.start_slot, args->v0.num_slots, in nvkm_uoutp_mthd_dp_mst_vcpi() 44 args->v0.pbn, args->v0.aligned_pbn); in nvkm_uoutp_mthd_dp_mst_vcpi() 53 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_id_put() 58 return outp->func->dp.mst_id_put(outp, args->v0.id); in nvkm_uoutp_mthd_dp_mst_id_put() 66 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_id_get() 71 return outp->func->dp.mst_id_get(outp, &args->v0.id); in nvkm_uoutp_mthd_dp_mst_id_get() 81 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_sst() 84 if (!ior->func->dp || !nvkm_head_find(disp, args->v0.head)) in nvkm_uoutp_mthd_dp_sst() [all …]
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/linux-6.12.1/arch/mips/lib/ |
D | strncpy_user.S | 38 1: EX(lbue, v0, (v1), .Lfault) 41 1: EX(lbu, v0, (v1), .Lfault) 43 PTR_ADDIU v1, 1 45 sb v0, (a0) 46 beqz v0, 2f 47 PTR_ADDIU t0, 1 48 PTR_ADDIU a0, 1 49 bne t0, a2, 1b 50 2: PTR_ADDU v0, a1, t0 51 xor v0, a1 [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/core/ |
D | ioctl.c | 64 struct nvif_ioctl_sclass_v0 v0; in nvkm_ioctl_sclass() member 70 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) { in nvkm_ioctl_sclass() 72 args->v0.version, args->v0.count); in nvkm_ioctl_sclass() 73 if (size != args->v0.count * sizeof(args->v0.oclass[0])) in nvkm_ioctl_sclass() 77 if (i < args->v0.count) { in nvkm_ioctl_sclass() 78 args->v0.oclass[i].oclass = oclass.base.oclass; in nvkm_ioctl_sclass() 79 args->v0.oclass[i].minver = oclass.base.minver; in nvkm_ioctl_sclass() 80 args->v0.oclass[i].maxver = oclass.base.maxver; in nvkm_ioctl_sclass() 85 args->v0.count = i; in nvkm_ioctl_sclass() 96 struct nvif_ioctl_new_v0 v0; in nvkm_ioctl_new() member [all …]
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/linux-6.12.1/tools/testing/selftests/bpf/ |
D | test_xdp_features.sh | 8 readonly V1_IP6=2001:db8::1 10 ret=1 16 ip link add v1 type veth peer name v0 netns ${NS} 21 ip -n ${NS} link set dev v0 up 22 ip -n ${NS} addr add $V0_IP4/24 dev v0 23 ip -n ${NS} addr add $V0_IP6/64 nodad dev v0 28 ip netns exec ${NS} ethtool -K v0 gro on 29 ip netns exec ${NS} ethtool -K v0 tx-checksumming off 30 } > /dev/null 2>&1 40 while sleep 1; do [all …]
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/linux-6.12.1/tools/testing/selftests/net/netfilter/ |
D | rpath.sh | 8 if iptables-legacy --version >/dev/null 2>&1; then 10 elif iptables --version >/dev/null 2>&1; then 16 if ip6tables-legacy --version >/dev/null 2>&1; then 18 elif ip6tables --version >/dev/null 2>&1; then 24 if nft --version >/dev/null 2>&1; then 46 ip netns exec "$ns2" sysctl -q net.ipv6.conf.all.keep_addr_on_down=1 49 ip -net "$ns1" link add v0 type veth peer name v0 netns "$ns2" 50 ip -net "$ns1" link set v0 up; ip -net "$ns2" link set v0 up 51 ip -net "$ns1" a a 192.168.23.2/24 dev v0 52 ip -net "$ns2" a a 192.168.23.1/24 dev v0 [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | uchan.c | 50 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uchan_uevent() 53 switch (args->v0.type) { in nvkm_uchan_uevent() 116 refcount_set(&ectx->uses, 1); in nvkm_uchan_object_init_0() 121 refcount_set(&cctx->uses, 1); in nvkm_uchan_object_init_0() 148 .dtor[1] = nvkm_uchan_object_dtor, 150 .fini[1] = nvkm_uchan_object_fini_1, 342 if (argc < sizeof(args->v0) || args->v0.version != 0) in nvkm_uchan_new() 344 argc -= sizeof(args->v0); in nvkm_uchan_new() 346 if (args->v0.namelen != argc) in nvkm_uchan_new() 350 runl = nvkm_runl_get(fifo, args->v0.runlist, 0); in nvkm_uchan_new() [all …]
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/linux-6.12.1/drivers/platform/x86/ |
D | acerhdf.c | 53 #define ACERHDF_FAN_AUTO 1 69 static int kernelmode = 1; 146 [1] = { .temperature = ACERHDF_TEMP_CRIT, 155 {"Acer", "AOA110", "v0.3109", 0x55, 0x58, {0x1f, 0x00}, 0}, 156 {"Acer", "AOA110", "v0.3114", 0x55, 0x58, {0x1f, 0x00}, 0}, 157 {"Acer", "AOA110", "v0.3301", 0x55, 0x58, {0xaf, 0x00}, 0}, 158 {"Acer", "AOA110", "v0.3304", 0x55, 0x58, {0xaf, 0x00}, 0}, 159 {"Acer", "AOA110", "v0.3305", 0x55, 0x58, {0xaf, 0x00}, 0}, 160 {"Acer", "AOA110", "v0.3307", 0x55, 0x58, {0xaf, 0x00}, 0}, 161 {"Acer", "AOA110", "v0.3308", 0x55, 0x58, {0x21, 0x00}, 0}, [all …]
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/linux-6.12.1/arch/powerpc/lib/ |
D | memcpy_power7.S | 11 /* 0 == don't use VMX, 1 == use VMX */ 42 bf cr7*4+3,1f 44 addi r4,r4,1 46 addi r3,r3,1 48 1: bf cr7*4+2,2f 54 2: bf cr7*4+1,3f 136 6: bf cr7*4+1,7f 191 12: bf cr7*4+1,13f 232 * 1 for the store side. 236 ori r9,r9,1 /* stream=1 */ [all …]
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/linux-6.12.1/tools/testing/selftests/powerpc/copyloops/ |
D | memcpy_power7.S | 11 /* 0 == don't use VMX, 1 == use VMX */ 42 bf cr7*4+3,1f 44 addi r4,r4,1 46 addi r3,r3,1 48 1: bf cr7*4+2,2f 54 2: bf cr7*4+1,3f 136 6: bf cr7*4+1,7f 191 12: bf cr7*4+1,13f 232 * 1 for the store side. 236 ori r9,r9,1 /* stream=1 */ [all …]
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