Lines Matching +full:1 +full:v0
31 subu t2, linesize, 1 ; \
34 addiu t1, t1, -1 ; \
59 #define CP0_BRCM_MODE $22, 1
63 #define CP0_ICACHE_DATA_LO $28, 1
67 #define CP0_ICACHE_DATA_HI $29, 1
70 #define CP0_BRCM_MODE_Luc_MASK (1 << 11)
71 #define CP0_BRCM_CONFIG0_CWF_MASK (1 << 20)
72 #define CP0_BRCM_CONFIG0_TSE_MASK (1 << 19)
73 #define CP0_BRCM_MODE_SET_MASK (1 << 7)
95 #define BRCM_ZSC_CONFIG_LMB1En 1 << (15)
96 #define BRCM_ZSC_CONFIG_LMB0En 1 << (14)
111 * Returns: v0 = i cache size, v1 = I cache line size
113 * Trashes: v0, v1, a0, t0
122 mfc0 a0, CP0_CONFIG, 1
130 * i) 0x0: 64, ii) 0x1: 128, iii) 0x2: 256, iv) 0x3: 512, v) 0x4: 1k
139 li v0, 0x40
140 sllv v0, v0, a0
158 /* line size = 2 ^ (IL+1) */
160 addi a0, a0, 1
161 li v1, 1
164 /* v0 now have sets per way, multiply it by line size now
168 sll v0, v0, a0
184 /* v0 has the set size, multiply it by
188 multu v0, a0 /*multu is interlocked, so no need to insert nops */
189 mflo v0
190 b 1f
194 move v0, zero
196 1:
206 * Returns: v0 = d cache size, v1 = d cache line size
208 * Trashes: v0, v1, a0, t0
215 mfc0 a0, CP0_CONFIG, 1
223 * i) 0x0: 64, ii) 0x1: 128, iii) 0x2: 256, iv) 0x3: 512, v) 0x4: 1k
232 li v0, 0x40
233 sllv v0, v0, a0
250 /* line size = 2 ^ (IL+1) */
252 addi a0, a0, 1
253 li v1, 1
256 /* v0 now have sets per way, multiply it by line size now
260 sll v0, v0, a0
275 /* v0 has the set size, multiply it by
279 multu v0, a0 /*multu is interlocked, so no need to insert nops */
280 mflo v0
282 b 1f
286 move v0, zero
288 1:
324 * Trashes: a0, v0, v1, t0, t1, t2, t8
351 jal size_i_cache /* v0 = i-cache size, v1 = i-cache line size */
354 /* run uncached in kseg 1 */
355 la k0, 1f
360 1:
376 cacheop(a0, v0, v1, Index_Store_Tag_I)
381 la k0, 1f
387 1:
392 jal size_d_cache /* v0 = d-cache size, v1 = d-cache line size */
397 cacheop(a0, v0, v1, Index_Store_Tag_D)
426 mfc0 t0, CP0_CACHEERR, 1
429 mtc0 t0, CP0_CACHEERR, 1
524 * Trashes: v0, v1, a0, a1
578 * Arguments: a0=0 disable llmb, a0=1 enables llmb
620 * Trashes: v0,v1,a0,a1,t8
636 li a0, 1
653 *set clock ratio by setting 1 to 'set'
716 * Trashes: v0, v1, t0, t1, t2, t5, t7, t8