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/linux-6.12.1/drivers/net/wireless/ath/ath10k/
Dahb.h34 #define ATH10K_GCC_REG_BASE 0x1800000
35 #define ATH10K_GCC_REG_SIZE 0x60000
37 #define ATH10K_TCSR_REG_BASE 0x1900000
38 #define ATH10K_TCSR_REG_SIZE 0x80000
40 #define ATH10K_AHB_GCC_FEPLL_PLL_DIV 0x2f020
41 #define ATH10K_AHB_WIFI_SCRATCH_5_REG 0x4f014
43 #define ATH10K_AHB_WLAN_CORE_ID_REG 0x82030
45 #define ATH10K_AHB_TCSR_WIFI0_GLB_CFG 0x49000
46 #define ATH10K_AHB_TCSR_WIFI1_GLB_CFG 0x49004
49 #define ATH10K_AHB_TCSR_WCSS0_HALTREQ 0x52000
[all …]
/linux-6.12.1/arch/arm/mach-versatile/
Dintegrator-hardware.h14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dqcom,gcc-ipq4019.yaml48 reg = <0x1800000 0x60000>;
Dqcom,gcc-msm8976.yaml66 reg = <0x1800000 0x80000>;
71 <&dsi0_phy 0>,
73 <&dsi1_phy 0>;
/linux-6.12.1/arch/arm/boot/dts/marvell/
Dkirkwood-topkick.dts13 reg = <0x00000000 0x10000000>;
34 pinctrl-0 = <&pmx_sw_left &pmx_sw_right
103 pinctrl-0 = <&pmx_sdio>;
125 pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red
156 #size-cells = <0>;
157 pinctrl-0 = <&pmx_sata0_pwr_enable>;
169 gpio = <&gpio1 4 0>;
177 partition@0 {
179 reg = <0x0000000 0x180000>;
184 reg = <0x0180000 0x20000>;
[all …]
Dkirkwood-netgear_readynas_duo_v2.dts19 reg = <0x00000000 0x10000000>;
78 #clock-cells = <0>;
88 reg = <0x32>;
93 reg = <0x3e>;
95 fan_gear_mode = <0>;
97 pwm_polarity = <0>;
113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity
147 pinctrl-0 = <&pmx_button_power &pmx_button_backup
172 pinctrl-0 = <&pmx_poweroff>;
180 #size-cells = <0>;
[all …]
Dkirkwood-netgear_readynas_nv+_v2.dts19 reg = <0x00000000 0x10000000>;
83 #clock-cells = <0>;
93 reg = <0x32>;
98 reg = <0x3e>;
100 fan_gear_mode = <0>;
102 pwm_polarity = <0>;
132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup
171 pinctrl-0 = <&pmx_button_power &pmx_button_backup
196 pinctrl-0 = <&pmx_poweroff>;
204 #size-cells = <0>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dmscc,vsc7514-switch.yaml132 reg = <0x1010000 0x10000>,
133 <0x1030000 0x10000>,
134 <0x1080000 0x100>,
135 <0x10e0000 0x10000>,
136 <0x11e0000 0x100>,
137 <0x11f0000 0x100>,
138 <0x1200000 0x100>,
139 <0x1210000 0x100>,
140 <0x1220000 0x100>,
141 <0x1230000 0x100>,
[all …]
/linux-6.12.1/arch/mips/boot/dts/mscc/
Docelot.dtsi11 #size-cells = <0>;
13 cpu@0 {
17 reg = <0>;
26 #address-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
50 ranges = <0 0x70000000 0x2000000>;
54 cpu_ctrl: syscon@0 {
56 reg = <0x0 0x2c>;
61 reg = <0x70 0x70>;
[all …]
/linux-6.12.1/drivers/media/dvb-frontends/
Ddrxd_map_firm.h18 #define HI_COMM_EXEC__A 0x400000
19 #define HI_COMM_MB__A 0x400002
20 #define HI_CT_REG_COMM_STATE__A 0x410001
21 #define HI_RA_RAM_SRV_RES__A 0x420031
22 #define HI_RA_RAM_SRV_CMD__A 0x420032
23 #define HI_RA_RAM_SRV_CMD_RESET 0x2
24 #define HI_RA_RAM_SRV_CMD_CONFIG 0x3
25 #define HI_RA_RAM_SRV_CMD_EXECUTE 0x6
26 #define HI_RA_RAM_SRV_RST_KEY__A 0x420033
27 #define HI_RA_RAM_SRV_RST_KEY_ACT 0x3973
[all …]
Ddrxk_map.h2 #define AUD_COMM_EXEC__A 0x1000000
3 #define AUD_COMM_EXEC_STOP 0x0
4 #define FEC_COMM_EXEC__A 0x1C00000
5 #define FEC_COMM_EXEC_STOP 0x0
6 #define FEC_COMM_EXEC_ACTIVE 0x1
7 #define FEC_DI_COMM_EXEC__A 0x1C20000
8 #define FEC_DI_COMM_EXEC_STOP 0x0
9 #define FEC_DI_INPUT_CTL__A 0x1C20016
10 #define FEC_RS_COMM_EXEC__A 0x1C30000
11 #define FEC_RS_COMM_EXEC_STOP 0x0
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-msm8226-samsung-matisse-common.dtsi29 reg = <0x03200000 0x800000>;
82 pinctrl-0 = <&backlight_i2c_default_state>;
88 #size-cells = <0>;
92 reg = <0x2c>;
94 dev-ctrl = /bits/ 8 <0x80>;
95 init-brt = /bits/ 8 <0x3f>;
97 pwms = <&backlight_pwm 0 100000>;
101 rom-addr = /bits/ 8 <0xa0>;
102 rom-val = /bits/ 8 <0x44>;
106 rom-addr = /bits/ 8 <0xa1>;
[all …]
Dqcom-apq8026-samsung-milletwifi.dts37 reg = <0x03200000 0x800000>;
90 pinctrl-0 = <&backlight_i2c_default_state>;
96 #size-cells = <0>;
100 reg = <0x2c>;
103 dev-ctrl = /bits/ 8 <0x80>;
104 init-brt = /bits/ 8 <0x3f>;
112 rom-addr = /bits/ 8 <0xa3>;
113 rom-val = /bits/ 8 <0x5e>;
118 * (0, 120deg, 240deg, -, -, -),
122 rom-addr = /bits/ 8 <0xa5>;
[all …]
Dqcom-ipq4019.dtsi21 #address-cells = <0x1>;
22 #size-cells = <0x1>;
26 reg = <0x87e00000 0x080000>;
31 reg = <0x87e80000 0x180000>;
45 #size-cells = <0>;
46 cpu@0 {
53 reg = <0x0>;
55 clock-frequency = <0>;
67 reg = <0x1>;
69 clock-frequency = <0>;
[all …]
/linux-6.12.1/arch/mips/include/asm/sn/sn0/
Dkldir.h28 * 0x2000000 (32M) +-----------------------------------------+
30 * 0x1F80000 (31.5M) +-----------------------------------------+
32 * 0x1C00000 (30M) +-----------------------------------------+
34 * 0x0800000 (28M) +-----------------------------------------+
36 * 0x1B00000 (27M) +-----------------------------------------+
38 * 0x1A00000 (26M) +-----------------------------------------+
40 * 0x1800000 (24M) +-----------------------------------------+
42 * 0x1600000 (22M) +-----------------------------------------+
48 * 0x190000 (2M--) +-----------------------------------------+
51 * 0x34000 (208K) +-----------------------------------------+
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdm845-lg-common.dtsi42 reg = <0 0xb2000000 0 0x1800000>;
47 reg = <0 0x8c415000 0 0x2000>;
52 reg = <0 0x8c400000 0 0x10000>;
57 reg = <0 0x8c500000 0 0x1e00000>;
62 reg = <0 0x8e300000 0 0x100000>;
67 reg = <0 0x8e400000 0 0x8900000>;
72 reg = <0 0x96d00000 0 0x500000>;
77 reg = <0 0x97200000 0 0x800000>;
82 reg = <0 0x97a00000 0 0x200000>;
87 reg = <0 0x97c00000 0 0x1400000>;
[all …]
Dmsm8994-msft-lumia-octagon.dtsi52 #clock-cells = <0>;
58 pinctrl-0 = <&divclk4_pin_a>;
98 pinctrl-0 = <&hall_front_default &hall_back_default>;
129 reg = <0 0x00200000 0 0x100000>;
134 reg = <0 0x00300000 0 0x80000>;
139 reg = <0 0x00380000 0 0x1000>;
144 reg = <0 0x00381000 0 0x4000>;
149 reg = <0 0x00385000 0 0x1000>;
154 reg = <0 0x00386000 0 0x3000>;
159 reg = <0 0x00389000 0 0x1000>;
[all …]
/linux-6.12.1/drivers/input/misc/
Dcs40l50-vibra.c18 #define CS40L50_RAM_INDEX_START 0x1000000
19 #define CS40L50_RAM_INDEX_END 0x100007F
20 #define CS40L50_RTH_INDEX_START 0x1400000
21 #define CS40L50_RTH_INDEX_END 0x1400001
22 #define CS40L50_ROM_INDEX_START 0x1800000
23 #define CS40L50_ROM_INDEX_END 0x180001A
26 #define CS40L50_PCM_ID 0x0
28 #define CS40L50_CUSTOM_DATA_MASK 0xFFFFU
31 #define CS40L50_GPIO_BASE 0x2804140
32 #define CS40L50_OWT_BASE 0x2805C34
[all …]
/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h10 #define RF_DATA 0x1d4
12 #define rPMAC_Reset 0x100
13 #define rPMAC_TxStart 0x104
14 #define rPMAC_TxLegacySIG 0x108
15 #define rPMAC_TxHTSIG1 0x10c
16 #define rPMAC_TxHTSIG2 0x110
17 #define rPMAC_PHYDebug 0x114
18 #define rPMAC_TxPacketNum 0x118
19 #define rPMAC_TxIdle 0x11c
20 #define rPMAC_TxMACHeader0 0x120
[all …]
/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-qcom-ethqos.c14 #define RGMII_IO_MACRO_CONFIG 0x0
15 #define SDCC_HC_REG_DLL_CONFIG 0x4
16 #define SDCC_TEST_CTL 0x8
17 #define SDCC_HC_REG_DDR_CONFIG 0xC
18 #define SDCC_HC_REG_DLL_CONFIG2 0x10
19 #define SDC4_STATUS 0x14
20 #define SDCC_USR_CTL 0x18
21 #define RGMII_IO_MACRO_CONFIG2 0x1C
22 #define RGMII_IO_MACRO_DEBUG1 0x20
23 #define EMAC_SYSTEM_LOW_POWER_DEBUG 0x28
[all …]
/linux-6.12.1/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h36 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
38 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
39 * 3. RF register 0x00-2E
44 * 1. Page1(0x100)
46 #define rPMAC_Reset 0x100
47 #define rPMAC_TxStart 0x104
48 #define rPMAC_TxLegacySIG 0x108
49 #define rPMAC_TxHTSIG1 0x10c
50 #define rPMAC_TxHTSIG2 0x110
51 #define rPMAC_PHYDebug 0x114
[all …]
/linux-6.12.1/drivers/misc/
Dxilinx_sdfec.c34 #define XSDFEC_CODE_WR_PROTECT_ADDR (0x4)
37 #define XSDFEC_ACTIVE_ADDR (0x8)
38 #define XSDFEC_IS_ACTIVITY_SET (0x1)
41 #define XSDFEC_AXIS_WIDTH_ADDR (0xC)
45 #define XSDFEC_AXIS_DIN_WIDTH_LSB (0)
48 #define XSDFEC_AXIS_ENABLE_ADDR (0x10)
49 #define XSDFEC_AXIS_OUT_ENABLE_MASK (0x38)
50 #define XSDFEC_AXIS_IN_ENABLE_MASK (0x7)
55 #define XSDFEC_FEC_CODE_ADDR (0x14)
58 #define XSDFEC_ORDER_ADDR (0x18)
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Dreg.h7 #define REG_SYS_ISO_CTRL 0x0000
8 #define REG_SYS_FUNC_EN 0x0002
9 #define REG_APS_FSMCO 0x0004
10 #define REG_SYS_CLKR 0x0008
11 #define REG_9346CR 0x000A
12 #define REG_EE_VPD 0x000C
13 #define REG_AFE_MISC 0x0010
14 #define REG_SPS0_CTRL 0x0011
15 #define REG_SPS_OCP_CFG 0x0018
16 #define REG_RSV_CTRL 0x001C
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_SYS_SWR_CTRL1 0x0010
[all …]

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