Home
last modified time | relevance | path

Searched +full:0 +full:x0f (Results 1 – 25 of 1059) sorted by relevance

12345678910>>...43

/linux-6.12.1/arch/sh/boards/mach-se/770x/
Dirq.c23 * 3: serial 0
33 { 13, 0, 8, 0x0f-13, },
34 { 5 , 0, 4, 0x0f- 5, },
35 { 10, 1, 0, 0x0f-10, },
36 { 7 , 2, 4, 0x0f- 7, },
37 { 3 , 2, 0, 0x0f- 3, },
38 { 1 , 3, 12, 0x0f- 1, },
39 { 12, 3, 4, 0x0f-12, }, /* LAN */
40 { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */
41 { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */
[all …]
/linux-6.12.1/arch/m68k/mac/
Dmac_penguin.S3 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00…
4 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x00…
5 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF0…
6 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF…
7 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF…
8 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0xFF…
9 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF…
10 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF…
11 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF…
12 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF…
[all …]
/linux-6.12.1/drivers/isdn/mISDN/
Dl1oip_codec.c52 0xab, 0x2b, 0xe3, 0x63, 0x8b, 0x0b, 0xc9, 0x49,
53 0xba, 0x3a, 0xf6, 0x76, 0x9b, 0x1b, 0xd7, 0x57,
54 0xa3, 0x23, 0xdd, 0x5d, 0x83, 0x03, 0xc1, 0x41,
55 0xb2, 0x32, 0xeb, 0x6b, 0x93, 0x13, 0xcf, 0x4f,
56 0xaf, 0x2f, 0xe7, 0x67, 0x8f, 0x0f, 0xcd, 0x4d,
57 0xbe, 0x3e, 0xfe, 0x7e, 0x9f, 0x1f, 0xdb, 0x5b,
58 0xa7, 0x27, 0xdf, 0x5f, 0x87, 0x07, 0xc5, 0x45,
59 0xb6, 0x36, 0xef, 0x6f, 0x97, 0x17, 0xd3, 0x53,
60 0xa9, 0x29, 0xe1, 0x61, 0x89, 0x09, 0xc7, 0x47,
61 0xb8, 0x38, 0xf2, 0x72, 0x99, 0x19, 0xd5, 0x55,
[all …]
/linux-6.12.1/lib/raid6/
Drecov_ssse3.c22 static const u8 __aligned(16) x0f[16] = { in raid6_2data_recov_ssse3()
23 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, in raid6_2data_recov_ssse3()
24 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f}; in raid6_2data_recov_ssse3()
54 asm volatile("movdqa %0,%%xmm7" : : "m" (x0f[0])); in raid6_2data_recov_ssse3()
57 asm volatile("movdqa %0,%%xmm6" : : "m" (qmul[0])); in raid6_2data_recov_ssse3()
58 asm volatile("movdqa %0,%%xmm14" : : "m" (pbmul[0])); in raid6_2data_recov_ssse3()
59 asm volatile("movdqa %0,%%xmm15" : : "m" (pbmul[16])); in raid6_2data_recov_ssse3()
67 asm volatile("movdqa %0,%%xmm1" : : "m" (q[0])); in raid6_2data_recov_ssse3()
68 asm volatile("movdqa %0,%%xmm9" : : "m" (q[16])); in raid6_2data_recov_ssse3()
69 asm volatile("movdqa %0,%%xmm0" : : "m" (p[0])); in raid6_2data_recov_ssse3()
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3288-veyron-jerry.dts25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
/linux-6.12.1/include/linux/mfd/da9062/
Dregisters.h9 #define DA9062_PMIC_DEVICE_ID 0x62
10 #define DA9062_PMIC_VARIANT_MRC_AA 0x01
11 #define DA9062_PMIC_VARIANT_VRC_DA9061 0x01
12 #define DA9062_PMIC_VARIANT_VRC_DA9062 0x02
20 #define DA9062AA_PAGE_CON 0x000
21 #define DA9062AA_STATUS_A 0x001
22 #define DA9062AA_STATUS_B 0x002
23 #define DA9062AA_STATUS_D 0x004
24 #define DA9062AA_FAULT_LOG 0x005
25 #define DA9062AA_EVENT_A 0x006
[all …]
/linux-6.12.1/arch/mips/include/asm/octeon/
Dcvmx-ciu-defs.h13 (CVMX_ADD_IO_SEG(0x0001070000000000ull + addr##ull) + \
16 #define CVMX_CIU_EN2_PPX_IP4(c) CVMX_CIU_ADDR(0xA400, c, 0x0F, 8)
17 #define CVMX_CIU_EN2_PPX_IP4_W1C(c) CVMX_CIU_ADDR(0xCC00, c, 0x0F, 8)
18 #define CVMX_CIU_EN2_PPX_IP4_W1S(c) CVMX_CIU_ADDR(0xAC00, c, 0x0F, 8)
19 #define CVMX_CIU_FUSE CVMX_CIU_ADDR(0x0728, 0, 0x00, 0)
20 #define CVMX_CIU_INT_SUM1 CVMX_CIU_ADDR(0x0108, 0, 0x00, 0)
21 #define CVMX_CIU_INTX_EN0(c) CVMX_CIU_ADDR(0x0200, c, 0x3F, 16)
22 #define CVMX_CIU_INTX_EN0_W1C(c) CVMX_CIU_ADDR(0x2200, c, 0x3F, 16)
23 #define CVMX_CIU_INTX_EN0_W1S(c) CVMX_CIU_ADDR(0x6200, c, 0x3F, 16)
24 #define CVMX_CIU_INTX_EN1(c) CVMX_CIU_ADDR(0x0208, c, 0x3F, 16)
[all …]
/linux-6.12.1/drivers/net/ieee802154/
Dat86rf230.h15 #define RG_TRX_STATUS (0x01)
16 #define SR_TRX_STATUS 0x01, 0x1f, 0
17 #define SR_RESERVED_01_3 0x01, 0x20, 5
18 #define SR_CCA_STATUS 0x01, 0x40, 6
19 #define SR_CCA_DONE 0x01, 0x80, 7
20 #define RG_TRX_STATE (0x02)
21 #define SR_TRX_CMD 0x02, 0x1f, 0
22 #define SR_TRAC_STATUS 0x02, 0xe0, 5
23 #define RG_TRX_CTRL_0 (0x03)
24 #define SR_CLKM_CTRL 0x03, 0x07, 0
[all …]
/linux-6.12.1/tools/perf/arch/x86/tests/
Dinsn-x86-dat-32.c8 {{0x0f, 0x31, }, 2, 0, "", "",
9 "0f 31 \trdtsc ",},
10 {{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "",
12 {{0x62, 0x81, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
13 "62 81 78 56 34 12 \tbound %eax,0x12345678(%ecx)",},
14 {{0x62, 0x88, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
15 "62 88 78 56 34 12 \tbound %ecx,0x12345678(%eax)",},
16 {{0x62, 0x90, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
17 "62 90 78 56 34 12 \tbound %edx,0x12345678(%eax)",},
18 {{0x62, 0x98, 0x78, 0x56, 0x34, 0x12, }, 6, 0, "", "",
[all …]
Dinsn-x86-dat-64.c8 {{0x0f, 0x31, }, 2, 0, "", "",
9 "0f 31 \trdtsc ",},
10 {{0xc4, 0xe2, 0x7d, 0x13, 0xeb, }, 5, 0, "", "",
12 {{0x48, 0x0f, 0x41, 0xd8, }, 4, 0, "", "",
13 "48 0f 41 d8 \tcmovno %rax,%rbx",},
14 {{0x48, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
15 "48 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%rcx",},
16 {{0x66, 0x0f, 0x41, 0x88, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
17 "66 0f 41 88 78 56 34 12 \tcmovno 0x12345678(%rax),%cx",},
18 {{0x48, 0x0f, 0x44, 0xd8, }, 4, 0, "", "",
[all …]
/linux-6.12.1/drivers/gpu/drm/panel/
Dpanel-nec-nl8048hl11.c35 u8 data[4] = { value, 0x01, addr, 0x00 }; in nl8048_write()
52 { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, in nl8048_init()
53 { 5, 0x14 }, { 6, 0x24 }, { 16, 0xd7 }, { 17, 0x00 }, in nl8048_init()
54 { 18, 0x00 }, { 19, 0x55 }, { 20, 0x01 }, { 21, 0x70 }, in nl8048_init()
55 { 22, 0x1e }, { 23, 0x25 }, { 24, 0x25 }, { 25, 0x02 }, in nl8048_init()
56 { 26, 0x02 }, { 27, 0xa0 }, { 32, 0x2f }, { 33, 0x0f }, in nl8048_init()
57 { 34, 0x0f }, { 35, 0x0f }, { 36, 0x0f }, { 37, 0x0f }, in nl8048_init()
58 { 38, 0x0f }, { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, in nl8048_init()
59 { 42, 0x02 }, { 43, 0x0f }, { 44, 0x0f }, { 45, 0x0f }, in nl8048_init()
60 { 46, 0x0f }, { 47, 0x0f }, { 48, 0x0f }, { 49, 0x0f }, in nl8048_init()
[all …]
Dpanel-ilitek-ili9805.c23 #define ILI9805_EXTCMD_CMD_SET_ENABLE_REG (0xff)
24 #define ILI9805_SETEXTC_PARAMETER1 (0xff)
25 #define ILI9805_SETEXTC_PARAMETER2 (0x98)
26 #define ILI9805_SETEXTC_PARAMETER3 (0x05)
62 ILI9805_INSTR(100, 0xFD, 0x0F, 0x10, 0x44, 0x00),
63 ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x00,
64 0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00),
65 ILI9805_INSTR(0, 0xB8, 0x62),
66 ILI9805_INSTR(0, 0xF1, 0x00),
67 ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dradio_2055.c24 #define B2055_INITTAB_ENTRY_OK 0x01
25 #define B2055_INITTAB_UPLOAD 0x02
31 [B2055_SP_PINPD] = { .ghz5 = 0x0080, .ghz2 = 0x0080, NOUPLOAD, },
32 [B2055_C1_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
33 [B2055_C1_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
34 [B2055_C2_SP_RSSI] = { .ghz5 = 0x0000, .ghz2 = 0x0000, NOUPLOAD, },
35 [B2055_C2_SP_PDMISC] = { .ghz5 = 0x0027, .ghz2 = 0x0027, NOUPLOAD, },
36 [B2055_C1_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
37 [B2055_C1_SP_RXGC2] = { .ghz5 = 0x0007, .ghz2 = 0x0007, UPLOAD, },
38 [B2055_C2_SP_RXGC1] = { .ghz5 = 0x007F, .ghz2 = 0x007F, UPLOAD, },
[all …]
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/linux-6.12.1/drivers/net/ethernet/realtek/
Datp.h16 #define PAR_DATA 0
20 #define Ctrl_LNibRead 0x08 /* LP_PSELECP */
21 #define Ctrl_HNibRead 0
22 #define Ctrl_LNibWrite 0x08 /* LP_PSELECP */
23 #define Ctrl_HNibWrite 0
24 #define Ctrl_SelData 0x04 /* LP_PINITP */
25 #define Ctrl_IRQEN 0x10 /* LP_PINTEN */
27 #define EOW 0xE0
28 #define EOC 0xE0
29 #define WrAddr 0x40 /* Set address of EPLC read, write register. */
[all …]
/linux-6.12.1/arch/s390/lib/
Dprobes.c16 switch (insn[0] >> 8) { in probe_is_prohibited_opcode()
17 case 0x0c: /* bassm */ in probe_is_prohibited_opcode()
18 case 0x0b: /* bsm */ in probe_is_prohibited_opcode()
19 case 0x83: /* diag */ in probe_is_prohibited_opcode()
20 case 0x44: /* ex */ in probe_is_prohibited_opcode()
21 case 0xac: /* stnsm */ in probe_is_prohibited_opcode()
22 case 0xad: /* stosm */ in probe_is_prohibited_opcode()
24 case 0xc6: in probe_is_prohibited_opcode()
25 switch (insn[0] & 0x0f) { in probe_is_prohibited_opcode()
26 case 0x00: /* exrl */ in probe_is_prohibited_opcode()
[all …]
/linux-6.12.1/include/linux/mfd/da9052/
Dreg.h14 #define DA9052_PAGE0_CON_REG 0
176 #define DA9052_PAGE_CONF 0X80
179 #define DA9052_STATUSA_VDATDET 0X80
180 #define DA9052_STATUSA_VBUSSEL 0X40
181 #define DA9052_STATUSA_DCINSEL 0X20
182 #define DA9052_STATUSA_VBUSDET 0X10
183 #define DA9052_STATUSA_DCINDET 0X08
184 #define DA9052_STATUSA_IDGND 0X04
185 #define DA9052_STATUSA_IDFLOAT 0X02
186 #define DA9052_STATUSA_NONKEY 0X01
[all …]
/linux-6.12.1/sound/soc/bcm/
Dbcm63xx-i2s.h10 #define I2S_MISC_CFG (0x003C)
19 #define I2S_TX_CLOCK_ENABLE (1 << 0)
22 #define I2S_TX_DESC_OFF_LEVEL_MASK (0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT)
24 #define I2S_TX_DESC_IFF_LEVEL_MASK (0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT)
28 #define I2S_TX_CFG (0x0000)
29 #define I2S_TX_IRQ_CTL (0x0004)
30 #define I2S_TX_IRQ_EN (0x0008)
31 #define I2S_TX_IRQ_IFF_THLD (0x000c)
32 #define I2S_TX_IRQ_OFF_THLD (0x0010)
33 #define I2S_TX_DESC_IFF_ADDR (0x0014)
[all …]
/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/displays/
Dpanel-nec-nl8048hl11.c44 { 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 },
45 { 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 },
46 { 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 }, { 24, 0x25 },
47 { 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F },
48 { 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F }, { 38, 0x0F },
49 { 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 }, { 43, 0x0F },
50 { 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F }, { 48, 0x0F },
51 { 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 },
52 { 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 }, { 86, 0x14 },
53 { 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 }, { 93, 0x0C },
[all …]
/linux-6.12.1/drivers/input/misc/
Dhp_sdc_rtc.c73 i = 0; in hp_sdc_rtc_do_read_bbrtc()
77 tseq[i++] = 0x01; /* write i8042[0x70] */ in hp_sdc_rtc_do_read_bbrtc()
88 sema_init(&tsem, 0); in hp_sdc_rtc_do_read_bbrtc()
99 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f)) in hp_sdc_rtc_do_read_bbrtc()
102 memset(rtctm, 0, sizeof(struct rtc_time)); in hp_sdc_rtc_do_read_bbrtc()
103 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10; in hp_sdc_rtc_do_read_bbrtc()
104 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10; in hp_sdc_rtc_do_read_bbrtc()
105 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10; in hp_sdc_rtc_do_read_bbrtc()
106 rtctm->tm_wday = (tseq[48] & 0x0f); in hp_sdc_rtc_do_read_bbrtc()
107 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10; in hp_sdc_rtc_do_read_bbrtc()
[all …]
/linux-6.12.1/drivers/media/platform/st/sti/bdisp/
Dbdisp-hw.c37 bool src_420; /* is the src 4:2:0 chroma subsampled */
40 bool dst_420; /* is the dst 4:2:0 chroma subsampled */
52 .min = 0,
55 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x00,
56 0x00, 0x00, 0xff, 0x07, 0x3d, 0xfc, 0x01, 0x00,
57 0x00, 0x01, 0xfd, 0x11, 0x36, 0xf9, 0x02, 0x00,
58 0x00, 0x01, 0xfb, 0x1b, 0x2e, 0xf9, 0x02, 0x00,
59 0x00, 0x01, 0xf9, 0x26, 0x26, 0xf9, 0x01, 0x00,
60 0x00, 0x02, 0xf9, 0x30, 0x19, 0xfb, 0x01, 0x00,
61 0x00, 0x02, 0xf9, 0x39, 0x0e, 0xfd, 0x01, 0x00,
[all …]
/linux-6.12.1/drivers/staging/fbtft/
Dfb_hx8340bn.c27 #define DEFAULT_GAMMA "1 3 0E 5 0 2 09 0 6 1 7 1 0 2 2\n" \
28 "3 3 17 8 4 7 05 7 6 0 3 1 6 0 0 "
45 write_reg(par, 0xC1, 0xFF, 0x83, 0x40); in init_display()
53 write_reg(par, 0x11); in init_display()
57 write_reg(par, 0xCA, 0x70, 0x00, 0xD9); in init_display()
65 write_reg(par, 0xB0, 0x01, 0x11); in init_display()
68 write_reg(par, 0xC9, 0x90, 0x49, 0x10, 0x28, 0x28, 0x10, 0x00, 0x06); in init_display()
78 write_reg(par, 0xB5, 0x35, 0x20, 0x45); in init_display()
82 * VRH[4:0]: Specify the VREG1 voltage adjusting. in init_display()
84 * BT[2:0]: Switch the output factor of step-up circuit 2 in init_display()
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtl818x/rtl8180/
Drtl8225se.c24 0x0096, 0x0076, 0x0056, 0x0036, 0x0016, 0x01f6, 0x01d6, 0x01b6,
25 0x0196, 0x0176, 0x00F7, 0x00D7, 0x00B7, 0x0097, 0x0077, 0x0057,
26 0x0037, 0x00FB, 0x00DB, 0x00BB, 0x00FF, 0x00E3, 0x00C3, 0x00A3,
27 0x0083, 0x0063, 0x0043, 0x0023, 0x0003, 0x01E3, 0x01C3, 0x01A3,
28 0x0183, 0x0163, 0x0143, 0x0123, 0x0103
32 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
33 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b,
34 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11,
35 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
36 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d,
[all …]
/linux-6.12.1/drivers/leds/
Dleds-lp50xx.c21 #define LP50XX_DEV_CFG0 0x00
22 #define LP50XX_DEV_CFG1 0x01
23 #define LP50XX_LED_CFG0 0x02
26 #define LP5012_BNK_BRT 0x03
27 #define LP5012_BNKA_CLR 0x04
28 #define LP5012_BNKB_CLR 0x05
29 #define LP5012_BNKC_CLR 0x06
30 #define LP5012_LED0_BRT 0x07
31 #define LP5012_OUT0_CLR 0x0b
32 #define LP5012_RESET 0x17
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
Dphy_n.c28 radio_type##_##jspace##0 : \
34 radio_type##_##jspace##0 : \
42 radio_type##_##jspace##0##_##reg_name : \
47 radio_type##_##jspace##0##_##reg_name : \
53 radio_type##_##reg_name##_##jspace##0 : \
58 radio_type##_##reg_name##_##jspace##0 : \
107 #define NPHY_RSSICAL_NB_TARGET 0
120 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f)))
129 #define NPHY_N_GCTL 0x66
135 #define NPHY_PAPD_COMP_OFF 0
[all …]

12345678910>>...43