/linux-6.12.1/arch/arm/boot/dts/nvidia/ |
D | tegra20-paz00.dts | 28 memory@0 { 29 reg = <0x00000000 0x20000000>; 55 pinctrl-0 = <&state_default>; 303 reg = <0x1e>; 335 reg = <0x34>; 471 reg = <0x4c>; 484 nvidia,cpu-pwr-off-time = <0>; 486 nvidia,core-pwr-off-time = <0>; 494 emc-tables@0 { 495 nvidia,ram-code = <0x0>; [all …]
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D | tegra20-colibri.dtsi | 11 memory@0 { 17 reg = <0x00000000 0x10000000>; 57 pinctrl-0 = <&state_default>; 449 <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>; 451 <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>; 469 nand@0 { 470 reg = <0>; 478 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; 506 reg = <0x34>; 535 regulator-name = "VDD_CPU_1.0V"; [all …]
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D | tegra20-seaboard.dts | 21 memory@0 { 22 reg = <0x00000000 0x40000000>; 49 pinctrl-0 = <&state_default>; 342 reg = <0x1a>; 349 micdet-cfg = <0>; 351 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>; 357 reg = <0x44>; 364 reg = <0x68>; 386 reg = <0xc>; 393 reg = <0x34>; [all …]
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/linux-6.12.1/drivers/media/rc/keymaps/ |
D | rc-hisi-tv-demo.c | 12 { 0x00000092, KEY_NUMERIC_1}, 13 { 0x00000093, KEY_NUMERIC_2}, 14 { 0x000000cc, KEY_NUMERIC_3}, 15 { 0x0000009f, KEY_NUMERIC_4}, 16 { 0x0000008e, KEY_NUMERIC_5}, 17 { 0x0000008f, KEY_NUMERIC_6}, 18 { 0x000000c8, KEY_NUMERIC_7}, 19 { 0x00000094, KEY_NUMERIC_8}, 20 { 0x0000008a, KEY_NUMERIC_9}, 21 { 0x0000008b, KEY_NUMERIC_0}, [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
D | regsnv04.h | 5 #define NV04_PFIFO_DELAY_0 0x00002040 6 #define NV04_PFIFO_DMA_TIMESLICE 0x00002044 7 #define NV04_PFIFO_NEXT_CHANNEL 0x00002050 8 #define NV03_PFIFO_INTR_0 0x00002100 9 #define NV03_PFIFO_INTR_EN_0 0x00002140 10 # define NV_PFIFO_INTR_CACHE_ERROR (1<<0) 17 #define NV03_PFIFO_RAMHT 0x00002210 18 #define NV03_PFIFO_RAMFC 0x00002214 19 #define NV03_PFIFO_RAMRO 0x00002218 20 #define NV40_PFIFO_RAMFC 0x00002220 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
D | nvidia,tegra20-emc.yaml | 38 const: 0 41 const: 0 145 "^emc-table@[0-9]+$": 165 const: 0 172 "^emc-table@[0-9]+$": 199 reg = <0x7000f400 0x400>; 200 interrupts = <0 78 4>; 207 #interconnect-cells = <0>; 209 #size-cells = <0>; 213 emc-tables@0 { [all …]
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/linux-6.12.1/drivers/gpu/drm/msm/dp/ |
D | dp_reg.h | 13 #define REG_DP_HW_VERSION (0x00000000) 15 #define REG_DP_SW_RESET (0x00000010) 16 #define DP_SW_RESET (0x00000001) 18 #define REG_DP_PHY_CTRL (0x00000014) 19 #define DP_PHY_CTRL_SW_RESET_PLL (0x00000001) 20 #define DP_PHY_CTRL_SW_RESET (0x00000004) 22 #define REG_DP_CLK_CTRL (0x00000018) 23 #define REG_DP_CLK_ACTIVE (0x0000001C) 24 #define REG_DP_INTR_STATUS (0x00000020) 25 #define REG_DP_INTR_STATUS2 (0x00000024) [all …]
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/linux-6.12.1/drivers/staging/rtl8723bs/hal/ |
D | HalHWImg8723B_MAC.c | 16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive() 31 pDM_Odm->TypeGLNA << 0 | in CheckPositive() 40 if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) != (driver1 & 0x0000F000))) in CheckPositive() 42 if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) != (driver1 & 0x0F000000))) in CheckPositive() 48 cond1 &= 0x000F0FFF; in CheckPositive() 49 driver1 &= 0x000F0FFF; in CheckPositive() 52 u32 bitMask = 0; in CheckPositive() 53 if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE */ in CheckPositive() 56 if ((cond1 & BIT0) != 0) /* GLNA */ in CheckPositive() 57 bitMask |= 0x000000FF; in CheckPositive() [all …]
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/linux-6.12.1/drivers/media/platform/rockchip/rkisp1/ |
D | rkisp1-regs.h | 12 #define RKISP1_CIF_ISP_CTRL_ISP_ENABLE BIT(0) 13 #define RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT (0 << 1) 32 #define RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE BIT(0) 35 #define RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT_RGGB (0 << 3) 40 #define RKISP1_CIF_ISP_ACQ_PROP_YCBYCR (0 << 7) 44 #define RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL (0 << 9) 47 #define RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B (0 << 12) 54 #define RKISP1_CIF_VI_DPCL_DMA_JPEG (0 << 0) 55 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_MI (1 << 0) 56 #define RKISP1_CIF_VI_DPCL_MP_MUX_MRSZ_JPEG (2 << 0) [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8723be/ |
D | table.c | 8 0x800, 0x80040000, 9 0x804, 0x00000003, 10 0x808, 0x0000FC00, 11 0x80C, 0x0000000A, 12 0x810, 0x10001331, 13 0x814, 0x020C3D10, 14 0x818, 0x02200385, 15 0x81C, 0x00000000, 16 0x820, 0x01000100, 17 0x824, 0x00190204, [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/ |
D | table.c | 6 0x800, 0x80040000, 7 0x804, 0x00000003, 8 0x808, 0x0000FC00, 9 0x80C, 0x0000000A, 10 0x810, 0x10001331, 11 0x814, 0x020C3D10, 12 0x818, 0x02220385, 13 0x81C, 0x00000000, 14 0x820, 0x01000100, 15 0x824, 0x00390204, [all …]
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/linux-6.12.1/drivers/gpu/drm/rockchip/ |
D | rockchip_vop_reg.h | 11 #define RK3288_REG_CFG_DONE 0x0000 12 #define RK3288_VERSION_INFO 0x0004 13 #define RK3288_SYS_CTRL 0x0008 14 #define RK3288_SYS_CTRL1 0x000c 15 #define RK3288_DSP_CTRL0 0x0010 16 #define RK3288_DSP_CTRL1 0x0014 17 #define RK3288_DSP_BG 0x0018 18 #define RK3288_MCU_CTRL 0x001c 19 #define RK3288_INTR_CTRL0 0x0020 20 #define RK3288_INTR_CTRL1 0x0024 [all …]
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/linux-6.12.1/drivers/scsi/ |
D | 53c700_d.h_shipped | 28 ABSOLUTE Device_ID = 0 ; ID of target for command 29 ABSOLUTE MessageCount = 0 ; Number of bytes in message 30 ABSOLUTE MessageLocation = 0 ; Addr of message 31 ABSOLUTE CommandCount = 0 ; Number of bytes in command 32 ABSOLUTE CommandAddress = 0 ; Addr of Command 33 ABSOLUTE StatusAddress = 0 ; Addr to receive status return 34 ABSOLUTE ReceiveMsgAddress = 0 ; Addr to receive msg 42 ABSOLUTE SGScriptStartAddress = 0 45 ; this: 0xPRS where 48 ABSOLUTE AFTER_SELECTION = 0x100 [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/ |
D | nouveau_reg.h | 3 #define NV04_PFB_BOOT_0 0x00100000 4 # define NV04_PFB_BOOT_0_RAM_AMOUNT 0x00000003 5 # define NV04_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000 6 # define NV04_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001 7 # define NV04_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002 8 # define NV04_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003 9 # define NV04_PFB_BOOT_0_RAM_WIDTH_128 0x00000004 10 # define NV04_PFB_BOOT_0_RAM_TYPE 0x00000028 11 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000 12 # define NV04_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008 [all …]
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/linux-6.12.1/drivers/ata/ |
D | ahci_xgene.c | 26 #define SATA_ENET_CONFIG_REG 0x00000000 27 #define CFG_SATA_ENET_SELECT_MASK 0x00000001 30 #define SLVRDERRATTRIBUTES 0x00000000 31 #define SLVWRERRATTRIBUTES 0x00000004 32 #define MSTRDERRATTRIBUTES 0x00000008 33 #define MSTWRERRATTRIBUTES 0x0000000c 34 #define BUSCTLREG 0x00000014 35 #define IOFMSTRWAUX 0x00000018 36 #define INTSTATUSMASK 0x0000002c 37 #define ERRINTSTATUS 0x00000030 [all …]
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/linux-6.12.1/drivers/net/wireless/realtek/rtw88/ |
D | rtw8703b_tables.c | 9 { 0, 0, 0, 0x00000e08, 0x0000ff00, 0x00003200, }, 10 { 0, 0, 0, 0x0000086c, 0xffffff00, 0x32323200, }, 11 { 0, 0, 0, 0x00000e00, 0xffffffff, 0x34363636, }, 12 { 0, 0, 0, 0x00000e04, 0xffffffff, 0x28303234, }, 13 { 0, 0, 0, 0x00000e10, 0xffffffff, 0x30343434, }, 14 { 0, 0, 0, 0x00000e14, 0xffffffff, 0x26262830, }, 19 /* Regd: FCC -> 0, ETSI -> 2, MKK -> 1 20 * Band: 2.4G -> 0, 5G -> 1 21 * Bandwidth (bw): 20M -> 0, 40M -> 1, 80M -> 2, 160M -> 3 22 * Rate Section (rs): CCK -> 0, OFDM -> 1, HT -> 2, VHT -> 3 [all …]
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D | rtw8723d_table.c | 10 0x020, 0x00000013, 11 0x02F, 0x00000010, 12 0x077, 0x00000007, 13 0x421, 0x0000000F, 14 0x428, 0x0000000A, 15 0x429, 0x00000010, 16 0x430, 0x00000000, 17 0x431, 0x00000000, 18 0x432, 0x00000000, 19 0x433, 0x00000001, [all …]
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/linux-6.12.1/crypto/ |
D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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/linux-6.12.1/arch/mips/include/asm/sibyte/ |
D | sb1250_regs.h | 46 * XXX: can't remove MC base 0 if 112x, since it's used by other macros, 51 #define A_MC_BASE_0 0x0010051000 52 #define A_MC_BASE_1 0x0010052000 53 #define MC_REGISTER_SPACING 0x1000 58 #define R_MC_CONFIG 0x0000000100 59 #define R_MC_DRAMCMD 0x0000000120 60 #define R_MC_DRAMMODE 0x0000000140 61 #define R_MC_TIMING1 0x0000000160 62 #define R_MC_TIMING2 0x0000000180 63 #define R_MC_CS_START 0x00000001A0 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
D | nbio_7_0_default.h | 26 #define cfgNB_NBCFG0_NB_VENDOR_ID_DEFAULT 0x00000000 27 #define cfgNB_NBCFG0_NB_DEVICE_ID_DEFAULT 0x00000000 28 #define cfgNB_NBCFG0_NB_COMMAND_DEFAULT 0x00000000 29 #define cfgNB_NBCFG0_NB_STATUS_DEFAULT 0x00000000 30 #define cfgNB_NBCFG0_NB_REVISION_ID_DEFAULT 0x00000000 31 #define cfgNB_NBCFG0_NB_REGPROG_INF_DEFAULT 0x00000000 32 #define cfgNB_NBCFG0_NB_SUB_CLASS_DEFAULT 0x00000000 33 #define cfgNB_NBCFG0_NB_BASE_CODE_DEFAULT 0x00000000 34 #define cfgNB_NBCFG0_NB_CACHE_LINE_DEFAULT 0x00000000 35 #define cfgNB_NBCFG0_NB_LATENCY_DEFAULT 0x00000000 [all …]
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D | nbio_2_3_default.h | 26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000 27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000 28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000 32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000 33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000 34 #define mmPCIE_INDEX_DEFAULT 0x00000000 35 #define mmPCIE_DATA_DEFAULT 0x00000000 36 #define mmPCIE_INDEX2_DEFAULT 0x00000000 37 #define mmPCIE_DATA2_DEFAULT 0x00000000 38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000 [all …]
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/linux-6.12.1/drivers/gpu/drm/amd/include/ |
D | navi10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 GATCL1_TYPE_NORMAL = 0x00000000, 185 GATCL1_TYPE_SHOOTDOWN = 0x00000001, 186 GATCL1_TYPE_BYPASS = 0x00000002, 194 UTCL1_TYPE_NORMAL = 0x00000000, 195 UTCL1_TYPE_SHOOTDOWN = 0x00000001, 196 UTCL1_TYPE_BYPASS = 0x00000002, 204 UTCL1_XNACK_SUCCESS = 0x00000000, 205 UTCL1_XNACK_RETRY = 0x00000001, 206 UTCL1_XNACK_PRT = 0x00000002, [all …]
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D | vega10_enum.h | 51 GDS_PERF_SEL_DS_ADDR_CONFL = 0, 184 NO_FORCE_REQUEST = 0x00000000, 185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001, 186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002, 187 FORCE_SHUT_DOWN_REQUEST = 0x00000003, 195 NO_FORCE_REQ = 0x00000000, 196 FORCE_LIGHT_SLEEP_REQ = 0x00000001, 204 ENABLE_MEM_PWR_CTRL = 0x00000000, 205 DISABLE_MEM_PWR_CTRL = 0x00000001, 213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000, [all …]
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D | soc21_enum.h | 55 DSM_DATA_SEL_DISABLE = 0x00000000, 56 DSM_DATA_SEL_0 = 0x00000001, 57 DSM_DATA_SEL_1 = 0x00000002, 58 DSM_DATA_SEL_BOTH = 0x00000003, 66 DSM_ENABLE_ERROR_INJECT_FED_IN = 0x00000000, 67 DSM_ENABLE_ERROR_INJECT_SINGLE = 0x00000001, 68 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE = 0x00000002, 69 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE_LIMITED = 0x00000003, 77 DSM_SELECT_INJECT_DELAY_NO_DELAY = 0x00000000, 78 DSM_SELECT_INJECT_DELAY_DELAY_ERROR = 0x00000001, [all …]
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/linux-6.12.1/drivers/scsi/mpt3sas/mpi/ |
D | mpi2.h | 16 * with MPI v2.0 products. Unless otherwise noted, names beginning with 17 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 28 * Moved ReplyPostHostIndex register to offset 0x6C of the 39 * product specific codes up to 0xEFFF. 41 * and changed the flush value to 0x0. 69 * function codes, 0xF0 to 0xFF. 140 #define MPI2_VERSION_MAJOR_MASK (0xFF00) 142 #define MPI2_VERSION_MINOR_MASK (0x00FF) 143 #define MPI2_VERSION_MINOR_SHIFT (0) 146 #define MPI2_VERSION_MAJOR (0x02) [all …]
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