1 /*
2  * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef WIFI_DRIVER_SERVICE_V01_H
18 #define WIFI_DRIVER_SERVICE_V01_H
19 
20 #include <linux/soc/qcom/qmi.h>
21 
22 #define WFDS_SERVICE_ID_V01 0x043C
23 #define WFDS_SERVICE_VERS_V01 0x01
24 
25 #define QMI_WFDS_IPCC_MAP_N_CFG_RESP_V01 0x0003
26 #define QMI_WFDS_UT_CMD_RESP_V01 0x0005
27 #define QMI_WFDS_MISC_REQ_V01 0x0004
28 #define QMI_WFDS_MISC_RESP_V01 0x0004
29 #define QMI_WFDS_MEM_RESP_V01 0x0002
30 #define QMI_WFDS_IPCC_MAP_N_CFG_REQ_V01 0x0003
31 #define QMI_WFDS_MISC_IND_V01 0x0004
32 #define QMI_WFDS_UT_CMD_REQ_V01 0x0005
33 #define QMI_WFDS_CONFIG_REQ_V01 0x0001
34 #define QMI_WFDS_IPCC_MAP_N_CFG_IND_V01 0x0003
35 #define QMI_WFDS_CONFIG_RESP_V01 0x0001
36 #define QMI_WFDS_MEM_REQ_V01 0x0002
37 #define QMI_WFDS_MEM_IND_V01 0x0002
38 
39 #define WFDS_CE_MAX_SRNG_V01 3
40 #define WFDS_MEM_ARENA_MAX_V01 8
41 #define WFDS_PAGE_INFO_MAX_ARRAY_SIZE_V01 255
42 
43 /**
44  * struct wfds_gen_resp_msg_v01 - Generic QMI response message
45  * @resp: QMI result code
46  */
47 struct wfds_gen_resp_msg_v01 {
48 	struct qmi_response_type_v01 resp;
49 };
50 
51 #define WFDS_GEN_RESP_MSG_V01_MAX_MSG_LEN 7
52 extern struct qmi_elem_info wfds_gen_resp_msg_v01_ei[];
53 
54 /**
55  * enum wifi_drv_qmi_srng_direction_v01 - SRNG direction
56  * @WIFI_DRV_QMI_SRNG_DIRECTION_MIN_VAL_V01: SRNG direction enum min value
57  * @WFDS_SRNG_SOURCE_RING_V01: SRNG source ring
58  * @WFDS_SRNG_DESTINATION_RING_V01: SRNG destination ring
59  * @WIFI_DRV_QMI_SRNG_DIRECTION_MAX_VAL_V01: SRNG direction enum max value
60  */
61 enum wifi_drv_qmi_srng_direction_v01 {
62 	WIFI_DRV_QMI_SRNG_DIRECTION_MIN_VAL_V01 = INT_MIN,
63 	WFDS_SRNG_SOURCE_RING_V01 = 0,
64 	WFDS_SRNG_DESTINATION_RING_V01 = 1,
65 	WIFI_DRV_QMI_SRNG_DIRECTION_MAX_VAL_V01 = INT_MAX,
66 };
67 
68 /**
69  * struct wifi_drv_qmi_srng_information_v01 - SRNG information
70  * @ring_id: SRNG ring id
71  * @dir: SRNG direction
72  * @num_entries: number of entries in SRNG
73  * @entry_size: size of SRNG descriptor
74  * @ring_base_paddr: ring base physical address of SRNG
75  * @hp_paddr: HP physical address of SRNG
76  * @tp_paddr: TP physical address of SRNG
77  */
78 struct wifi_drv_qmi_srng_information_v01 {
79 	u8 ring_id;
80 	enum wifi_drv_qmi_srng_direction_v01 dir;
81 	u32 num_entries;
82 	u32 entry_size;
83 	u64 ring_base_paddr;
84 	u64 hp_paddr;
85 	u64 tp_paddr;
86 };
87 
88 /**
89  * enum wifi_drv_qmi_pipe_dir_v01 - pipe direction
90  * @WIFI_DRV_QMI_PIPE_DIR_MIN_VAL_V01: pipe direction enum min value
91  * @WFDS_PIPEDIR_NONE_V01: none pipe direction
92  * @WFDS_PIPEDIR_IN_V01: target to host pipe direction
93  * @WFDS_PIPEDIR_OUT_V01:  host to target pipe direction
94  * @WIFI_DRV_QMI_PIPE_DIR_MAX_VAL_V01: pipe direction enum max value
95  */
96 enum wifi_drv_qmi_pipe_dir_v01 {
97 	WIFI_DRV_QMI_PIPE_DIR_MIN_VAL_V01 = INT_MIN,
98 	WFDS_PIPEDIR_NONE_V01 = 0,
99 	WFDS_PIPEDIR_IN_V01 = 1,
100 	WFDS_PIPEDIR_OUT_V01 = 2,
101 	WIFI_DRV_QMI_PIPE_DIR_MAX_VAL_V01 = INT_MAX,
102 };
103 
104 /**
105  * struct wifi_drv_qmi_ce_information_v01 - CE information
106  * @ce_id: CE id
107  * @ce_dir: CE direction
108  * @srng_info: SRNG information
109  */
110 struct wifi_drv_qmi_ce_information_v01 {
111 	u8 ce_id;
112 	enum wifi_drv_qmi_pipe_dir_v01 ce_dir;
113 	struct wifi_drv_qmi_srng_information_v01 srng_info;
114 };
115 
116 /**
117  * struct wfds_config_req_msg_v01 - WFDS config request message
118  * @ce_info_len: size of ce_info with valid entries
119  * @ce_info: CE information array
120  * @rx_refill_ring: refill SRNG information
121  * @shadow_rdptr_mem_paddr: shadow read memory physical address
122  * @shadow_rdptr_mem_size:  shadow read memory size
123  * @shadow_wrptr_mem_paddr: shadow write memory physical address
124  * @shadow_wrptr_mem_size: shadow write memory size
125  * @rx_pkt_tlv_len: rx packet tlvs length
126  * @rx_rbm: return buffer manager for rx buffers
127  * @pcie_bar_pa: PCIe BAR physical address
128  * @pci_slot: PCIe slot
129  * @lpass_ep_id: LPASS data message service endpoint id
130  */
131 struct wfds_config_req_msg_v01 {
132 	u32 ce_info_len;
133 	struct wifi_drv_qmi_ce_information_v01 ce_info[WFDS_CE_MAX_SRNG_V01];
134 	struct wifi_drv_qmi_srng_information_v01 rx_refill_ring;
135 	u64 shadow_rdptr_mem_paddr;
136 	u64 shadow_rdptr_mem_size;
137 	u64 shadow_wrptr_mem_paddr;
138 	u64 shadow_wrptr_mem_size;
139 	u32 rx_pkt_tlv_len;
140 	u32 rx_rbm;
141 	u64 pcie_bar_pa;
142 	u32 pci_slot;
143 	u32 lpass_ep_id;
144 };
145 
146 #define WFDS_CONFIG_REQ_MSG_V01_MAX_MSG_LEN 253
147 extern struct qmi_elem_info wfds_config_req_msg_v01_ei[];
148 
149 /**
150  * enum wifi_drv_qmi_mem_arenas_v01 - Memory arena
151  * @WIFI_DRV_QMI_MEM_ARENAS_MIN_VAL_V01: memory arena enum min value
152  * @WFDS_MEM_ARENA_TX_BUFFERS_V01: TX buffers memory arena
153  * @WFDS_MEM_ARENA_CE_TX_MSG_BUFFERS_V01: CE TX message buffers memory arena
154  * @WFDS_MEM_ARENA_CE_RX_MSG_BUFFERS_V01: CE RX message buffers memory arena
155  * @WIFI_DRV_QMI_MEM_ARENAS_MAX_VAL_V01: memory arena enum max value
156  */
157 enum wifi_drv_qmi_mem_arenas_v01 {
158 	WIFI_DRV_QMI_MEM_ARENAS_MIN_VAL_V01 = INT_MIN,
159 	WFDS_MEM_ARENA_TX_BUFFERS_V01 = 0,
160 	WFDS_MEM_ARENA_CE_TX_MSG_BUFFERS_V01 = 1,
161 	WFDS_MEM_ARENA_CE_RX_MSG_BUFFERS_V01 = 2,
162 	WIFI_DRV_QMI_MEM_ARENAS_MAX_VAL_V01 = INT_MAX,
163 };
164 
165 /**
166  * struct wifi_drv_qmi_mem_arena_information_v01 - Memory arena information
167  * @entry_size: entry size
168  * @num_entries: total number of entries required
169  */
170 struct wifi_drv_qmi_mem_arena_information_v01 {
171 	u16 entry_size;
172 	u16 num_entries;
173 };
174 
175 /**
176  * struct wfds_mem_ind_msg_v01 - Memory indication message
177  * @mem_arena_info_len: number of valid entries in mem_arena_info array
178  * @mem_arena_info: memory arena information array
179  */
180 struct wfds_mem_ind_msg_v01 {
181 	u32 mem_arena_info_len;
182 	struct wifi_drv_qmi_mem_arena_information_v01 mem_arena_info[WFDS_MEM_ARENA_MAX_V01];
183 };
184 
185 #define WFDS_MEM_IND_MSG_V01_MAX_MSG_LEN 36
186 extern struct qmi_elem_info wfds_mem_ind_msg_v01_ei[];
187 
188 /**
189  * struct wifi_drv_qmi_mem_arena_page_information_v01 - Memory arena
190  *  page information
191  * @num_entries_per_page: number of entries per page
192  * @page_dma_addr_len: number of valid entries in page_dma_addr array
193  * @page_dma_addr: page dma address array
194  */
195 struct wifi_drv_qmi_mem_arena_page_information_v01 {
196 	u16 num_entries_per_page;
197 	u32 page_dma_addr_len;
198 	u64 page_dma_addr[WFDS_PAGE_INFO_MAX_ARRAY_SIZE_V01];
199 };
200 
201 /**
202  * struct wfds_mem_req_msg_v01 - Memory request message
203  *  page information
204  * @mem_arena_page_info_len: number of valid entries in
205  *  mem_arena_page_info array
206  * @mem_arena_page_info: memory arena information
207  */
208 struct wfds_mem_req_msg_v01 {
209 	u32 mem_arena_page_info_len;
210 	struct wifi_drv_qmi_mem_arena_page_information_v01 mem_arena_page_info[WFDS_MEM_ARENA_MAX_V01];
211 };
212 
213 #define WFDS_MEM_REQ_MSG_V01_MAX_MSG_LEN 16348
214 extern struct qmi_elem_info wfds_mem_req_msg_v01_ei[];
215 
216 /**
217  * struct wifi_drv_qmi_ipcc_information_v01 - IPCC information
218  * @ce_id: CE id
219  * @ipcc_trig_addr: IPCC trigger address
220  * @ipcc_trig_data: IPCC trigger data
221  */
222 struct wifi_drv_qmi_ipcc_information_v01 {
223 	u8 ce_id;
224 	u64 ipcc_trig_addr;
225 	u32 ipcc_trig_data;
226 };
227 
228 /**
229  * struct wfds_ipcc_map_n_cfg_ind_msg_v01 - IPCC map and configure
230  *  indication message
231  * @ipcc_ce_info_len: number of valid entries in ipcc_ce_info array
232  * @ipcc_ce_info: IPCC information for CE
233  */
234 struct wfds_ipcc_map_n_cfg_ind_msg_v01 {
235 	u32 ipcc_ce_info_len;
236 	struct wifi_drv_qmi_ipcc_information_v01 ipcc_ce_info[WFDS_CE_MAX_SRNG_V01];
237 };
238 
239 #define WFDS_IPCC_MAP_N_CFG_IND_MSG_V01_MAX_MSG_LEN 43
240 extern struct qmi_elem_info wfds_ipcc_map_n_cfg_ind_msg_v01_ei[];
241 
242 /**
243  * struct wfds_ipcc_map_n_cfg_req_msg_v01 - IPCC map and configure
244  *  request message
245  * @status: IPCC configuration status
246  */
247 struct wfds_ipcc_map_n_cfg_req_msg_v01 {
248 	u8 status;
249 };
250 
251 #define WFDS_IPCC_MAP_N_CFG_REQ_MSG_V01_MAX_MSG_LEN 4
252 extern struct qmi_elem_info wfds_ipcc_map_n_cfg_req_msg_v01_ei[];
253 
254 /**
255  * enum wifi_drv_qmi_event_v01 - driver event
256  * @WIFI_DRV_QMI_EVENT_MIN_VAL_V01: event enum min value
257  * @WFDS_EVENT_WLAN_HOST_RMMOD_V01: host driver rmmod event
258  * @WFDS_EVENT_WLAN_SSR_V01: wlan SSR event
259  * @WFDS_EVENT_LPASS_SSR_V01: LPASS SSR event
260  * @WIFI_DRV_QMI_EVENT_MAX_VAL_V01: event enum max value
261  */
262 enum wifi_drv_qmi_event_v01 {
263 	WIFI_DRV_QMI_EVENT_MIN_VAL_V01 = INT_MIN,
264 	WFDS_EVENT_WLAN_HOST_RMMOD_V01 = 0,
265 	WFDS_EVENT_WLAN_SSR_V01 = 1,
266 	WFDS_EVENT_LPASS_SSR_V01 = 2,
267 	WIFI_DRV_QMI_EVENT_MAX_VAL_V01 = INT_MAX,
268 };
269 
270 /**
271  * struct wfds_misc_req_msg_v01 - Miscellaneous request
272  *  message
273  * @event: driver event
274  */
275 struct wfds_misc_req_msg_v01 {
276 	enum wifi_drv_qmi_event_v01 event;
277 };
278 
279 #define WFDS_MISC_REQ_MSG_V01_MAX_MSG_LEN 7
280 extern struct qmi_elem_info wfds_misc_req_msg_v01_ei[];
281 
282 /**
283  * struct wfds_misc_ind_msg_v01 - Miscellaneous indication
284  *  message
285  * @event: driver event
286  */
287 struct wfds_misc_ind_msg_v01 {
288 	enum wifi_drv_qmi_event_v01 event;
289 };
290 
291 #define WFDS_MISC_IND_MSG_V01_MAX_MSG_LEN 7
292 extern struct qmi_elem_info wfds_misc_ind_msg_v01_ei[];
293 
294 /**
295  * enum wifi_drv_qmi_ut_cmd_v01 - driver event
296  * @WIFI_DRV_QMI_UT_CMD_MIN_VAL_V01: event enum min value
297  * @WFDS_UT_CMD_STOP_V01: Stop WFDS traffic
298  * @WFDS_UT_CMD_START_V01: Start WFDS Traffic
299  * @WFDS_UT_CMD_STATS_V01: Get WFDS traffic stats
300  * @WFDS_UT_CMD_START_WHC_V01: Start WHC Traffic
301  * @WFDS_UT_CMD_START_TSF_SYNC_V01: Start TSF handshake
302  * @WFDS_UT_CMD_MISC_V01: Miscellaneous test
303  * @WIFI_DRV_QMI_UT_CMD_MAX_VAL_V01: event enum max value
304  */
305 enum wifi_drv_qmi_ut_cmd_v01 {
306 	WIFI_DRV_QMI_UT_CMD_MIN_VAL_V01 = INT_MIN,
307 	WFDS_UT_CMD_STOP_V01 = 0,
308 	WFDS_UT_CMD_START_V01 = 1,
309 	WFDS_UT_CMD_STATS_V01 = 2,
310 	WFDS_UT_CMD_START_WHC_V01 = 3,
311 	WFDS_UT_CMD_START_TSF_SYNC_V01 = 4,
312 	WFDS_UT_CMD_MISC_V01 = 5,
313 	WIFI_DRV_QMI_UT_CMD_MAX_VAL_V01 = INT_MAX,
314 };
315 
316 /**
317  * struct wfds_ut_cmd_req_msg_v01 - WFDS QMI UT cmd info structure
318  * @cmd: Command type
319  * @duration: Traffic duration
320  * @flush_period: Buffer flushing periodicity
321  * @num_pkts: Number of packets per flush
322  * @buf_size: Buffer size
323  * @ether_type: ether_type of packet
324  * @src_mac: Source MAC address
325  * @dest_mac: Destination MAC address
326  * @ip_ver: IP address version
327  * @src_ip_addr: source IP address
328  * @dest_ip_addr: Destination IP address
329  * @dest_port: Destination port
330  * @misc: Misc input data
331  */
332 struct wfds_ut_cmd_req_msg_v01 {
333 	enum wifi_drv_qmi_ut_cmd_v01 cmd;
334 	u32 duration;
335 	u32 flush_period;
336 	u32 num_pkts;
337 	u32 buf_size;
338 	u16 ether_type;
339 	u8 src_mac[6];
340 	u8 dest_mac[6];
341 	u8 ip_ver;
342 	u8 src_ip_addr[16];
343 	u8 dest_ip_addr[16];
344 	u16 dest_port;
345 	u8 misc[256];
346 };
347 
348 #define WFDS_UT_CMD_REQ_MSG_V01_MAX_MSG_LEN 364
349 extern struct qmi_elem_info wfds_ut_cmd_req_msg_v01_ei[];
350 
351 #endif
352