1 2 /* 3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 21 22 23 24 25 26 27 #ifndef _EHT_SIG_USR_SU_INFO_H_ 28 #define _EHT_SIG_USR_SU_INFO_H_ 29 #if !defined(__ASSEMBLER__) 30 #endif 31 32 #define NUM_OF_DWORDS_EHT_SIG_USR_SU_INFO 1 33 34 35 struct eht_sig_usr_su_info { 36 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 37 uint32_t sta_id : 11, // [10:0] 38 sta_mcs : 4, // [14:11] 39 validate_0a : 1, // [15:15] 40 nss : 4, // [19:16] 41 txbf : 1, // [20:20] 42 sta_coding : 1, // [21:21] 43 reserved_0b : 9, // [30:22] 44 rx_integrity_check_passed : 1; // [31:31] 45 #else 46 uint32_t rx_integrity_check_passed : 1, // [31:31] 47 reserved_0b : 9, // [30:22] 48 sta_coding : 1, // [21:21] 49 txbf : 1, // [20:20] 50 nss : 4, // [19:16] 51 validate_0a : 1, // [15:15] 52 sta_mcs : 4, // [14:11] 53 sta_id : 11; // [10:0] 54 #endif 55 }; 56 57 58 59 60 #define EHT_SIG_USR_SU_INFO_STA_ID_OFFSET 0x00000000 61 #define EHT_SIG_USR_SU_INFO_STA_ID_LSB 0 62 #define EHT_SIG_USR_SU_INFO_STA_ID_MSB 10 63 #define EHT_SIG_USR_SU_INFO_STA_ID_MASK 0x000007ff 64 65 66 67 68 #define EHT_SIG_USR_SU_INFO_STA_MCS_OFFSET 0x00000000 69 #define EHT_SIG_USR_SU_INFO_STA_MCS_LSB 11 70 #define EHT_SIG_USR_SU_INFO_STA_MCS_MSB 14 71 #define EHT_SIG_USR_SU_INFO_STA_MCS_MASK 0x00007800 72 73 74 75 76 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_OFFSET 0x00000000 77 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_LSB 15 78 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MSB 15 79 #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MASK 0x00008000 80 81 82 83 84 #define EHT_SIG_USR_SU_INFO_NSS_OFFSET 0x00000000 85 #define EHT_SIG_USR_SU_INFO_NSS_LSB 16 86 #define EHT_SIG_USR_SU_INFO_NSS_MSB 19 87 #define EHT_SIG_USR_SU_INFO_NSS_MASK 0x000f0000 88 89 90 91 92 #define EHT_SIG_USR_SU_INFO_TXBF_OFFSET 0x00000000 93 #define EHT_SIG_USR_SU_INFO_TXBF_LSB 20 94 #define EHT_SIG_USR_SU_INFO_TXBF_MSB 20 95 #define EHT_SIG_USR_SU_INFO_TXBF_MASK 0x00100000 96 97 98 99 100 #define EHT_SIG_USR_SU_INFO_STA_CODING_OFFSET 0x00000000 101 #define EHT_SIG_USR_SU_INFO_STA_CODING_LSB 21 102 #define EHT_SIG_USR_SU_INFO_STA_CODING_MSB 21 103 #define EHT_SIG_USR_SU_INFO_STA_CODING_MASK 0x00200000 104 105 106 107 108 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_OFFSET 0x00000000 109 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_LSB 22 110 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MSB 30 111 #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MASK 0x7fc00000 112 113 114 115 116 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000 117 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31 118 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31 119 #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000 120 121 122 123 124 #endif 125