1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _RX_MPDU_DETAILS_H_ 24 #define _RX_MPDU_DETAILS_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "buffer_addr_info.h" 29 #include "rx_mpdu_desc_info.h" 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0-1 struct buffer_addr_info msdu_link_desc_addr_info; 35 // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 36 // 37 // ################ END SUMMARY ################# 38 39 #define NUM_OF_DWORDS_RX_MPDU_DETAILS 4 40 41 struct rx_mpdu_details { 42 struct buffer_addr_info msdu_link_desc_addr_info; 43 struct rx_mpdu_desc_info rx_mpdu_desc_info_details; 44 }; 45 46 /* 47 48 struct buffer_addr_info msdu_link_desc_addr_info 49 50 Consumer: REO/SW/FW 51 52 Producer: RXDMA 53 54 55 56 Details of the physical address of the MSDU link 57 descriptor that contains pointers to MSDUs related to this 58 MPDU 59 60 struct rx_mpdu_desc_info rx_mpdu_desc_info_details 61 62 Consumer: REO/SW/FW 63 64 Producer: RXDMA 65 66 67 68 General information related to the MPDU that should be 69 */ 70 71 72 /* EXTERNAL REFERENCE : struct buffer_addr_info msdu_link_desc_addr_info */ 73 74 75 /* Description RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0 76 77 Address (lower 32 bits) of the MSDU buffer OR 78 MSDU_EXTENSION descriptor OR Link Descriptor 79 80 81 82 In case of 'NULL' pointer, this field is set to 0 83 84 <legal all> 85 */ 86 #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000 87 #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0 88 #define RX_MPDU_DETAILS_0_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff 89 90 /* Description RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32 91 92 Address (upper 8 bits) of the MSDU buffer OR 93 MSDU_EXTENSION descriptor OR Link Descriptor 94 95 96 97 In case of 'NULL' pointer, this field is set to 0 98 99 <legal all> 100 */ 101 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004 102 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0 103 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff 104 105 /* Description RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER 106 107 Consumer: WBM 108 109 Producer: SW/FW 110 111 112 113 In case of 'NULL' pointer, this field is set to 0 114 115 116 117 Indicates to which buffer manager the buffer OR 118 MSDU_EXTENSION descriptor OR link descriptor that is being 119 pointed to shall be returned after the frame has been 120 processed. It is used by WBM for routing purposes. 121 122 123 124 <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned 125 to the WMB buffer idle list 126 127 <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be 128 returned to the WMB idle link descriptor idle list 129 130 <enum 2 FW_BM> This buffer shall be returned to the FW 131 132 <enum 3 SW0_BM> This buffer shall be returned to the SW, 133 ring 0 134 135 <enum 4 SW1_BM> This buffer shall be returned to the SW, 136 ring 1 137 138 <enum 5 SW2_BM> This buffer shall be returned to the SW, 139 ring 2 140 141 <enum 6 SW3_BM> This buffer shall be returned to the SW, 142 ring 3 143 144 <enum 7 SW4_BM> This buffer shall be returned to the SW, 145 ring 3 146 147 148 149 <legal all> 150 */ 151 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004 152 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8 153 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700 154 155 /* Description RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE 156 157 Cookie field exclusively used by SW. 158 159 160 161 In case of 'NULL' pointer, this field is set to 0 162 163 164 165 HW ignores the contents, accept that it passes the 166 programmed value on to other descriptors together with the 167 physical address 168 169 170 171 Field can be used by SW to for example associate the 172 buffers physical address with the virtual address 173 174 The bit definitions as used by SW are within SW HLD 175 specification 176 177 178 179 NOTE: 180 181 The three most significant bits can have a special 182 meaning in case this struct is embedded in a TX_MPDU_DETAILS 183 STRUCT, and field transmit_bw_restriction is set 184 185 186 187 In case of NON punctured transmission: 188 189 Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only 190 191 Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only 192 193 Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only 194 195 Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only 196 197 198 199 In case of punctured transmission: 200 201 Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only 202 203 Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only 204 205 Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only 206 207 Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only 208 209 Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only 210 211 Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only 212 213 Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only 214 215 Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only 216 217 218 219 Note: a punctured transmission is indicated by the 220 presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler 221 TLV 222 223 224 225 <legal all> 226 */ 227 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004 228 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11 229 #define RX_MPDU_DETAILS_1_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800 230 231 /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */ 232 233 234 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT 235 236 Consumer: REO/SW/FW 237 238 Producer: RXDMA 239 240 241 242 The number of MSDUs within the MPDU 243 244 <legal all> 245 */ 246 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008 247 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0 248 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff 249 250 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER 251 252 Consumer: REO/SW/FW 253 254 Producer: RXDMA 255 256 257 258 The field can have two different meanings based on the 259 setting of field 'BAR_frame': 260 261 262 263 'BAR_frame' is NOT set: 264 265 The MPDU sequence number of the received frame. 266 267 268 269 'BAR_frame' is set. 270 271 The MPDU Start sequence number from the BAR frame 272 273 <legal all> 274 */ 275 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008 276 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8 277 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00 278 279 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG 280 281 Consumer: REO/SW/FW 282 283 Producer: RXDMA 284 285 286 287 When set, this MPDU is a fragment and REO should forward 288 this fragment MPDU to the REO destination ring without any 289 reorder checks, pn checks or bitmap update. This implies 290 that REO is forwarding the pointer to the MSDU link 291 descriptor. The destination ring is coming from a 292 programmable register setting in REO 293 294 295 296 <legal all> 297 */ 298 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008 299 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20 300 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000 301 302 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT 303 304 Consumer: REO/SW/FW 305 306 Producer: RXDMA 307 308 309 310 The retry bit setting from the MPDU header of the 311 received frame 312 313 <legal all> 314 */ 315 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008 316 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21 317 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000 318 319 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG 320 321 Consumer: REO/SW/FW 322 323 Producer: RXDMA 324 325 326 327 When set, the MPDU was received as part of an A-MPDU. 328 329 <legal all> 330 */ 331 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008 332 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22 333 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000 334 335 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME 336 337 Consumer: REO/SW/FW 338 339 Producer: RXDMA 340 341 342 343 When set, the received frame is a BAR frame. After 344 processing, this frame shall be pushed to SW or deleted. 345 346 <legal all> 347 */ 348 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008 349 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23 350 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000 351 352 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO 353 354 Consumer: REO/SW/FW 355 356 Producer: RXDMA 357 358 359 360 Copied here by RXDMA from RX_MPDU_END 361 362 When not set, REO will Not perform a PN sequence number 363 check 364 */ 365 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008 366 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24 367 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000 368 369 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID 370 371 When set, OLE found a valid SA entry for all MSDUs in 372 this MPDU 373 374 <legal all> 375 */ 376 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008 377 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25 378 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000 379 380 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT 381 382 When set, at least 1 MSDU within the MPDU has an 383 unsuccessful MAC source address search due to the expiration 384 of the search timer. 385 386 <legal all> 387 */ 388 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008 389 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26 390 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000 391 392 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID 393 394 When set, OLE found a valid DA entry for all MSDUs in 395 this MPDU 396 397 <legal all> 398 */ 399 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008 400 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27 401 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000 402 403 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC 404 405 Field Only valid if da_is_valid is set 406 407 408 409 When set, at least one of the DA addresses is a 410 Multicast or Broadcast address. 411 412 <legal all> 413 */ 414 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008 415 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28 416 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000 417 418 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT 419 420 When set, at least 1 MSDU within the MPDU has an 421 unsuccessful MAC destination address search due to the 422 expiration of the search timer. 423 424 <legal all> 425 */ 426 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008 427 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29 428 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000 429 430 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU 431 432 Field only valid when first_msdu_in_mpdu_flag is set. 433 434 435 436 When set, the contents in the MSDU buffer contains a 437 'RAW' MPDU. This 'RAW' MPDU might be spread out over 438 multiple MSDU buffers. 439 440 <legal all> 441 */ 442 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008 443 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30 444 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000 445 446 /* Description RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG 447 448 The More Fragment bit setting from the MPDU header of 449 the received frame 450 451 452 453 <legal all> 454 */ 455 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008 456 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31 457 #define RX_MPDU_DETAILS_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000 458 459 /* Description RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA 460 461 Meta data that SW has programmed in the Peer table entry 462 of the transmitting STA. 463 464 <legal all> 465 */ 466 #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c 467 #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0 468 #define RX_MPDU_DETAILS_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff 469 470 471 #endif // _RX_MPDU_DETAILS_H_ 472