1  /*
2   * Copyright (c) 2020, The Linux Foundation. All rights reserved.
3   *
4   * Permission to use, copy, modify, and/or distribute this software for any
5   * purpose with or without fee is hereby granted, provided that the above
6   * copyright notice and this permission notice appear in all copies.
7   *
8   * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9   * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10   * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11   * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12   * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13   * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15   */
16  
17  #ifndef _RX_ATTENTION_H_
18  #define _RX_ATTENTION_H_
19  #if !defined(__ASSEMBLER__)
20  #endif
21  
22  
23  // ################ START SUMMARY #################
24  //
25  //	Dword	Fields
26  //	0	rxpcu_mpdu_filter_in_category[1:0], sw_frame_group_id[8:2], reserved_0[15:9], phy_ppdu_id[31:16]
27  //	1	first_mpdu[0], reserved_1a[1], mcast_bcast[2], ast_index_not_found[3], ast_index_timeout[4], power_mgmt[5], non_qos[6], null_data[7], mgmt_type[8], ctrl_type[9], more_data[10], eosp[11], a_msdu_error[12], fragment_flag[13], order[14], cce_match[15], overflow_err[16], msdu_length_err[17], tcp_udp_chksum_fail[18], ip_chksum_fail[19], sa_idx_invalid[20], da_idx_invalid[21], reserved_1b[22], rx_in_tx_decrypt_byp[23], encrypt_required[24], directed[25], buffer_fragment[26], mpdu_length_err[27], tkip_mic_err[28], decrypt_err[29], unencrypted_frame_err[30], fcs_err[31]
28  //	2	flow_idx_timeout[0], flow_idx_invalid[1], wifi_parser_error[2], amsdu_parser_error[3], sa_idx_timeout[4], da_idx_timeout[5], msdu_limit_error[6], da_is_valid[7], da_is_mcbc[8], sa_is_valid[9], decrypt_status_code[12:10], rx_bitmap_not_updated[13], reserved_2[30:14], msdu_done[31]
29  //
30  // ################ END SUMMARY #################
31  
32  #define NUM_OF_DWORDS_RX_ATTENTION 3
33  
34  struct rx_attention {
35               uint32_t rxpcu_mpdu_filter_in_category   :  2, //[1:0]
36                        sw_frame_group_id               :  7, //[8:2]
37                        reserved_0                      :  7, //[15:9]
38                        phy_ppdu_id                     : 16; //[31:16]
39               uint32_t first_mpdu                      :  1, //[0]
40                        reserved_1a                     :  1, //[1]
41                        mcast_bcast                     :  1, //[2]
42                        ast_index_not_found             :  1, //[3]
43                        ast_index_timeout               :  1, //[4]
44                        power_mgmt                      :  1, //[5]
45                        non_qos                         :  1, //[6]
46                        null_data                       :  1, //[7]
47                        mgmt_type                       :  1, //[8]
48                        ctrl_type                       :  1, //[9]
49                        more_data                       :  1, //[10]
50                        eosp                            :  1, //[11]
51                        a_msdu_error                    :  1, //[12]
52                        fragment_flag                   :  1, //[13]
53                        order                           :  1, //[14]
54                        cce_match                       :  1, //[15]
55                        overflow_err                    :  1, //[16]
56                        msdu_length_err                 :  1, //[17]
57                        tcp_udp_chksum_fail             :  1, //[18]
58                        ip_chksum_fail                  :  1, //[19]
59                        sa_idx_invalid                  :  1, //[20]
60                        da_idx_invalid                  :  1, //[21]
61                        reserved_1b                     :  1, //[22]
62                        rx_in_tx_decrypt_byp            :  1, //[23]
63                        encrypt_required                :  1, //[24]
64                        directed                        :  1, //[25]
65                        buffer_fragment                 :  1, //[26]
66                        mpdu_length_err                 :  1, //[27]
67                        tkip_mic_err                    :  1, //[28]
68                        decrypt_err                     :  1, //[29]
69                        unencrypted_frame_err           :  1, //[30]
70                        fcs_err                         :  1; //[31]
71               uint32_t flow_idx_timeout                :  1, //[0]
72                        flow_idx_invalid                :  1, //[1]
73                        wifi_parser_error               :  1, //[2]
74                        amsdu_parser_error              :  1, //[3]
75                        sa_idx_timeout                  :  1, //[4]
76                        da_idx_timeout                  :  1, //[5]
77                        msdu_limit_error                :  1, //[6]
78                        da_is_valid                     :  1, //[7]
79                        da_is_mcbc                      :  1, //[8]
80                        sa_is_valid                     :  1, //[9]
81                        decrypt_status_code             :  3, //[12:10]
82                        rx_bitmap_not_updated           :  1, //[13]
83                        reserved_2                      : 17, //[30:14]
84                        msdu_done                       :  1; //[31]
85  };
86  
87  /*
88  
89  rxpcu_mpdu_filter_in_category
90  
91  			Field indicates what the reason was that this MPDU frame
92  			was allowed to come into the receive path by RXPCU
93  
94  			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
95  			frame filter programming of rxpcu
96  
97  			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
98  			regular frame filter and would have been dropped, were it
99  			not for the frame fitting into the 'monitor_client'
100  			category.
101  
102  			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
103  			regular frame filter and also did not pass the
104  			rxpcu_monitor_client filter. It would have been dropped
105  			accept that it did pass the 'monitor_other' category.
106  
107  			<legal 0-2>
108  
109  sw_frame_group_id
110  
111  			SW processes frames based on certain classifications.
112  			This field indicates to what sw classification this MPDU is
113  			mapped.
114  
115  			The classification is given in priority order
116  
117  
118  
119  			<enum 0 sw_frame_group_NDP_frame>
120  
121  
122  
123  			<enum 1 sw_frame_group_Multicast_data>
124  
125  			<enum 2 sw_frame_group_Unicast_data>
126  
127  			<enum 3 sw_frame_group_Null_data > This includes mpdus
128  			of type Data Null as well as QoS Data Null
129  
130  
131  
132  			<enum 4 sw_frame_group_mgmt_0000 >
133  
134  			<enum 5 sw_frame_group_mgmt_0001 >
135  
136  			<enum 6 sw_frame_group_mgmt_0010 >
137  
138  			<enum 7 sw_frame_group_mgmt_0011 >
139  
140  			<enum 8 sw_frame_group_mgmt_0100 >
141  
142  			<enum 9 sw_frame_group_mgmt_0101 >
143  
144  			<enum 10 sw_frame_group_mgmt_0110 >
145  
146  			<enum 11 sw_frame_group_mgmt_0111 >
147  
148  			<enum 12 sw_frame_group_mgmt_1000 >
149  
150  			<enum 13 sw_frame_group_mgmt_1001 >
151  
152  			<enum 14 sw_frame_group_mgmt_1010 >
153  
154  			<enum 15 sw_frame_group_mgmt_1011 >
155  
156  			<enum 16 sw_frame_group_mgmt_1100 >
157  
158  			<enum 17 sw_frame_group_mgmt_1101 >
159  
160  			<enum 18 sw_frame_group_mgmt_1110 >
161  
162  			<enum 19 sw_frame_group_mgmt_1111 >
163  
164  
165  
166  			<enum 20 sw_frame_group_ctrl_0000 >
167  
168  			<enum 21 sw_frame_group_ctrl_0001 >
169  
170  			<enum 22 sw_frame_group_ctrl_0010 >
171  
172  			<enum 23 sw_frame_group_ctrl_0011 >
173  
174  			<enum 24 sw_frame_group_ctrl_0100 >
175  
176  			<enum 25 sw_frame_group_ctrl_0101 >
177  
178  			<enum 26 sw_frame_group_ctrl_0110 >
179  
180  			<enum 27 sw_frame_group_ctrl_0111 >
181  
182  			<enum 28 sw_frame_group_ctrl_1000 >
183  
184  			<enum 29 sw_frame_group_ctrl_1001 >
185  
186  			<enum 30 sw_frame_group_ctrl_1010 >
187  
188  			<enum 31 sw_frame_group_ctrl_1011 >
189  
190  			<enum 32 sw_frame_group_ctrl_1100 >
191  
192  			<enum 33 sw_frame_group_ctrl_1101 >
193  
194  			<enum 34 sw_frame_group_ctrl_1110 >
195  
196  			<enum 35 sw_frame_group_ctrl_1111 >
197  
198  
199  
200  			<enum 36 sw_frame_group_unsupported> This covers type 3
201  			and protocol version != 0
202  
203  
204  
205  
206  
207  
208  			<legal 0-37>
209  
210  reserved_0
211  
212  			<legal 0>
213  
214  phy_ppdu_id
215  
216  			A ppdu counter value that PHY increments for every PPDU
217  			received. The counter value wraps around
218  
219  			<legal all>
220  
221  first_mpdu
222  
223  			Indicates the first MSDU of the PPDU.  If both
224  			first_mpdu and last_mpdu are set in the MSDU then this is a
225  			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
226  			in an A-MPDU shall have both first_mpdu and last_mpdu bits
227  			set to 0.  The PPDU start status will only be valid when
228  			this bit is set.
229  
230  reserved_1a
231  
232  			<legal 0>
233  
234  mcast_bcast
235  
236  			Multicast / broadcast indicator.  Only set when the MAC
237  			address 1 bit 0 is set indicating mcast/bcast and the BSSID
238  			matches one of the 4 BSSID registers. Only set when
239  			first_msdu is set.
240  
241  ast_index_not_found
242  
243  			Only valid when first_msdu is set.
244  
245  
246  
247  			Indicates no AST matching entries within the the max
248  			search count.
249  
250  ast_index_timeout
251  
252  			Only valid when first_msdu is set.
253  
254  
255  
256  			Indicates an unsuccessful search in the address seach
257  			table due to timeout.
258  
259  power_mgmt
260  
261  			Power management bit set in the 802.11 header.  Only set
262  			when first_msdu is set.
263  
264  non_qos
265  
266  			Set if packet is not a non-QoS data frame.  Only set
267  			when first_msdu is set.
268  
269  null_data
270  
271  			Set if frame type indicates either null data or QoS null
272  			data format.  Only set when first_msdu is set.
273  
274  mgmt_type
275  
276  			Set if packet is a management packet.  Only set when
277  			first_msdu is set.
278  
279  ctrl_type
280  
281  			Set if packet is a control packet.  Only set when
282  			first_msdu is set.
283  
284  more_data
285  
286  			Set if more bit in frame control is set.  Only set when
287  			first_msdu is set.
288  
289  eosp
290  
291  			Set if the EOSP (end of service period) bit in the QoS
292  			control field is set.  Only set when first_msdu is set.
293  
294  a_msdu_error
295  
296  			Set if number of MSDUs in A-MSDU is above a threshold or
297  			if the size of the MSDU is invalid.  This receive buffer
298  			will contain all of the remainder of the MSDUs in this MPDU
299  			without decapsulation.
300  
301  fragment_flag
302  
303  			Indicates that this is an 802.11 fragment frame.  This
304  			is set when either the more_frag bit is set in the frame
305  			control or the fragment number is not zero.  Only set when
306  			first_msdu is set.
307  
308  order
309  
310  			Set if the order bit in the frame control is set.  Only
311  			set when first_msdu is set.
312  
313  cce_match
314  
315  			Indicates that this status has a corresponding MSDU that
316  			requires FW processing.  The OLE will have classification
317  			ring mask registers which will indicate the ring(s) for
318  			packets and descriptors which need FW attention.
319  
320  overflow_err
321  
322  			RXPCU Receive FIFO ran out of space to receive the full
323  			MPDU. Therefor this MPDU is terminated early and is thus
324  			corrupted.
325  
326  
327  
328  			This MPDU will not be ACKed.
329  
330  			RXPCU might still be able to correctly receive the
331  			following MPDUs in the PPDU if enough fifo space became
332  			available in time
333  
334  msdu_length_err
335  
336  			Indicates that the MSDU length from the 802.3
337  			encapsulated length field extends beyond the MPDU boundary
338  			or if the length is less than 14 bytes.
339  
340  			Merged with original other_msdu_err: Indicates that the
341  			MSDU threshold was exceeded and thus all the rest of the
342  			MSDUs will not be scattered and will not be decasulated but
343  			will be DMA'ed in RAW format as a single MSDU buffer
344  
345  tcp_udp_chksum_fail
346  
347  			Indicates that the computed checksum (tcp_udp_chksum in
348  			'RX_MSDU_END') did not match the checksum in the TCP/UDP
349  			header.
350  
351  ip_chksum_fail
352  
353  			Indicates that the computed checksum (ip_hdr_chksum in
354  			'RX_MSDU_END') did not match the checksum in the IP header.
355  
356  sa_idx_invalid
357  
358  			Indicates no matching entry was found in the address
359  			search table for the source MAC address.
360  
361  da_idx_invalid
362  
363  			Indicates no matching entry was found in the address
364  			search table for the destination MAC address.
365  
366  reserved_1b
367  
368  			<legal 0>
369  
370  rx_in_tx_decrypt_byp
371  
372  			Indicates that RX packet is not decrypted as Crypto is
373  			busy with TX packet processing.
374  
375  encrypt_required
376  
377  			Indicates that this data type frame is not encrypted
378  			even if the policy for this MPDU requires encryption as
379  			indicated in the peer entry key type.
380  
381  directed
382  
383  			MPDU is a directed packet which means that the RA
384  			matched our STA addresses.  In proxySTA it means that the TA
385  			matched an entry in our address search table with the
386  			corresponding no_ack bit is the address search entry
387  			cleared.
388  
389  buffer_fragment
390  
391  			Indicates that at least one of the rx buffers has been
392  			fragmented.  If set the FW should look at the rx_frag_info
393  			descriptor described below.
394  
395  mpdu_length_err
396  
397  			Indicates that the MPDU was pre-maturely terminated
398  			resulting in a truncated MPDU.  Don't trust the MPDU length
399  			field.
400  
401  tkip_mic_err
402  
403  			Indicates that the MPDU Michael integrity check failed
404  
405  decrypt_err
406  
407  			Indicates that the MPDU decrypt integrity check failed
408  			or CRYPTO received an encrypted frame, but did not get a
409  			valid corresponding key id in the peer entry.
410  
411  unencrypted_frame_err
412  
413  			Copied here by RX OLE from the RX_MPDU_END TLV
414  
415  fcs_err
416  
417  			Indicates that the MPDU FCS check failed
418  
419  flow_idx_timeout
420  
421  			Indicates an unsuccessful flow search due to the
422  			expiring of the search timer.
423  
424  			<legal all>
425  
426  flow_idx_invalid
427  
428  			flow id is not valid
429  
430  			<legal all>
431  
432  wifi_parser_error
433  
434  			Indicates that the WiFi frame has one of the following
435  			errors
436  
437  			o has less than minimum allowed bytes as per standard
438  
439  			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
440  
441  			<legal all>
442  
443  amsdu_parser_error
444  
445  			A-MSDU could not be properly de-agregated.
446  
447  			<legal all>
448  
449  sa_idx_timeout
450  
451  			Indicates an unsuccessful MAC source address search due
452  			to the expiring of the search timer.
453  
454  da_idx_timeout
455  
456  			Indicates an unsuccessful MAC destination address search
457  			due to the expiring of the search timer.
458  
459  msdu_limit_error
460  
461  			Indicates that the MSDU threshold was exceeded and thus
462  			all the rest of the MSDUs will not be scattered and will not
463  			be decasulated but will be DMA'ed in RAW format as a single
464  			MSDU buffer
465  
466  da_is_valid
467  
468  			Indicates that OLE found a valid DA entry
469  
470  da_is_mcbc
471  
472  			Field Only valid if da_is_valid is set
473  
474  
475  
476  			Indicates the DA address was a Multicast of Broadcast
477  			address.
478  
479  sa_is_valid
480  
481  			Indicates that OLE found a valid SA entry
482  
483  decrypt_status_code
484  
485  			Field provides insight into the decryption performed
486  
487  
488  
489  			<enum 0 decrypt_ok> Frame had protection enabled and
490  			decrypted properly
491  
492  			<enum 1 decrypt_unprotected_frame > Frame is unprotected
493  			and hence bypassed
494  
495  			<enum 2 decrypt_data_err > Frame has protection enabled
496  			and could not be properly decrypted due to MIC/ICV mismatch
497  			etc.
498  
499  			<enum 3 decrypt_key_invalid > Frame has protection
500  			enabled but the key that was required to decrypt this frame
501  			was not valid
502  
503  			<enum 4 decrypt_peer_entry_invalid > Frame has
504  			protection enabled but the key that was required to decrypt
505  			this frame was not valid
506  
507  			<enum 5 decrypt_other > Reserved for other indications
508  
509  
510  
511  			<legal 0 - 5>
512  
513  rx_bitmap_not_updated
514  
515  			Frame is received, but RXPCU could not update the
516  			receive bitmap due to (temporary) fifo contraints.
517  
518  			<legal all>
519  
520  reserved_2
521  
522  			<legal 0>
523  
524  msdu_done
525  
526  			If set indicates that the RX packet data, RX header
527  			data, RX PPDU start descriptor, RX MPDU start/end
528  			descriptor, RX MSDU start/end descriptors and RX Attention
529  			descriptor are all valid.  This bit must be in the last
530  			octet of the descriptor.
531  */
532  
533  
534  /* Description		RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY
535  
536  			Field indicates what the reason was that this MPDU frame
537  			was allowed to come into the receive path by RXPCU
538  
539  			<enum 0 rxpcu_filter_pass> This MPDU passed the normal
540  			frame filter programming of rxpcu
541  
542  			<enum 1 rxpcu_monitor_client> This MPDU did NOT pass the
543  			regular frame filter and would have been dropped, were it
544  			not for the frame fitting into the 'monitor_client'
545  			category.
546  
547  			<enum 2 rxpcu_monitor_other> This MPDU did NOT pass the
548  			regular frame filter and also did not pass the
549  			rxpcu_monitor_client filter. It would have been dropped
550  			accept that it did pass the 'monitor_other' category.
551  
552  			<legal 0-2>
553  */
554  #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET          0x00000000
555  #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB             0
556  #define RX_ATTENTION_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK            0x00000003
557  
558  /* Description		RX_ATTENTION_0_SW_FRAME_GROUP_ID
559  
560  			SW processes frames based on certain classifications.
561  			This field indicates to what sw classification this MPDU is
562  			mapped.
563  
564  			The classification is given in priority order
565  
566  
567  
568  			<enum 0 sw_frame_group_NDP_frame>
569  
570  
571  
572  			<enum 1 sw_frame_group_Multicast_data>
573  
574  			<enum 2 sw_frame_group_Unicast_data>
575  
576  			<enum 3 sw_frame_group_Null_data > This includes mpdus
577  			of type Data Null as well as QoS Data Null
578  
579  
580  
581  			<enum 4 sw_frame_group_mgmt_0000 >
582  
583  			<enum 5 sw_frame_group_mgmt_0001 >
584  
585  			<enum 6 sw_frame_group_mgmt_0010 >
586  
587  			<enum 7 sw_frame_group_mgmt_0011 >
588  
589  			<enum 8 sw_frame_group_mgmt_0100 >
590  
591  			<enum 9 sw_frame_group_mgmt_0101 >
592  
593  			<enum 10 sw_frame_group_mgmt_0110 >
594  
595  			<enum 11 sw_frame_group_mgmt_0111 >
596  
597  			<enum 12 sw_frame_group_mgmt_1000 >
598  
599  			<enum 13 sw_frame_group_mgmt_1001 >
600  
601  			<enum 14 sw_frame_group_mgmt_1010 >
602  
603  			<enum 15 sw_frame_group_mgmt_1011 >
604  
605  			<enum 16 sw_frame_group_mgmt_1100 >
606  
607  			<enum 17 sw_frame_group_mgmt_1101 >
608  
609  			<enum 18 sw_frame_group_mgmt_1110 >
610  
611  			<enum 19 sw_frame_group_mgmt_1111 >
612  
613  
614  
615  			<enum 20 sw_frame_group_ctrl_0000 >
616  
617  			<enum 21 sw_frame_group_ctrl_0001 >
618  
619  			<enum 22 sw_frame_group_ctrl_0010 >
620  
621  			<enum 23 sw_frame_group_ctrl_0011 >
622  
623  			<enum 24 sw_frame_group_ctrl_0100 >
624  
625  			<enum 25 sw_frame_group_ctrl_0101 >
626  
627  			<enum 26 sw_frame_group_ctrl_0110 >
628  
629  			<enum 27 sw_frame_group_ctrl_0111 >
630  
631  			<enum 28 sw_frame_group_ctrl_1000 >
632  
633  			<enum 29 sw_frame_group_ctrl_1001 >
634  
635  			<enum 30 sw_frame_group_ctrl_1010 >
636  
637  			<enum 31 sw_frame_group_ctrl_1011 >
638  
639  			<enum 32 sw_frame_group_ctrl_1100 >
640  
641  			<enum 33 sw_frame_group_ctrl_1101 >
642  
643  			<enum 34 sw_frame_group_ctrl_1110 >
644  
645  			<enum 35 sw_frame_group_ctrl_1111 >
646  
647  
648  
649  			<enum 36 sw_frame_group_unsupported> This covers type 3
650  			and protocol version != 0
651  
652  
653  
654  
655  
656  
657  			<legal 0-37>
658  */
659  #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_OFFSET                      0x00000000
660  #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_LSB                         2
661  #define RX_ATTENTION_0_SW_FRAME_GROUP_ID_MASK                        0x000001fc
662  
663  /* Description		RX_ATTENTION_0_RESERVED_0
664  
665  			<legal 0>
666  */
667  #define RX_ATTENTION_0_RESERVED_0_OFFSET                             0x00000000
668  #define RX_ATTENTION_0_RESERVED_0_LSB                                9
669  #define RX_ATTENTION_0_RESERVED_0_MASK                               0x0000fe00
670  
671  /* Description		RX_ATTENTION_0_PHY_PPDU_ID
672  
673  			A ppdu counter value that PHY increments for every PPDU
674  			received. The counter value wraps around
675  
676  			<legal all>
677  */
678  #define RX_ATTENTION_0_PHY_PPDU_ID_OFFSET                            0x00000000
679  #define RX_ATTENTION_0_PHY_PPDU_ID_LSB                               16
680  #define RX_ATTENTION_0_PHY_PPDU_ID_MASK                              0xffff0000
681  
682  /* Description		RX_ATTENTION_1_FIRST_MPDU
683  
684  			Indicates the first MSDU of the PPDU.  If both
685  			first_mpdu and last_mpdu are set in the MSDU then this is a
686  			not an A-MPDU frame but a stand alone MPDU.  Interior MPDU
687  			in an A-MPDU shall have both first_mpdu and last_mpdu bits
688  			set to 0.  The PPDU start status will only be valid when
689  			this bit is set.
690  */
691  #define RX_ATTENTION_1_FIRST_MPDU_OFFSET                             0x00000004
692  #define RX_ATTENTION_1_FIRST_MPDU_LSB                                0
693  #define RX_ATTENTION_1_FIRST_MPDU_MASK                               0x00000001
694  
695  /* Description		RX_ATTENTION_1_RESERVED_1A
696  
697  			<legal 0>
698  */
699  #define RX_ATTENTION_1_RESERVED_1A_OFFSET                            0x00000004
700  #define RX_ATTENTION_1_RESERVED_1A_LSB                               1
701  #define RX_ATTENTION_1_RESERVED_1A_MASK                              0x00000002
702  
703  /* Description		RX_ATTENTION_1_MCAST_BCAST
704  
705  			Multicast / broadcast indicator.  Only set when the MAC
706  			address 1 bit 0 is set indicating mcast/bcast and the BSSID
707  			matches one of the 4 BSSID registers. Only set when
708  			first_msdu is set.
709  */
710  #define RX_ATTENTION_1_MCAST_BCAST_OFFSET                            0x00000004
711  #define RX_ATTENTION_1_MCAST_BCAST_LSB                               2
712  #define RX_ATTENTION_1_MCAST_BCAST_MASK                              0x00000004
713  
714  /* Description		RX_ATTENTION_1_AST_INDEX_NOT_FOUND
715  
716  			Only valid when first_msdu is set.
717  
718  
719  
720  			Indicates no AST matching entries within the the max
721  			search count.
722  */
723  #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_OFFSET                    0x00000004
724  #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_LSB                       3
725  #define RX_ATTENTION_1_AST_INDEX_NOT_FOUND_MASK                      0x00000008
726  
727  /* Description		RX_ATTENTION_1_AST_INDEX_TIMEOUT
728  
729  			Only valid when first_msdu is set.
730  
731  
732  
733  			Indicates an unsuccessful search in the address seach
734  			table due to timeout.
735  */
736  #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_OFFSET                      0x00000004
737  #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_LSB                         4
738  #define RX_ATTENTION_1_AST_INDEX_TIMEOUT_MASK                        0x00000010
739  
740  /* Description		RX_ATTENTION_1_POWER_MGMT
741  
742  			Power management bit set in the 802.11 header.  Only set
743  			when first_msdu is set.
744  */
745  #define RX_ATTENTION_1_POWER_MGMT_OFFSET                             0x00000004
746  #define RX_ATTENTION_1_POWER_MGMT_LSB                                5
747  #define RX_ATTENTION_1_POWER_MGMT_MASK                               0x00000020
748  
749  /* Description		RX_ATTENTION_1_NON_QOS
750  
751  			Set if packet is not a non-QoS data frame.  Only set
752  			when first_msdu is set.
753  */
754  #define RX_ATTENTION_1_NON_QOS_OFFSET                                0x00000004
755  #define RX_ATTENTION_1_NON_QOS_LSB                                   6
756  #define RX_ATTENTION_1_NON_QOS_MASK                                  0x00000040
757  
758  /* Description		RX_ATTENTION_1_NULL_DATA
759  
760  			Set if frame type indicates either null data or QoS null
761  			data format.  Only set when first_msdu is set.
762  */
763  #define RX_ATTENTION_1_NULL_DATA_OFFSET                              0x00000004
764  #define RX_ATTENTION_1_NULL_DATA_LSB                                 7
765  #define RX_ATTENTION_1_NULL_DATA_MASK                                0x00000080
766  
767  /* Description		RX_ATTENTION_1_MGMT_TYPE
768  
769  			Set if packet is a management packet.  Only set when
770  			first_msdu is set.
771  */
772  #define RX_ATTENTION_1_MGMT_TYPE_OFFSET                              0x00000004
773  #define RX_ATTENTION_1_MGMT_TYPE_LSB                                 8
774  #define RX_ATTENTION_1_MGMT_TYPE_MASK                                0x00000100
775  
776  /* Description		RX_ATTENTION_1_CTRL_TYPE
777  
778  			Set if packet is a control packet.  Only set when
779  			first_msdu is set.
780  */
781  #define RX_ATTENTION_1_CTRL_TYPE_OFFSET                              0x00000004
782  #define RX_ATTENTION_1_CTRL_TYPE_LSB                                 9
783  #define RX_ATTENTION_1_CTRL_TYPE_MASK                                0x00000200
784  
785  /* Description		RX_ATTENTION_1_MORE_DATA
786  
787  			Set if more bit in frame control is set.  Only set when
788  			first_msdu is set.
789  */
790  #define RX_ATTENTION_1_MORE_DATA_OFFSET                              0x00000004
791  #define RX_ATTENTION_1_MORE_DATA_LSB                                 10
792  #define RX_ATTENTION_1_MORE_DATA_MASK                                0x00000400
793  
794  /* Description		RX_ATTENTION_1_EOSP
795  
796  			Set if the EOSP (end of service period) bit in the QoS
797  			control field is set.  Only set when first_msdu is set.
798  */
799  #define RX_ATTENTION_1_EOSP_OFFSET                                   0x00000004
800  #define RX_ATTENTION_1_EOSP_LSB                                      11
801  #define RX_ATTENTION_1_EOSP_MASK                                     0x00000800
802  
803  /* Description		RX_ATTENTION_1_A_MSDU_ERROR
804  
805  			Set if number of MSDUs in A-MSDU is above a threshold or
806  			if the size of the MSDU is invalid.  This receive buffer
807  			will contain all of the remainder of the MSDUs in this MPDU
808  			without decapsulation.
809  */
810  #define RX_ATTENTION_1_A_MSDU_ERROR_OFFSET                           0x00000004
811  #define RX_ATTENTION_1_A_MSDU_ERROR_LSB                              12
812  #define RX_ATTENTION_1_A_MSDU_ERROR_MASK                             0x00001000
813  
814  /* Description		RX_ATTENTION_1_FRAGMENT_FLAG
815  
816  			Indicates that this is an 802.11 fragment frame.  This
817  			is set when either the more_frag bit is set in the frame
818  			control or the fragment number is not zero.  Only set when
819  			first_msdu is set.
820  */
821  #define RX_ATTENTION_1_FRAGMENT_FLAG_OFFSET                          0x00000004
822  #define RX_ATTENTION_1_FRAGMENT_FLAG_LSB                             13
823  #define RX_ATTENTION_1_FRAGMENT_FLAG_MASK                            0x00002000
824  
825  /* Description		RX_ATTENTION_1_ORDER
826  
827  			Set if the order bit in the frame control is set.  Only
828  			set when first_msdu is set.
829  */
830  #define RX_ATTENTION_1_ORDER_OFFSET                                  0x00000004
831  #define RX_ATTENTION_1_ORDER_LSB                                     14
832  #define RX_ATTENTION_1_ORDER_MASK                                    0x00004000
833  
834  /* Description		RX_ATTENTION_1_CCE_MATCH
835  
836  			Indicates that this status has a corresponding MSDU that
837  			requires FW processing.  The OLE will have classification
838  			ring mask registers which will indicate the ring(s) for
839  			packets and descriptors which need FW attention.
840  */
841  #define RX_ATTENTION_1_CCE_MATCH_OFFSET                              0x00000004
842  #define RX_ATTENTION_1_CCE_MATCH_LSB                                 15
843  #define RX_ATTENTION_1_CCE_MATCH_MASK                                0x00008000
844  
845  /* Description		RX_ATTENTION_1_OVERFLOW_ERR
846  
847  			RXPCU Receive FIFO ran out of space to receive the full
848  			MPDU. Therefor this MPDU is terminated early and is thus
849  			corrupted.
850  
851  
852  
853  			This MPDU will not be ACKed.
854  
855  			RXPCU might still be able to correctly receive the
856  			following MPDUs in the PPDU if enough fifo space became
857  			available in time
858  */
859  #define RX_ATTENTION_1_OVERFLOW_ERR_OFFSET                           0x00000004
860  #define RX_ATTENTION_1_OVERFLOW_ERR_LSB                              16
861  #define RX_ATTENTION_1_OVERFLOW_ERR_MASK                             0x00010000
862  
863  /* Description		RX_ATTENTION_1_MSDU_LENGTH_ERR
864  
865  			Indicates that the MSDU length from the 802.3
866  			encapsulated length field extends beyond the MPDU boundary
867  			or if the length is less than 14 bytes.
868  
869  			Merged with original other_msdu_err: Indicates that the
870  			MSDU threshold was exceeded and thus all the rest of the
871  			MSDUs will not be scattered and will not be decasulated but
872  			will be DMA'ed in RAW format as a single MSDU buffer
873  */
874  #define RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET                        0x00000004
875  #define RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB                           17
876  #define RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK                          0x00020000
877  
878  /* Description		RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL
879  
880  			Indicates that the computed checksum (tcp_udp_chksum in
881  			'RX_MSDU_END') did not match the checksum in the TCP/UDP
882  			header.
883  */
884  #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET                    0x00000004
885  #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB                       18
886  #define RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK                      0x00040000
887  
888  /* Description		RX_ATTENTION_1_IP_CHKSUM_FAIL
889  
890  			Indicates that the computed checksum (ip_hdr_chksum in
891  			'RX_MSDU_END') did not match the checksum in the IP header.
892  */
893  #define RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET                         0x00000004
894  #define RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB                            19
895  #define RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK                           0x00080000
896  
897  /* Description		RX_ATTENTION_1_SA_IDX_INVALID
898  
899  			Indicates no matching entry was found in the address
900  			search table for the source MAC address.
901  */
902  #define RX_ATTENTION_1_SA_IDX_INVALID_OFFSET                         0x00000004
903  #define RX_ATTENTION_1_SA_IDX_INVALID_LSB                            20
904  #define RX_ATTENTION_1_SA_IDX_INVALID_MASK                           0x00100000
905  
906  /* Description		RX_ATTENTION_1_DA_IDX_INVALID
907  
908  			Indicates no matching entry was found in the address
909  			search table for the destination MAC address.
910  */
911  #define RX_ATTENTION_1_DA_IDX_INVALID_OFFSET                         0x00000004
912  #define RX_ATTENTION_1_DA_IDX_INVALID_LSB                            21
913  #define RX_ATTENTION_1_DA_IDX_INVALID_MASK                           0x00200000
914  
915  /* Description		RX_ATTENTION_1_RESERVED_1B
916  
917  			<legal 0>
918  */
919  #define RX_ATTENTION_1_RESERVED_1B_OFFSET                            0x00000004
920  #define RX_ATTENTION_1_RESERVED_1B_LSB                               22
921  #define RX_ATTENTION_1_RESERVED_1B_MASK                              0x00400000
922  
923  /* Description		RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP
924  
925  			Indicates that RX packet is not decrypted as Crypto is
926  			busy with TX packet processing.
927  */
928  #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_OFFSET                   0x00000004
929  #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_LSB                      23
930  #define RX_ATTENTION_1_RX_IN_TX_DECRYPT_BYP_MASK                     0x00800000
931  
932  /* Description		RX_ATTENTION_1_ENCRYPT_REQUIRED
933  
934  			Indicates that this data type frame is not encrypted
935  			even if the policy for this MPDU requires encryption as
936  			indicated in the peer entry key type.
937  */
938  #define RX_ATTENTION_1_ENCRYPT_REQUIRED_OFFSET                       0x00000004
939  #define RX_ATTENTION_1_ENCRYPT_REQUIRED_LSB                          24
940  #define RX_ATTENTION_1_ENCRYPT_REQUIRED_MASK                         0x01000000
941  
942  /* Description		RX_ATTENTION_1_DIRECTED
943  
944  			MPDU is a directed packet which means that the RA
945  			matched our STA addresses.  In proxySTA it means that the TA
946  			matched an entry in our address search table with the
947  			corresponding no_ack bit is the address search entry
948  			cleared.
949  */
950  #define RX_ATTENTION_1_DIRECTED_OFFSET                               0x00000004
951  #define RX_ATTENTION_1_DIRECTED_LSB                                  25
952  #define RX_ATTENTION_1_DIRECTED_MASK                                 0x02000000
953  
954  /* Description		RX_ATTENTION_1_BUFFER_FRAGMENT
955  
956  			Indicates that at least one of the rx buffers has been
957  			fragmented.  If set the FW should look at the rx_frag_info
958  			descriptor described below.
959  */
960  #define RX_ATTENTION_1_BUFFER_FRAGMENT_OFFSET                        0x00000004
961  #define RX_ATTENTION_1_BUFFER_FRAGMENT_LSB                           26
962  #define RX_ATTENTION_1_BUFFER_FRAGMENT_MASK                          0x04000000
963  
964  /* Description		RX_ATTENTION_1_MPDU_LENGTH_ERR
965  
966  			Indicates that the MPDU was pre-maturely terminated
967  			resulting in a truncated MPDU.  Don't trust the MPDU length
968  			field.
969  */
970  #define RX_ATTENTION_1_MPDU_LENGTH_ERR_OFFSET                        0x00000004
971  #define RX_ATTENTION_1_MPDU_LENGTH_ERR_LSB                           27
972  #define RX_ATTENTION_1_MPDU_LENGTH_ERR_MASK                          0x08000000
973  
974  /* Description		RX_ATTENTION_1_TKIP_MIC_ERR
975  
976  			Indicates that the MPDU Michael integrity check failed
977  */
978  #define RX_ATTENTION_1_TKIP_MIC_ERR_OFFSET                           0x00000004
979  #define RX_ATTENTION_1_TKIP_MIC_ERR_LSB                              28
980  #define RX_ATTENTION_1_TKIP_MIC_ERR_MASK                             0x10000000
981  
982  /* Description		RX_ATTENTION_1_DECRYPT_ERR
983  
984  			Indicates that the MPDU decrypt integrity check failed
985  			or CRYPTO received an encrypted frame, but did not get a
986  			valid corresponding key id in the peer entry.
987  */
988  #define RX_ATTENTION_1_DECRYPT_ERR_OFFSET                            0x00000004
989  #define RX_ATTENTION_1_DECRYPT_ERR_LSB                               29
990  #define RX_ATTENTION_1_DECRYPT_ERR_MASK                              0x20000000
991  
992  /* Description		RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR
993  
994  			Copied here by RX OLE from the RX_MPDU_END TLV
995  */
996  #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_OFFSET                  0x00000004
997  #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_LSB                     30
998  #define RX_ATTENTION_1_UNENCRYPTED_FRAME_ERR_MASK                    0x40000000
999  
1000  /* Description		RX_ATTENTION_1_FCS_ERR
1001  
1002  			Indicates that the MPDU FCS check failed
1003  */
1004  #define RX_ATTENTION_1_FCS_ERR_OFFSET                                0x00000004
1005  #define RX_ATTENTION_1_FCS_ERR_LSB                                   31
1006  #define RX_ATTENTION_1_FCS_ERR_MASK                                  0x80000000
1007  
1008  /* Description		RX_ATTENTION_2_FLOW_IDX_TIMEOUT
1009  
1010  			Indicates an unsuccessful flow search due to the
1011  			expiring of the search timer.
1012  
1013  			<legal all>
1014  */
1015  #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_OFFSET                       0x00000008
1016  #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_LSB                          0
1017  #define RX_ATTENTION_2_FLOW_IDX_TIMEOUT_MASK                         0x00000001
1018  
1019  /* Description		RX_ATTENTION_2_FLOW_IDX_INVALID
1020  
1021  			flow id is not valid
1022  
1023  			<legal all>
1024  */
1025  #define RX_ATTENTION_2_FLOW_IDX_INVALID_OFFSET                       0x00000008
1026  #define RX_ATTENTION_2_FLOW_IDX_INVALID_LSB                          1
1027  #define RX_ATTENTION_2_FLOW_IDX_INVALID_MASK                         0x00000002
1028  
1029  /* Description		RX_ATTENTION_2_WIFI_PARSER_ERROR
1030  
1031  			Indicates that the WiFi frame has one of the following
1032  			errors
1033  
1034  			o has less than minimum allowed bytes as per standard
1035  
1036  			o has incomplete VLAN LLC/SNAP (only for non A-MSDUs)
1037  
1038  			<legal all>
1039  */
1040  #define RX_ATTENTION_2_WIFI_PARSER_ERROR_OFFSET                      0x00000008
1041  #define RX_ATTENTION_2_WIFI_PARSER_ERROR_LSB                         2
1042  #define RX_ATTENTION_2_WIFI_PARSER_ERROR_MASK                        0x00000004
1043  
1044  /* Description		RX_ATTENTION_2_AMSDU_PARSER_ERROR
1045  
1046  			A-MSDU could not be properly de-agregated.
1047  
1048  			<legal all>
1049  */
1050  #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_OFFSET                     0x00000008
1051  #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_LSB                        3
1052  #define RX_ATTENTION_2_AMSDU_PARSER_ERROR_MASK                       0x00000008
1053  
1054  /* Description		RX_ATTENTION_2_SA_IDX_TIMEOUT
1055  
1056  			Indicates an unsuccessful MAC source address search due
1057  			to the expiring of the search timer.
1058  */
1059  #define RX_ATTENTION_2_SA_IDX_TIMEOUT_OFFSET                         0x00000008
1060  #define RX_ATTENTION_2_SA_IDX_TIMEOUT_LSB                            4
1061  #define RX_ATTENTION_2_SA_IDX_TIMEOUT_MASK                           0x00000010
1062  
1063  /* Description		RX_ATTENTION_2_DA_IDX_TIMEOUT
1064  
1065  			Indicates an unsuccessful MAC destination address search
1066  			due to the expiring of the search timer.
1067  */
1068  #define RX_ATTENTION_2_DA_IDX_TIMEOUT_OFFSET                         0x00000008
1069  #define RX_ATTENTION_2_DA_IDX_TIMEOUT_LSB                            5
1070  #define RX_ATTENTION_2_DA_IDX_TIMEOUT_MASK                           0x00000020
1071  
1072  /* Description		RX_ATTENTION_2_MSDU_LIMIT_ERROR
1073  
1074  			Indicates that the MSDU threshold was exceeded and thus
1075  			all the rest of the MSDUs will not be scattered and will not
1076  			be decasulated but will be DMA'ed in RAW format as a single
1077  			MSDU buffer
1078  */
1079  #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_OFFSET                       0x00000008
1080  #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_LSB                          6
1081  #define RX_ATTENTION_2_MSDU_LIMIT_ERROR_MASK                         0x00000040
1082  
1083  /* Description		RX_ATTENTION_2_DA_IS_VALID
1084  
1085  			Indicates that OLE found a valid DA entry
1086  */
1087  #define RX_ATTENTION_2_DA_IS_VALID_OFFSET                            0x00000008
1088  #define RX_ATTENTION_2_DA_IS_VALID_LSB                               7
1089  #define RX_ATTENTION_2_DA_IS_VALID_MASK                              0x00000080
1090  
1091  /* Description		RX_ATTENTION_2_DA_IS_MCBC
1092  
1093  			Field Only valid if da_is_valid is set
1094  
1095  
1096  
1097  			Indicates the DA address was a Multicast of Broadcast
1098  			address.
1099  */
1100  #define RX_ATTENTION_2_DA_IS_MCBC_OFFSET                             0x00000008
1101  #define RX_ATTENTION_2_DA_IS_MCBC_LSB                                8
1102  #define RX_ATTENTION_2_DA_IS_MCBC_MASK                               0x00000100
1103  
1104  /* Description		RX_ATTENTION_2_SA_IS_VALID
1105  
1106  			Indicates that OLE found a valid SA entry
1107  */
1108  #define RX_ATTENTION_2_SA_IS_VALID_OFFSET                            0x00000008
1109  #define RX_ATTENTION_2_SA_IS_VALID_LSB                               9
1110  #define RX_ATTENTION_2_SA_IS_VALID_MASK                              0x00000200
1111  
1112  /* Description		RX_ATTENTION_2_DECRYPT_STATUS_CODE
1113  
1114  			Field provides insight into the decryption performed
1115  
1116  
1117  
1118  			<enum 0 decrypt_ok> Frame had protection enabled and
1119  			decrypted properly
1120  
1121  			<enum 1 decrypt_unprotected_frame > Frame is unprotected
1122  			and hence bypassed
1123  
1124  			<enum 2 decrypt_data_err > Frame has protection enabled
1125  			and could not be properly decrypted due to MIC/ICV mismatch
1126  			etc.
1127  
1128  			<enum 3 decrypt_key_invalid > Frame has protection
1129  			enabled but the key that was required to decrypt this frame
1130  			was not valid
1131  
1132  			<enum 4 decrypt_peer_entry_invalid > Frame has
1133  			protection enabled but the key that was required to decrypt
1134  			this frame was not valid
1135  
1136  			<enum 5 decrypt_other > Reserved for other indications
1137  
1138  
1139  
1140  			<legal 0 - 5>
1141  */
1142  #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET                    0x00000008
1143  #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB                       10
1144  #define RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK                      0x00001c00
1145  
1146  /* Description		RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED
1147  
1148  			Frame is received, but RXPCU could not update the
1149  			receive bitmap due to (temporary) fifo contraints.
1150  
1151  			<legal all>
1152  */
1153  #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_OFFSET                  0x00000008
1154  #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_LSB                     13
1155  #define RX_ATTENTION_2_RX_BITMAP_NOT_UPDATED_MASK                    0x00002000
1156  
1157  /* Description		RX_ATTENTION_2_RESERVED_2
1158  
1159  			<legal 0>
1160  */
1161  #define RX_ATTENTION_2_RESERVED_2_OFFSET                             0x00000008
1162  #define RX_ATTENTION_2_RESERVED_2_LSB                                14
1163  #define RX_ATTENTION_2_RESERVED_2_MASK                               0x7fffc000
1164  
1165  /* Description		RX_ATTENTION_2_MSDU_DONE
1166  
1167  			If set indicates that the RX packet data, RX header
1168  			data, RX PPDU start descriptor, RX MPDU start/end
1169  			descriptor, RX MSDU start/end descriptors and RX Attention
1170  			descriptor are all valid.  This bit must be in the last
1171  			octet of the descriptor.
1172  */
1173  #define RX_ATTENTION_2_MSDU_DONE_OFFSET                              0x00000008
1174  #define RX_ATTENTION_2_MSDU_DONE_LSB                                 31
1175  #define RX_ATTENTION_2_MSDU_DONE_MASK                                0x80000000
1176  
1177  
1178  #endif // _RX_ATTENTION_H_
1179