1 /*
2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
3 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for
6 * any purpose with or without fee is hereby granted, provided that the
7 * above copyright notice and this permission notice appear in all
8 * copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17 * PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #ifndef _HAL_RH_RX_H_
21 #define _HAL_RH_RX_H_
22
23 #include <hal_rx.h>
24
25 #define HAL_RX_BUF_COOKIE_GET(buff_addr_info) \
26 (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
27 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET)), \
28 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK, \
29 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB))
30
31 #define HAL_RX_BUF_RBM_GET(buff_addr_info) \
32 (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
33 BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET)),\
34 BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK, \
35 BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB))
36 /*
37 * macro to set the cookie into the rxdma ring entry
38 */
39 #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \
40 ((*(((unsigned int *)buff_addr_info) + \
41 (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \
42 ~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \
43 ((*(((unsigned int *)buff_addr_info) + \
44 (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \
45 ((cookie) << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \
46 BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK)
47
48 /*
49 * macro to set the manager into the rxdma ring entry
50 */
51 #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \
52 ((*(((unsigned int *)buff_addr_info) + \
53 (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \
54 ~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \
55 ((*(((unsigned int *)buff_addr_info) + \
56 (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \
57 ((manager) << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \
58 BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK)
59
60 /*
61 * NOTE: None of the following _GET macros need a right
62 * shift by the corresponding _LSB. This is because, they are
63 * finally taken and "OR'ed" into a single word again.
64 */
65
66 #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) \
67 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
68 RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \
69 RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
70
71 #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) \
72 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
73 RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) & \
74 RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK)
75
76 #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
77 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
78 RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) & \
79 RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK)
80
81 #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) \
82 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
83 RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) & \
84 RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK)
85
86 #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) \
87 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
88 RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) & \
89 RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK)
90
91 #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
92 ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
93 RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) & \
94 RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK)
95
96 /*
97 * Structures & Macros to obtain fields from the TLV's in the Rx packet
98 * pre-header.
99 */
100
101 /*
102 * Every Rx packet starts at an offset from the top of the buffer.
103 * If the host hasn't subscribed to any specific TLV, there is
104 * still space reserved for the following TLV's from the start of
105 * the buffer:
106 * -- RX ATTENTION
107 * -- RX MPDU START
108 * -- RX MSDU START
109 * -- RX MSDU END
110 * -- RX MPDU END
111 * -- RX PACKET HEADER (802.11)
112 * If the host subscribes to any of the TLV's above, that TLV
113 * if populated by the HW
114 */
115
116 #define NUM_DWORDS_TAG 1
117
118 /* By default the packet header TLV is 128 bytes */
119 #define NUM_OF_BYTES_RX_802_11_HDR_TLV 128
120 #define NUM_OF_DWORDS_RX_802_11_HDR_TLV \
121 (NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2)
122
123 #define RX_PKT_OFFSET_WORDS \
124 ( \
125 NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG \
126 NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG \
127 NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG \
128 NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG \
129 NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG \
130 NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG \
131 )
132
133 #define RX_PKT_OFFSET_BYTES \
134 (RX_PKT_OFFSET_WORDS << 2)
135
136 #define RX_PKT_HDR_TLV_LEN 120
137
138 /*
139 * Each RX descriptor TLV is preceded by 1 DWORD "tag"
140 */
141 struct rx_attention_tlv {
142 uint32_t tag;
143 struct rx_attention rx_attn;
144 };
145
146 struct rx_mpdu_start_tlv {
147 uint32_t tag;
148 struct rx_mpdu_start rx_mpdu_start;
149 };
150
151 struct rx_msdu_start_tlv {
152 uint32_t tag;
153 struct rx_msdu_start rx_msdu_start;
154 };
155
156 struct rx_msdu_end_tlv {
157 uint32_t tag;
158 struct rx_msdu_end rx_msdu_end;
159 };
160
161 struct rx_mpdu_end_tlv {
162 uint32_t tag;
163 struct rx_mpdu_end rx_mpdu_end;
164 };
165
166 struct rx_pkt_hdr_tlv {
167 uint32_t tag; /* 4 B */
168 uint32_t phy_ppdu_id; /* 4 B */
169 char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN]; /* 120 B */
170 };
171
172 /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status
173 * buffers, monitor destination buffers and monitor descriptor buffers.
174 */
175 #ifdef RXDMA_OPTIMIZATION
176 /*
177 * The RX_PADDING_BYTES is required so that the TLV's don't
178 * spread across the 128 byte boundary
179 * RXDMA optimization requires:
180 * 1) MSDU_END & ATTENTION TLV's follow in that order
181 * 2) TLV's don't span across 128 byte lines
182 * 3) Rx Buffer is nicely aligned on the 128 byte boundary
183 */
184 #define RX_PADDING0_BYTES 4
185 #define RX_PADDING1_BYTES 16
186 struct rx_pkt_tlvs {
187 struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
188 struct rx_attention_tlv attn_tlv; /* 16 bytes */
189 struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
190 uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
191 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
192 struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
193 uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
194 #ifndef NO_RX_PKT_HDR_TLV
195 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
196 #endif
197 };
198 #else /* RXDMA_OPTIMIZATION */
199 struct rx_pkt_tlvs {
200 struct rx_attention_tlv attn_tlv;
201 struct rx_mpdu_start_tlv mpdu_start_tlv;
202 struct rx_msdu_start_tlv msdu_start_tlv;
203 struct rx_msdu_end_tlv msdu_end_tlv;
204 struct rx_mpdu_end_tlv mpdu_end_tlv;
205 struct rx_pkt_hdr_tlv pkt_hdr_tlv;
206 };
207 #endif /* RXDMA_OPTIMIZATION */
208
209 /* rx_mon_pkt_tlvs structure should be used to process monitor data buffers */
210 #ifdef RXDMA_OPTIMIZATION
211 struct rx_mon_pkt_tlvs {
212 struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
213 struct rx_attention_tlv attn_tlv; /* 16 bytes */
214 struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
215 uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
216 struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
217 struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
218 uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
219 struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
220 };
221 #else /* RXDMA_OPTIMIZATION */
222 struct rx_mon_pkt_tlvs {
223 struct rx_attention_tlv attn_tlv;
224 struct rx_mpdu_start_tlv mpdu_start_tlv;
225 struct rx_msdu_start_tlv msdu_start_tlv;
226 struct rx_msdu_end_tlv msdu_end_tlv;
227 struct rx_mpdu_end_tlv mpdu_end_tlv;
228 struct rx_pkt_hdr_tlv pkt_hdr_tlv;
229 };
230 #endif
231
232 #define SIZE_OF_MONITOR_TLV sizeof(struct rx_mon_pkt_tlvs)
233 #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
234
235 #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
236
237 #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
238
239 #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \
240 RX_PKT_TLV_OFFSET(mpdu_start_tlv)
241 #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv)
242 #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \
243 RX_PKT_TLV_OFFSET(msdu_start_tlv)
244 #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv)
245 #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv)
246 #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv)
247
248 /**
249 * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf
250 *
251 * @rx_buf_start: Pointer to data buffer field
252 *
253 * Returns: pointer to rx_pkt_tlvs
254 */
255 static inline
hal_rx_get_pkt_tlvs(uint8_t * rx_buf_start)256 struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start)
257 {
258 return (struct rx_pkt_tlvs *)rx_buf_start;
259 }
260
261 /**
262 * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs
263 *
264 * @pkt_tlvs: Pointer to pkt_tlvs
265 * Returns: pointer to rx_mpdu_info structure
266 */
267 static inline
hal_rx_get_mpdu_info(struct rx_pkt_tlvs * pkt_tlvs)268 struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs)
269 {
270 return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
271 }
272
273 /**
274 * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info
275 * from the reserved bytes of rx_tlv_hdr.
276 * @buf: start of rx_tlv_hdr
277 * @buf_info: hal_rx_mon_dest_buf_info structure
278 *
279 * Return: void
280 */
hal_rx_mon_dest_get_buffer_info_from_tlv(uint8_t * buf,struct hal_rx_mon_dest_buf_info * buf_info)281 static inline void hal_rx_mon_dest_get_buffer_info_from_tlv(
282 uint8_t *buf,
283 struct hal_rx_mon_dest_buf_info *buf_info)
284 {
285 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
286
287 qdf_mem_copy(buf_info, pkt_tlvs->rx_padding0,
288 sizeof(struct hal_rx_mon_dest_buf_info));
289 }
290
291 /*
292 * Get msdu_done bit from the RX_ATTENTION TLV
293 */
294 #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn) \
295 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
296 RX_ATTENTION_2_MSDU_DONE_OFFSET)), \
297 RX_ATTENTION_2_MSDU_DONE_MASK, \
298 RX_ATTENTION_2_MSDU_DONE_LSB))
299
300 #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn) \
301 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
302 RX_ATTENTION_1_FIRST_MPDU_OFFSET)), \
303 RX_ATTENTION_1_FIRST_MPDU_MASK, \
304 RX_ATTENTION_1_FIRST_MPDU_LSB))
305
306 #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn) \
307 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
308 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)), \
309 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK, \
310 RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB))
311
312 /*
313 * hal_rx_attn_tcp_udp_cksum_fail_get(): get tcp_udp cksum fail bit
314 * from rx attention
315 * @buf: pointer to rx_pkt_tlvs
316 *
317 * Return: tcp_udp_cksum_fail
318 */
319 static inline bool
hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t * buf)320 hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf)
321 {
322 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
323 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
324 uint8_t tcp_udp_cksum_fail;
325
326 tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn);
327
328 return !!tcp_udp_cksum_fail;
329 }
330
331 #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn) \
332 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
333 RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)), \
334 RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK, \
335 RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB))
336
337 /*
338 * hal_rx_attn_ip_cksum_fail_get(): get ip cksum fail bit
339 * from rx attention
340 * @buf: pointer to rx_pkt_tlvs
341 *
342 * Return: ip_cksum_fail
343 */
344 static inline bool
hal_rx_attn_ip_cksum_fail_get(uint8_t * buf)345 hal_rx_attn_ip_cksum_fail_get(uint8_t *buf)
346 {
347 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
348 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
349 uint8_t ip_cksum_fail;
350
351 ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn);
352
353 return !!ip_cksum_fail;
354 }
355
356 #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn) \
357 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
358 RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)), \
359 RX_ATTENTION_0_PHY_PPDU_ID_MASK, \
360 RX_ATTENTION_0_PHY_PPDU_ID_LSB))
361
362 #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn) \
363 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
364 RX_ATTENTION_1_CCE_MATCH_OFFSET)), \
365 RX_ATTENTION_1_CCE_MATCH_MASK, \
366 RX_ATTENTION_1_CCE_MATCH_LSB))
367
368 /*
369 * hal_rx_msdu_cce_match_get_rh(): get CCE match bit
370 * from rx attention
371 * @buf: pointer to rx_pkt_tlvs
372 * Return: CCE match value
373 */
374 static inline bool
hal_rx_msdu_cce_match_get_rh(uint8_t * buf)375 hal_rx_msdu_cce_match_get_rh(uint8_t *buf)
376 {
377 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
378 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
379 uint8_t cce_match_val;
380
381 cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn);
382 return !!cce_match_val;
383 }
384
385 /*
386 * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
387 */
388 #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info) \
389 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
390 RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)), \
391 RX_MPDU_INFO_8_PEER_META_DATA_MASK, \
392 RX_MPDU_INFO_8_PEER_META_DATA_LSB))
393
394 static inline uint32_t
hal_rx_mpdu_peer_meta_data_get_rh(uint8_t * buf)395 hal_rx_mpdu_peer_meta_data_get_rh(uint8_t *buf)
396 {
397 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
398 struct rx_mpdu_start *mpdu_start =
399 &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
400
401 struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
402 uint32_t peer_meta_data;
403
404 peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info);
405
406 return peer_meta_data;
407 }
408
409 #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info) \
410 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
411 RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)), \
412 RX_MPDU_INFO_12_AMPDU_FLAG_MASK, \
413 RX_MPDU_INFO_12_AMPDU_FLAG_LSB))
414
415 /*
416 * LRO information needed from the TLVs
417 */
418 #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \
419 (_HAL_MS( \
420 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
421 msdu_end_tlv.rx_msdu_end), \
422 RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \
423 RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \
424 RX_MSDU_END_9_LRO_ELIGIBLE_LSB))
425
426 #define HAL_RX_TLV_GET_TCP_ACK(buf) \
427 (_HAL_MS( \
428 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
429 msdu_end_tlv.rx_msdu_end), \
430 RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \
431 RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \
432 RX_MSDU_END_8_TCP_ACK_NUMBER_LSB))
433
434 #define HAL_RX_TLV_GET_TCP_SEQ(buf) \
435 (_HAL_MS( \
436 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
437 msdu_end_tlv.rx_msdu_end), \
438 RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \
439 RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \
440 RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB))
441
442 #define HAL_RX_TLV_GET_TCP_WIN(buf) \
443 (_HAL_MS( \
444 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
445 msdu_end_tlv.rx_msdu_end), \
446 RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \
447 RX_MSDU_END_9_WINDOW_SIZE_MASK, \
448 RX_MSDU_END_9_WINDOW_SIZE_LSB))
449
450 #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \
451 (_HAL_MS( \
452 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
453 msdu_start_tlv.rx_msdu_start), \
454 RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \
455 RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \
456 RX_MSDU_START_2_TCP_ONLY_ACK_LSB))
457
458 #define HAL_RX_TLV_GET_TCP_PROTO(buf) \
459 (_HAL_MS( \
460 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
461 msdu_start_tlv.rx_msdu_start), \
462 RX_MSDU_START_2_TCP_PROTO_OFFSET)), \
463 RX_MSDU_START_2_TCP_PROTO_MASK, \
464 RX_MSDU_START_2_TCP_PROTO_LSB))
465
466 #define HAL_RX_TLV_GET_UDP_PROTO(buf) \
467 (_HAL_MS( \
468 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
469 msdu_start_tlv.rx_msdu_start), \
470 RX_MSDU_START_2_UDP_PROTO_OFFSET)), \
471 RX_MSDU_START_2_UDP_PROTO_MASK, \
472 RX_MSDU_START_2_UDP_PROTO_LSB))
473
474 #define HAL_RX_TLV_GET_IPV6(buf) \
475 (_HAL_MS( \
476 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
477 msdu_start_tlv.rx_msdu_start), \
478 RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \
479 RX_MSDU_START_2_IPV6_PROTO_MASK, \
480 RX_MSDU_START_2_IPV6_PROTO_LSB))
481
482 #define HAL_RX_TLV_GET_IP_OFFSET(buf) \
483 (_HAL_MS( \
484 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
485 msdu_start_tlv.rx_msdu_start), \
486 RX_MSDU_START_1_L3_OFFSET_OFFSET)), \
487 RX_MSDU_START_1_L3_OFFSET_MASK, \
488 RX_MSDU_START_1_L3_OFFSET_LSB))
489
490 #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \
491 (_HAL_MS( \
492 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
493 msdu_start_tlv.rx_msdu_start), \
494 RX_MSDU_START_1_L4_OFFSET_OFFSET)), \
495 RX_MSDU_START_1_L4_OFFSET_MASK, \
496 RX_MSDU_START_1_L4_OFFSET_LSB))
497
498 #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \
499 (_HAL_MS( \
500 (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
501 msdu_start_tlv.rx_msdu_start), \
502 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
503 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
504 RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
505
506 #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \
507 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
508 RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \
509 RX_MSDU_START_1_MSDU_LENGTH_MASK, \
510 RX_MSDU_START_1_MSDU_LENGTH_LSB))
511
512 #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start) \
513 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
514 RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \
515 RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK, \
516 RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB))
517
518 #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start) \
519 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
520 RX_MSDU_START_5_SGI_OFFSET)), \
521 RX_MSDU_START_5_SGI_MASK, \
522 RX_MSDU_START_5_SGI_LSB))
523
524 #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start) \
525 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
526 RX_MSDU_START_5_RATE_MCS_OFFSET)), \
527 RX_MSDU_START_5_RATE_MCS_MASK, \
528 RX_MSDU_START_5_RATE_MCS_LSB))
529
530 #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn) \
531 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
532 RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)), \
533 RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK, \
534 RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB))
535
536 /*
537 * Get key index from RX_MSDU_END
538 */
539 #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end) \
540 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
541 RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)), \
542 RX_MSDU_END_2_KEY_ID_OCTET_MASK, \
543 RX_MSDU_END_2_KEY_ID_OCTET_LSB))
544
545 #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start) \
546 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
547 RX_MSDU_START_5_USER_RSSI_OFFSET)), \
548 RX_MSDU_START_5_USER_RSSI_MASK, \
549 RX_MSDU_START_5_USER_RSSI_LSB))
550
551 #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start) \
552 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
553 RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)), \
554 RX_MSDU_START_7_SW_PHY_META_DATA_MASK, \
555 RX_MSDU_START_7_SW_PHY_META_DATA_LSB))
556
557 #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start) \
558 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
559 RX_MSDU_START_5_PKT_TYPE_OFFSET)), \
560 RX_MSDU_START_5_PKT_TYPE_MASK, \
561 RX_MSDU_START_5_PKT_TYPE_LSB))
562
563 #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \
564 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
565 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \
566 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \
567 RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB))
568
569 #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \
570 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
571 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
572 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \
573 RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
574
575 /*******************************************************************************
576 * RX ERROR APIS
577 ******************************************************************************/
578
579 #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end) \
580 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
581 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)), \
582 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK, \
583 RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB))
584
585 #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end) \
586 (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
587 RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)), \
588 RX_MPDU_END_1_TKIP_MIC_ERR_MASK, \
589 RX_MPDU_END_1_TKIP_MIC_ERR_LSB))
590
591 #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info) \
592 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
593 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)), \
594 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK, \
595 RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB))
596
597 /**
598 * hal_rx_attn_msdu_done_get_rh() - Get msdi done flag from RX TLV
599 * @buf: RX tlv address
600 *
601 * Return: msdu done flag
602 */
hal_rx_attn_msdu_done_get_rh(uint8_t * buf)603 static inline uint32_t hal_rx_attn_msdu_done_get_rh(uint8_t *buf)
604 {
605 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
606 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
607 uint32_t msdu_done;
608
609 msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn);
610
611 return msdu_done;
612 }
613
614 #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \
615 (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
616 HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
617 HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \
618 HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
619 HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \
620 HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
621 HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \
622 HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr))
623
624 /**
625 * hal_rx_msdu_flags_get_rh() - Get msdu flags from ring desc
626 * @msdu_desc_info_hdl: msdu desc info handle
627 *
628 * Return: msdu flags
629 */
630 static inline
hal_rx_msdu_flags_get_rh(rx_msdu_desc_info_t msdu_desc_info_hdl)631 uint32_t hal_rx_msdu_flags_get_rh(rx_msdu_desc_info_t msdu_desc_info_hdl)
632 {
633 struct rx_msdu_desc_info *msdu_desc_info =
634 (struct rx_msdu_desc_info *)msdu_desc_info_hdl;
635
636 return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info);
637 }
638
639 #define HAL_RX_ATTN_MSDU_LEN_ERR_GET(_rx_attn) \
640 (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
641 RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET)), \
642 RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK, \
643 RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB))
644
645 /**
646 * hal_rx_attn_msdu_len_err_get_rh(): Get msdu_len_err value from
647 * rx attention tlvs
648 * @buf: pointer to rx pkt tlvs hdr
649 *
650 * Return: msdu_len_err value
651 */
652 static inline uint32_t
hal_rx_attn_msdu_len_err_get_rh(uint8_t * buf)653 hal_rx_attn_msdu_len_err_get_rh(uint8_t *buf)
654 {
655 struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
656 struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
657
658 return HAL_RX_ATTN_MSDU_LEN_ERR_GET(rx_attn);
659 }
660 #endif /* _HAL_RH_RX_H_ */
661