1 /* 2 * Copyright (c) 2021 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _HAL_TX_HW_DEFINES_H_ 20 #define _HAL_TX_HW_DEFINES_H_ 21 22 #define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET 0x00000000 23 #define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_LSB 0 24 #define HAL_TX_MSDU_EXTENSION_TSO_ENABLE_MASK 0x00000001 25 26 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_OFFSET 0x00000000 27 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_LSB 7 28 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK 0x0000ff80 29 30 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET 0x00000000 31 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB 16 32 #define HAL_TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK 0x01ff0000 33 34 #define HAL_TX_MSDU_EXTENSION_L2_LENGTH_OFFSET 0x00000004 35 #define HAL_TX_MSDU_EXTENSION_L2_LENGTH_LSB 0 36 #define HAL_TX_MSDU_EXTENSION_L2_LENGTH_MASK 0x0000ffff 37 38 #define HAL_TX_MSDU_EXTENSION_IP_LENGTH_OFFSET 0x00000004 39 #define HAL_TX_MSDU_EXTENSION_IP_LENGTH_LSB 16 40 #define HAL_TX_MSDU_EXTENSION_IP_LENGTH_MASK 0xffff0000 41 42 #define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET 0x00000008 43 #define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB 0 44 #define HAL_TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK 0xffffffff 45 46 #define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET 0x0000000c 47 #define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB 0 48 #define HAL_TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK 0x0000ffff 49 50 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET 0x00000018 51 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB 0 52 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK 0xffffffff 53 54 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET 0x0000001c 55 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB 0 56 #define HAL_TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK 0x000000ff 57 58 #define HAL_TX_MSDU_EXTENSION_BUF0_LEN_OFFSET 0x0000001c 59 #define HAL_TX_MSDU_EXTENSION_BUF0_LEN_LSB 16 60 #define HAL_TX_MSDU_EXTENSION_BUF0_LEN_MASK 0xffff0000 61 62 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET 0x00000020 63 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB 0 64 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK 0xffffffff 65 66 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET 0x00000024 67 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB 0 68 #define HAL_TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK 0x000000ff 69 70 #define HAL_TX_MSDU_EXTENSION_BUF1_LEN_OFFSET 0x00000024 71 #define HAL_TX_MSDU_EXTENSION_BUF1_LEN_LSB 16 72 #define HAL_TX_MSDU_EXTENSION_BUF1_LEN_MASK 0xffff0000 73 74 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET 0x00000028 75 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB 0 76 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK 0xffffffff 77 78 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET 0x0000002c 79 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB 0 80 #define HAL_TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK 0x000000ff 81 82 #define HAL_TX_MSDU_EXTENSION_BUF2_LEN_OFFSET 0x0000002c 83 #define HAL_TX_MSDU_EXTENSION_BUF2_LEN_LSB 16 84 #define HAL_TX_MSDU_EXTENSION_BUF2_LEN_MASK 0xffff0000 85 86 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET 0x00000030 87 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB 0 88 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK 0xffffffff 89 90 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET 0x00000034 91 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB 0 92 #define HAL_TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK 0x000000ff 93 94 #define HAL_TX_MSDU_EXTENSION_BUF3_LEN_OFFSET 0x00000034 95 #define HAL_TX_MSDU_EXTENSION_BUF3_LEN_LSB 16 96 #define HAL_TX_MSDU_EXTENSION_BUF3_LEN_MASK 0xffff0000 97 98 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET 0x00000038 99 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB 0 100 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK 0xffffffff 101 102 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET 0x0000003c 103 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB 0 104 #define HAL_TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK 0x000000ff 105 106 #define HAL_TX_MSDU_EXTENSION_BUF4_LEN_OFFSET 0x0000003c 107 #define HAL_TX_MSDU_EXTENSION_BUF4_LEN_LSB 16 108 #define HAL_TX_MSDU_EXTENSION_BUF4_LEN_MASK 0xffff0000 109 110 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET 0x00000040 111 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB 0 112 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK 0xffffffff 113 114 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET 0x00000044 115 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB 0 116 #define HAL_TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK 0x000000ff 117 118 #define HAL_TX_MSDU_EXTENSION_BUF5_LEN_OFFSET 0x00000044 119 #define HAL_TX_MSDU_EXTENSION_BUF5_LEN_LSB 16 120 #define HAL_TX_MSDU_EXTENSION_BUF5_LEN_MASK 0xffff0000 121 122 /* TX completion ring MACROS */ 123 #define HAL_TX_COMP_TX_RATE_STATS_OFFSET 0x00000014 124 #define HAL_TX_COMP_TX_RATE_STATS_LSB 0 125 #define HAL_TX_COMP_TX_RATE_STATS_MASK 0xffffffff 126 127 #define HAL_TX_COMP_SW_PEER_ID_OFFSET 0x1c 128 #define HAL_TX_COMP_SW_PEER_ID_LSB 0 129 #define HAL_TX_COMP_SW_PEER_ID_MASK 0x0000ffff 130 131 #define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_OFFSET 0x8 132 #define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_LSB 0x6 133 #define HAL_TX_COMP_BUFFER_OR_DESC_TYPE_MASK 0x000001c0 134 135 #define HAL_TX_COMP_TQM_RELEASE_REASON_OFFSET 0x8 136 #define HAL_TX_COMP_TQM_RELEASE_REASON_LSB 13 137 #define HAL_TX_COMP_TQM_RELEASE_REASON_MASK 0x0001e000 138 139 #define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_OFFSET 0x8 140 #define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_LSB 0 141 #define HAL_WBM2SW_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007 142 143 #endif /* _HAL_TX_HW_DEFINES_H_ */ 144