1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _VHT_SIG_A_INFO_H_ 23 #define _VHT_SIG_A_INFO_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_VHT_SIG_A_INFO 2 28 29 struct vht_sig_a_info { 30 uint32_t bandwidth : 2, 31 vhta_reserved_0 : 1, 32 stbc : 1, 33 group_id : 6, 34 n_sts : 12, 35 txop_ps_not_allowed : 1, 36 vhta_reserved_0b : 1, 37 reserved_0 : 8; 38 uint32_t gi_setting : 2, 39 su_mu_coding : 1, 40 ldpc_extra_symbol : 1, 41 mcs : 4, 42 beamformed : 1, 43 vhta_reserved_1 : 1, 44 crc : 8, 45 tail : 6, 46 reserved_1 : 8; 47 }; 48 49 #define VHT_SIG_A_INFO_0_BANDWIDTH_OFFSET 0x00000000 50 #define VHT_SIG_A_INFO_0_BANDWIDTH_LSB 0 51 #define VHT_SIG_A_INFO_0_BANDWIDTH_MASK 0x00000003 52 53 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_OFFSET 0x00000000 54 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_LSB 2 55 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_MASK 0x00000004 56 57 #define VHT_SIG_A_INFO_0_STBC_OFFSET 0x00000000 58 #define VHT_SIG_A_INFO_0_STBC_LSB 3 59 #define VHT_SIG_A_INFO_0_STBC_MASK 0x00000008 60 61 #define VHT_SIG_A_INFO_0_GROUP_ID_OFFSET 0x00000000 62 #define VHT_SIG_A_INFO_0_GROUP_ID_LSB 4 63 #define VHT_SIG_A_INFO_0_GROUP_ID_MASK 0x000003f0 64 65 #define VHT_SIG_A_INFO_0_N_STS_OFFSET 0x00000000 66 #define VHT_SIG_A_INFO_0_N_STS_LSB 10 67 #define VHT_SIG_A_INFO_0_N_STS_MASK 0x003ffc00 68 69 #define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_OFFSET 0x00000000 70 #define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_LSB 22 71 #define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_MASK 0x00400000 72 73 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_OFFSET 0x00000000 74 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_LSB 23 75 #define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_MASK 0x00800000 76 77 #define VHT_SIG_A_INFO_0_RESERVED_0_OFFSET 0x00000000 78 #define VHT_SIG_A_INFO_0_RESERVED_0_LSB 24 79 #define VHT_SIG_A_INFO_0_RESERVED_0_MASK 0xff000000 80 81 #define VHT_SIG_A_INFO_1_GI_SETTING_OFFSET 0x00000004 82 #define VHT_SIG_A_INFO_1_GI_SETTING_LSB 0 83 #define VHT_SIG_A_INFO_1_GI_SETTING_MASK 0x00000003 84 85 #define VHT_SIG_A_INFO_1_SU_MU_CODING_OFFSET 0x00000004 86 #define VHT_SIG_A_INFO_1_SU_MU_CODING_LSB 2 87 #define VHT_SIG_A_INFO_1_SU_MU_CODING_MASK 0x00000004 88 89 #define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004 90 #define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_LSB 3 91 #define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_MASK 0x00000008 92 93 #define VHT_SIG_A_INFO_1_MCS_OFFSET 0x00000004 94 #define VHT_SIG_A_INFO_1_MCS_LSB 4 95 #define VHT_SIG_A_INFO_1_MCS_MASK 0x000000f0 96 97 #define VHT_SIG_A_INFO_1_BEAMFORMED_OFFSET 0x00000004 98 #define VHT_SIG_A_INFO_1_BEAMFORMED_LSB 8 99 #define VHT_SIG_A_INFO_1_BEAMFORMED_MASK 0x00000100 100 101 #define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_OFFSET 0x00000004 102 #define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_LSB 9 103 #define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_MASK 0x00000200 104 105 #define VHT_SIG_A_INFO_1_CRC_OFFSET 0x00000004 106 #define VHT_SIG_A_INFO_1_CRC_LSB 10 107 #define VHT_SIG_A_INFO_1_CRC_MASK 0x0003fc00 108 109 #define VHT_SIG_A_INFO_1_TAIL_OFFSET 0x00000004 110 #define VHT_SIG_A_INFO_1_TAIL_LSB 18 111 #define VHT_SIG_A_INFO_1_TAIL_MASK 0x00fc0000 112 113 #define VHT_SIG_A_INFO_1_RESERVED_1_OFFSET 0x00000004 114 #define VHT_SIG_A_INFO_1_RESERVED_1_LSB 24 115 #define VHT_SIG_A_INFO_1_RESERVED_1_MASK 0xff000000 116 117 #endif 118