1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _RX_MSDU_START_H_ 23 #define _RX_MSDU_START_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_RX_MSDU_START 9 28 29 struct rx_msdu_start { 30 uint32_t rxpcu_mpdu_filter_in_category : 2, 31 sw_frame_group_id : 7, 32 reserved_0 : 7, 33 phy_ppdu_id : 16; 34 uint32_t msdu_length : 14, 35 reserved_1a : 1, 36 ipsec_esp : 1, 37 l3_offset : 7, 38 ipsec_ah : 1, 39 l4_offset : 8; 40 uint32_t msdu_number : 8, 41 decap_format : 2, 42 ipv4_proto : 1, 43 ipv6_proto : 1, 44 tcp_proto : 1, 45 udp_proto : 1, 46 ip_frag : 1, 47 tcp_only_ack : 1, 48 da_is_bcast_mcast : 1, 49 toeplitz_hash_sel : 2, 50 ip_fixed_header_valid : 1, 51 ip_extn_header_valid : 1, 52 tcp_udp_header_valid : 1, 53 mesh_control_present : 1, 54 ldpc : 1, 55 ip4_protocol_ip6_next_header : 8; 56 uint32_t toeplitz_hash_2_or_4 : 32; 57 uint32_t flow_id_toeplitz : 32; 58 uint32_t user_rssi : 8, 59 pkt_type : 4, 60 stbc : 1, 61 sgi : 2, 62 rate_mcs : 4, 63 receive_bandwidth : 2, 64 reception_type : 3, 65 mimo_ss_bitmap : 8; 66 uint32_t ppdu_start_timestamp : 32; 67 uint32_t sw_phy_meta_data : 32; 68 uint32_t vlan_ctag_ci : 16, 69 vlan_stag_ci : 16; 70 }; 71 72 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x00000000 73 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 74 #define RX_MSDU_START_0_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x00000003 75 76 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_OFFSET 0x00000000 77 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_LSB 2 78 #define RX_MSDU_START_0_SW_FRAME_GROUP_ID_MASK 0x000001fc 79 80 #define RX_MSDU_START_0_RESERVED_0_OFFSET 0x00000000 81 #define RX_MSDU_START_0_RESERVED_0_LSB 9 82 #define RX_MSDU_START_0_RESERVED_0_MASK 0x0000fe00 83 84 #define RX_MSDU_START_0_PHY_PPDU_ID_OFFSET 0x00000000 85 #define RX_MSDU_START_0_PHY_PPDU_ID_LSB 16 86 #define RX_MSDU_START_0_PHY_PPDU_ID_MASK 0xffff0000 87 88 #define RX_MSDU_START_1_MSDU_LENGTH_OFFSET 0x00000004 89 #define RX_MSDU_START_1_MSDU_LENGTH_LSB 0 90 #define RX_MSDU_START_1_MSDU_LENGTH_MASK 0x00003fff 91 92 #define RX_MSDU_START_1_RESERVED_1A_OFFSET 0x00000004 93 #define RX_MSDU_START_1_RESERVED_1A_LSB 14 94 #define RX_MSDU_START_1_RESERVED_1A_MASK 0x00004000 95 96 #define RX_MSDU_START_1_IPSEC_ESP_OFFSET 0x00000004 97 #define RX_MSDU_START_1_IPSEC_ESP_LSB 15 98 #define RX_MSDU_START_1_IPSEC_ESP_MASK 0x00008000 99 100 #define RX_MSDU_START_1_L3_OFFSET_OFFSET 0x00000004 101 #define RX_MSDU_START_1_L3_OFFSET_LSB 16 102 #define RX_MSDU_START_1_L3_OFFSET_MASK 0x007f0000 103 104 #define RX_MSDU_START_1_IPSEC_AH_OFFSET 0x00000004 105 #define RX_MSDU_START_1_IPSEC_AH_LSB 23 106 #define RX_MSDU_START_1_IPSEC_AH_MASK 0x00800000 107 108 #define RX_MSDU_START_1_L4_OFFSET_OFFSET 0x00000004 109 #define RX_MSDU_START_1_L4_OFFSET_LSB 24 110 #define RX_MSDU_START_1_L4_OFFSET_MASK 0xff000000 111 112 #define RX_MSDU_START_2_MSDU_NUMBER_OFFSET 0x00000008 113 #define RX_MSDU_START_2_MSDU_NUMBER_LSB 0 114 #define RX_MSDU_START_2_MSDU_NUMBER_MASK 0x000000ff 115 116 #define RX_MSDU_START_2_DECAP_FORMAT_OFFSET 0x00000008 117 #define RX_MSDU_START_2_DECAP_FORMAT_LSB 8 118 #define RX_MSDU_START_2_DECAP_FORMAT_MASK 0x00000300 119 120 #define RX_MSDU_START_2_IPV4_PROTO_OFFSET 0x00000008 121 #define RX_MSDU_START_2_IPV4_PROTO_LSB 10 122 #define RX_MSDU_START_2_IPV4_PROTO_MASK 0x00000400 123 124 #define RX_MSDU_START_2_IPV6_PROTO_OFFSET 0x00000008 125 #define RX_MSDU_START_2_IPV6_PROTO_LSB 11 126 #define RX_MSDU_START_2_IPV6_PROTO_MASK 0x00000800 127 128 #define RX_MSDU_START_2_TCP_PROTO_OFFSET 0x00000008 129 #define RX_MSDU_START_2_TCP_PROTO_LSB 12 130 #define RX_MSDU_START_2_TCP_PROTO_MASK 0x00001000 131 132 #define RX_MSDU_START_2_UDP_PROTO_OFFSET 0x00000008 133 #define RX_MSDU_START_2_UDP_PROTO_LSB 13 134 #define RX_MSDU_START_2_UDP_PROTO_MASK 0x00002000 135 136 #define RX_MSDU_START_2_IP_FRAG_OFFSET 0x00000008 137 #define RX_MSDU_START_2_IP_FRAG_LSB 14 138 #define RX_MSDU_START_2_IP_FRAG_MASK 0x00004000 139 140 #define RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET 0x00000008 141 #define RX_MSDU_START_2_TCP_ONLY_ACK_LSB 15 142 #define RX_MSDU_START_2_TCP_ONLY_ACK_MASK 0x00008000 143 144 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_OFFSET 0x00000008 145 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_LSB 16 146 #define RX_MSDU_START_2_DA_IS_BCAST_MCAST_MASK 0x00010000 147 148 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_OFFSET 0x00000008 149 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_LSB 17 150 #define RX_MSDU_START_2_TOEPLITZ_HASH_SEL_MASK 0x00060000 151 152 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_OFFSET 0x00000008 153 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_LSB 19 154 #define RX_MSDU_START_2_IP_FIXED_HEADER_VALID_MASK 0x00080000 155 156 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_OFFSET 0x00000008 157 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_LSB 20 158 #define RX_MSDU_START_2_IP_EXTN_HEADER_VALID_MASK 0x00100000 159 160 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_OFFSET 0x00000008 161 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_LSB 21 162 #define RX_MSDU_START_2_TCP_UDP_HEADER_VALID_MASK 0x00200000 163 164 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_OFFSET 0x00000008 165 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_LSB 22 166 #define RX_MSDU_START_2_MESH_CONTROL_PRESENT_MASK 0x00400000 167 168 #define RX_MSDU_START_2_LDPC_OFFSET 0x00000008 169 #define RX_MSDU_START_2_LDPC_LSB 23 170 #define RX_MSDU_START_2_LDPC_MASK 0x00800000 171 172 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x00000008 173 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 24 174 #define RX_MSDU_START_2_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0xff000000 175 176 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000c 177 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_LSB 0 178 #define RX_MSDU_START_3_TOEPLITZ_HASH_2_OR_4_MASK 0xffffffff 179 180 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET 0x00000010 181 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB 0 182 #define RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK 0xffffffff 183 184 #define RX_MSDU_START_5_USER_RSSI_OFFSET 0x00000014 185 #define RX_MSDU_START_5_USER_RSSI_LSB 0 186 #define RX_MSDU_START_5_USER_RSSI_MASK 0x000000ff 187 188 #define RX_MSDU_START_5_PKT_TYPE_OFFSET 0x00000014 189 #define RX_MSDU_START_5_PKT_TYPE_LSB 8 190 #define RX_MSDU_START_5_PKT_TYPE_MASK 0x00000f00 191 192 #define RX_MSDU_START_5_STBC_OFFSET 0x00000014 193 #define RX_MSDU_START_5_STBC_LSB 12 194 #define RX_MSDU_START_5_STBC_MASK 0x00001000 195 196 #define RX_MSDU_START_5_SGI_OFFSET 0x00000014 197 #define RX_MSDU_START_5_SGI_LSB 13 198 #define RX_MSDU_START_5_SGI_MASK 0x00006000 199 200 #define RX_MSDU_START_5_RATE_MCS_OFFSET 0x00000014 201 #define RX_MSDU_START_5_RATE_MCS_LSB 15 202 #define RX_MSDU_START_5_RATE_MCS_MASK 0x00078000 203 204 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET 0x00000014 205 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB 19 206 #define RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK 0x00180000 207 208 #define RX_MSDU_START_5_RECEPTION_TYPE_OFFSET 0x00000014 209 #define RX_MSDU_START_5_RECEPTION_TYPE_LSB 21 210 #define RX_MSDU_START_5_RECEPTION_TYPE_MASK 0x00e00000 211 212 #define RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET 0x00000014 213 #define RX_MSDU_START_5_MIMO_SS_BITMAP_LSB 24 214 #define RX_MSDU_START_5_MIMO_SS_BITMAP_MASK 0xff000000 215 216 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_OFFSET 0x00000018 217 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_LSB 0 218 #define RX_MSDU_START_6_PPDU_START_TIMESTAMP_MASK 0xffffffff 219 220 #define RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET 0x0000001c 221 #define RX_MSDU_START_7_SW_PHY_META_DATA_LSB 0 222 #define RX_MSDU_START_7_SW_PHY_META_DATA_MASK 0xffffffff 223 224 #define RX_MSDU_START_8_VLAN_CTAG_CI_OFFSET 0x00000020 225 #define RX_MSDU_START_8_VLAN_CTAG_CI_LSB 0 226 #define RX_MSDU_START_8_VLAN_CTAG_CI_MASK 0x0000ffff 227 228 #define RX_MSDU_START_8_VLAN_STAG_CI_OFFSET 0x00000020 229 #define RX_MSDU_START_8_VLAN_STAG_CI_LSB 16 230 #define RX_MSDU_START_8_VLAN_STAG_CI_MASK 0xffff0000 231 232 #endif 233