1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _REO_UPDATE_RX_REO_QUEUE_H_ 23 #define _REO_UPDATE_RX_REO_QUEUE_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #include "uniform_reo_cmd_header.h" 28 29 #define NUM_OF_DWORDS_REO_UPDATE_RX_REO_QUEUE 9 30 31 struct reo_update_rx_reo_queue { 32 struct uniform_reo_cmd_header cmd_header; 33 uint32_t rx_reo_queue_desc_addr_31_0 : 32; 34 uint32_t rx_reo_queue_desc_addr_39_32 : 8, 35 update_receive_queue_number : 1, 36 update_vld : 1, 37 update_associated_link_descriptor_counter: 1, 38 update_disable_duplicate_detection: 1, 39 update_soft_reorder_enable : 1, 40 update_ac : 1, 41 update_bar : 1, 42 update_rty : 1, 43 update_chk_2k_mode : 1, 44 update_oor_mode : 1, 45 update_ba_window_size : 1, 46 update_pn_check_needed : 1, 47 update_pn_shall_be_even : 1, 48 update_pn_shall_be_uneven : 1, 49 update_pn_handling_enable : 1, 50 update_pn_size : 1, 51 update_ignore_ampdu_flag : 1, 52 update_svld : 1, 53 update_ssn : 1, 54 update_seq_2k_error_detected_flag: 1, 55 update_pn_error_detected_flag : 1, 56 update_pn_valid : 1, 57 update_pn : 1, 58 clear_stat_counters : 1; 59 uint32_t receive_queue_number : 16, 60 vld : 1, 61 associated_link_descriptor_counter: 2, 62 disable_duplicate_detection : 1, 63 soft_reorder_enable : 1, 64 ac : 2, 65 bar : 1, 66 rty : 1, 67 chk_2k_mode : 1, 68 oor_mode : 1, 69 pn_check_needed : 1, 70 pn_shall_be_even : 1, 71 pn_shall_be_uneven : 1, 72 pn_handling_enable : 1, 73 ignore_ampdu_flag : 1; 74 uint32_t ba_window_size : 8, 75 pn_size : 2, 76 svld : 1, 77 ssn : 12, 78 seq_2k_error_detected_flag : 1, 79 pn_error_detected_flag : 1, 80 pn_valid : 1, 81 flush_from_cache : 1, 82 reserved_4a : 5; 83 uint32_t pn_31_0 : 32; 84 uint32_t pn_63_32 : 32; 85 uint32_t pn_95_64 : 32; 86 uint32_t pn_127_96 : 32; 87 }; 88 89 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x00000000 90 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_LSB 0 91 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff 92 93 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET 0x00000000 94 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB 16 95 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK 0x00010000 96 97 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_OFFSET 0x00000000 98 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_LSB 17 99 #define REO_UPDATE_RX_REO_QUEUE_0_CMD_HEADER_RESERVED_0A_MASK 0xfffe0000 100 101 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000004 102 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0 103 #define REO_UPDATE_RX_REO_QUEUE_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff 104 105 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000008 106 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0 107 #define REO_UPDATE_RX_REO_QUEUE_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff 108 109 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_OFFSET 0x00000008 110 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_LSB 8 111 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RECEIVE_QUEUE_NUMBER_MASK 0x00000100 112 113 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_OFFSET 0x00000008 114 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_LSB 9 115 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_VLD_MASK 0x00000200 116 117 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x00000008 118 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 10 119 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00000400 120 121 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_OFFSET 0x00000008 122 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_LSB 11 123 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_DISABLE_DUPLICATE_DETECTION_MASK 0x00000800 124 125 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_OFFSET 0x00000008 126 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_LSB 12 127 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SOFT_REORDER_ENABLE_MASK 0x00001000 128 129 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_OFFSET 0x00000008 130 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_LSB 13 131 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_AC_MASK 0x00002000 132 133 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_OFFSET 0x00000008 134 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_LSB 14 135 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BAR_MASK 0x00004000 136 137 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_OFFSET 0x00000008 138 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_LSB 15 139 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_RTY_MASK 0x00008000 140 141 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_OFFSET 0x00000008 142 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_LSB 16 143 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_CHK_2K_MODE_MASK 0x00010000 144 145 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_OFFSET 0x00000008 146 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_LSB 17 147 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_OOR_MODE_MASK 0x00020000 148 149 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_OFFSET 0x00000008 150 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_LSB 18 151 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_BA_WINDOW_SIZE_MASK 0x00040000 152 153 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_OFFSET 0x00000008 154 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_LSB 19 155 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_CHECK_NEEDED_MASK 0x00080000 156 157 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_OFFSET 0x00000008 158 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_LSB 20 159 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_EVEN_MASK 0x00100000 160 161 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_OFFSET 0x00000008 162 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_LSB 21 163 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SHALL_BE_UNEVEN_MASK 0x00200000 164 165 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_OFFSET 0x00000008 166 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_LSB 22 167 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_HANDLING_ENABLE_MASK 0x00400000 168 169 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_OFFSET 0x00000008 170 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_LSB 23 171 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_SIZE_MASK 0x00800000 172 173 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_OFFSET 0x00000008 174 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_LSB 24 175 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_IGNORE_AMPDU_FLAG_MASK 0x01000000 176 177 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_OFFSET 0x00000008 178 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_LSB 25 179 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SVLD_MASK 0x02000000 180 181 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_OFFSET 0x00000008 182 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_LSB 26 183 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SSN_MASK 0x04000000 184 185 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000008 186 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_LSB 27 187 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x08000000 188 189 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000008 190 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_LSB 28 191 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_ERROR_DETECTED_FLAG_MASK 0x10000000 192 193 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_OFFSET 0x00000008 194 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_LSB 29 195 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_VALID_MASK 0x20000000 196 197 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_OFFSET 0x00000008 198 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_LSB 30 199 #define REO_UPDATE_RX_REO_QUEUE_2_UPDATE_PN_MASK 0x40000000 200 201 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_OFFSET 0x00000008 202 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_LSB 31 203 #define REO_UPDATE_RX_REO_QUEUE_2_CLEAR_STAT_COUNTERS_MASK 0x80000000 204 205 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000000c 206 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_LSB 0 207 #define REO_UPDATE_RX_REO_QUEUE_3_RECEIVE_QUEUE_NUMBER_MASK 0x0000ffff 208 209 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_OFFSET 0x0000000c 210 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_LSB 16 211 #define REO_UPDATE_RX_REO_QUEUE_3_VLD_MASK 0x00010000 212 213 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_OFFSET 0x0000000c 214 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_LSB 17 215 #define REO_UPDATE_RX_REO_QUEUE_3_ASSOCIATED_LINK_DESCRIPTOR_COUNTER_MASK 0x00060000 216 217 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_OFFSET 0x0000000c 218 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_LSB 19 219 #define REO_UPDATE_RX_REO_QUEUE_3_DISABLE_DUPLICATE_DETECTION_MASK 0x00080000 220 221 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_OFFSET 0x0000000c 222 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_LSB 20 223 #define REO_UPDATE_RX_REO_QUEUE_3_SOFT_REORDER_ENABLE_MASK 0x00100000 224 225 #define REO_UPDATE_RX_REO_QUEUE_3_AC_OFFSET 0x0000000c 226 #define REO_UPDATE_RX_REO_QUEUE_3_AC_LSB 21 227 #define REO_UPDATE_RX_REO_QUEUE_3_AC_MASK 0x00600000 228 229 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_OFFSET 0x0000000c 230 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_LSB 23 231 #define REO_UPDATE_RX_REO_QUEUE_3_BAR_MASK 0x00800000 232 233 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_OFFSET 0x0000000c 234 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_LSB 24 235 #define REO_UPDATE_RX_REO_QUEUE_3_RTY_MASK 0x01000000 236 237 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_OFFSET 0x0000000c 238 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_LSB 25 239 #define REO_UPDATE_RX_REO_QUEUE_3_CHK_2K_MODE_MASK 0x02000000 240 241 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_OFFSET 0x0000000c 242 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_LSB 26 243 #define REO_UPDATE_RX_REO_QUEUE_3_OOR_MODE_MASK 0x04000000 244 245 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_OFFSET 0x0000000c 246 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_LSB 27 247 #define REO_UPDATE_RX_REO_QUEUE_3_PN_CHECK_NEEDED_MASK 0x08000000 248 249 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_OFFSET 0x0000000c 250 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_LSB 28 251 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_EVEN_MASK 0x10000000 252 253 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_OFFSET 0x0000000c 254 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_LSB 29 255 #define REO_UPDATE_RX_REO_QUEUE_3_PN_SHALL_BE_UNEVEN_MASK 0x20000000 256 257 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_OFFSET 0x0000000c 258 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_LSB 30 259 #define REO_UPDATE_RX_REO_QUEUE_3_PN_HANDLING_ENABLE_MASK 0x40000000 260 261 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_OFFSET 0x0000000c 262 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_LSB 31 263 #define REO_UPDATE_RX_REO_QUEUE_3_IGNORE_AMPDU_FLAG_MASK 0x80000000 264 265 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_OFFSET 0x00000010 266 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_LSB 0 267 #define REO_UPDATE_RX_REO_QUEUE_4_BA_WINDOW_SIZE_MASK 0x000000ff 268 269 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_OFFSET 0x00000010 270 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_LSB 8 271 #define REO_UPDATE_RX_REO_QUEUE_4_PN_SIZE_MASK 0x00000300 272 273 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_OFFSET 0x00000010 274 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_LSB 10 275 #define REO_UPDATE_RX_REO_QUEUE_4_SVLD_MASK 0x00000400 276 277 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_OFFSET 0x00000010 278 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_LSB 11 279 #define REO_UPDATE_RX_REO_QUEUE_4_SSN_MASK 0x007ff800 280 281 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_OFFSET 0x00000010 282 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_LSB 23 283 #define REO_UPDATE_RX_REO_QUEUE_4_SEQ_2K_ERROR_DETECTED_FLAG_MASK 0x00800000 284 285 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_OFFSET 0x00000010 286 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_LSB 24 287 #define REO_UPDATE_RX_REO_QUEUE_4_PN_ERROR_DETECTED_FLAG_MASK 0x01000000 288 289 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_OFFSET 0x00000010 290 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_LSB 25 291 #define REO_UPDATE_RX_REO_QUEUE_4_PN_VALID_MASK 0x02000000 292 293 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_OFFSET 0x00000010 294 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_LSB 26 295 #define REO_UPDATE_RX_REO_QUEUE_4_FLUSH_FROM_CACHE_MASK 0x04000000 296 297 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_OFFSET 0x00000010 298 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_LSB 27 299 #define REO_UPDATE_RX_REO_QUEUE_4_RESERVED_4A_MASK 0xf8000000 300 301 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_OFFSET 0x00000014 302 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_LSB 0 303 #define REO_UPDATE_RX_REO_QUEUE_5_PN_31_0_MASK 0xffffffff 304 305 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_OFFSET 0x00000018 306 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_LSB 0 307 #define REO_UPDATE_RX_REO_QUEUE_6_PN_63_32_MASK 0xffffffff 308 309 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_OFFSET 0x0000001c 310 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_LSB 0 311 #define REO_UPDATE_RX_REO_QUEUE_7_PN_95_64_MASK 0xffffffff 312 313 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_OFFSET 0x00000020 314 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_LSB 0 315 #define REO_UPDATE_RX_REO_QUEUE_8_PN_127_96_MASK 0xffffffff 316 317 #endif 318