1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _COEX_RX_STATUS_H_ 27 #define _COEX_RX_STATUS_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_COEX_RX_STATUS 2 32 33 #define NUM_OF_QWORDS_COEX_RX_STATUS 1 34 35 36 struct coex_rx_status { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t rx_mac_frame_status : 2, 39 rx_with_tx_response : 1, 40 rx_rate : 5, 41 rx_bw : 3, 42 single_mpdu : 1, 43 filter_status : 1, 44 ampdu : 1, 45 directed : 1, 46 reserved_0 : 1, 47 rx_nss : 3, 48 rx_rssi : 8, 49 rx_type : 3, 50 retry_bit_setting : 1, 51 more_data_bit_setting : 1; 52 uint32_t remain_rx_packet_time : 16, 53 rx_remaining_fes_time : 16; 54 #else 55 uint32_t more_data_bit_setting : 1, 56 retry_bit_setting : 1, 57 rx_type : 3, 58 rx_rssi : 8, 59 rx_nss : 3, 60 reserved_0 : 1, 61 directed : 1, 62 ampdu : 1, 63 filter_status : 1, 64 single_mpdu : 1, 65 rx_bw : 3, 66 rx_rate : 5, 67 rx_with_tx_response : 1, 68 rx_mac_frame_status : 2; 69 uint32_t rx_remaining_fes_time : 16, 70 remain_rx_packet_time : 16; 71 #endif 72 }; 73 74 75 76 77 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_OFFSET 0x0000000000000000 78 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_LSB 0 79 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MSB 1 80 #define COEX_RX_STATUS_RX_MAC_FRAME_STATUS_MASK 0x0000000000000003 81 82 83 84 85 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_OFFSET 0x0000000000000000 86 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_LSB 2 87 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MSB 2 88 #define COEX_RX_STATUS_RX_WITH_TX_RESPONSE_MASK 0x0000000000000004 89 90 91 92 93 #define COEX_RX_STATUS_RX_RATE_OFFSET 0x0000000000000000 94 #define COEX_RX_STATUS_RX_RATE_LSB 3 95 #define COEX_RX_STATUS_RX_RATE_MSB 7 96 #define COEX_RX_STATUS_RX_RATE_MASK 0x00000000000000f8 97 98 99 100 101 #define COEX_RX_STATUS_RX_BW_OFFSET 0x0000000000000000 102 #define COEX_RX_STATUS_RX_BW_LSB 8 103 #define COEX_RX_STATUS_RX_BW_MSB 10 104 #define COEX_RX_STATUS_RX_BW_MASK 0x0000000000000700 105 106 107 108 109 #define COEX_RX_STATUS_SINGLE_MPDU_OFFSET 0x0000000000000000 110 #define COEX_RX_STATUS_SINGLE_MPDU_LSB 11 111 #define COEX_RX_STATUS_SINGLE_MPDU_MSB 11 112 #define COEX_RX_STATUS_SINGLE_MPDU_MASK 0x0000000000000800 113 114 115 116 117 #define COEX_RX_STATUS_FILTER_STATUS_OFFSET 0x0000000000000000 118 #define COEX_RX_STATUS_FILTER_STATUS_LSB 12 119 #define COEX_RX_STATUS_FILTER_STATUS_MSB 12 120 #define COEX_RX_STATUS_FILTER_STATUS_MASK 0x0000000000001000 121 122 123 124 125 #define COEX_RX_STATUS_AMPDU_OFFSET 0x0000000000000000 126 #define COEX_RX_STATUS_AMPDU_LSB 13 127 #define COEX_RX_STATUS_AMPDU_MSB 13 128 #define COEX_RX_STATUS_AMPDU_MASK 0x0000000000002000 129 130 131 132 133 #define COEX_RX_STATUS_DIRECTED_OFFSET 0x0000000000000000 134 #define COEX_RX_STATUS_DIRECTED_LSB 14 135 #define COEX_RX_STATUS_DIRECTED_MSB 14 136 #define COEX_RX_STATUS_DIRECTED_MASK 0x0000000000004000 137 138 139 140 141 #define COEX_RX_STATUS_RESERVED_0_OFFSET 0x0000000000000000 142 #define COEX_RX_STATUS_RESERVED_0_LSB 15 143 #define COEX_RX_STATUS_RESERVED_0_MSB 15 144 #define COEX_RX_STATUS_RESERVED_0_MASK 0x0000000000008000 145 146 147 148 149 #define COEX_RX_STATUS_RX_NSS_OFFSET 0x0000000000000000 150 #define COEX_RX_STATUS_RX_NSS_LSB 16 151 #define COEX_RX_STATUS_RX_NSS_MSB 18 152 #define COEX_RX_STATUS_RX_NSS_MASK 0x0000000000070000 153 154 155 156 157 #define COEX_RX_STATUS_RX_RSSI_OFFSET 0x0000000000000000 158 #define COEX_RX_STATUS_RX_RSSI_LSB 19 159 #define COEX_RX_STATUS_RX_RSSI_MSB 26 160 #define COEX_RX_STATUS_RX_RSSI_MASK 0x0000000007f80000 161 162 163 164 165 #define COEX_RX_STATUS_RX_TYPE_OFFSET 0x0000000000000000 166 #define COEX_RX_STATUS_RX_TYPE_LSB 27 167 #define COEX_RX_STATUS_RX_TYPE_MSB 29 168 #define COEX_RX_STATUS_RX_TYPE_MASK 0x0000000038000000 169 170 171 172 173 #define COEX_RX_STATUS_RETRY_BIT_SETTING_OFFSET 0x0000000000000000 174 #define COEX_RX_STATUS_RETRY_BIT_SETTING_LSB 30 175 #define COEX_RX_STATUS_RETRY_BIT_SETTING_MSB 30 176 #define COEX_RX_STATUS_RETRY_BIT_SETTING_MASK 0x0000000040000000 177 178 179 180 181 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_OFFSET 0x0000000000000000 182 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_LSB 31 183 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MSB 31 184 #define COEX_RX_STATUS_MORE_DATA_BIT_SETTING_MASK 0x0000000080000000 185 186 187 188 189 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_OFFSET 0x0000000000000000 190 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_LSB 32 191 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MSB 47 192 #define COEX_RX_STATUS_REMAIN_RX_PACKET_TIME_MASK 0x0000ffff00000000 193 194 195 196 197 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_OFFSET 0x0000000000000000 198 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_LSB 48 199 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MSB 63 200 #define COEX_RX_STATUS_RX_REMAINING_FES_TIME_MASK 0xffff000000000000 201 202 203 204 #endif 205