1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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25 
26 #ifndef _BUFFER_ADDR_INFO_H_
27 #define _BUFFER_ADDR_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
32 
33 
34 struct buffer_addr_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t buffer_addr_31_0                                        : 32;
37              uint32_t buffer_addr_39_32                                       :  8,
38                       return_buffer_manager                                   :  4,
39                       sw_buffer_cookie                                        : 20;
40 #else
41              uint32_t buffer_addr_31_0                                        : 32;
42              uint32_t sw_buffer_cookie                                        : 20,
43                       return_buffer_manager                                   :  4,
44                       buffer_addr_39_32                                       :  8;
45 #endif
46 };
47 
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50 
51 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET                                    0x00000000
52 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_LSB                                       0
53 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MSB                                       31
54 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MASK                                      0xffffffff
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57 
58 
59 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET                                   0x00000004
60 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_LSB                                      0
61 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MSB                                      7
62 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MASK                                     0x000000ff
63 
64 
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66 
67 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET                               0x00000004
68 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB                                  8
69 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB                                  11
70 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK                                 0x00000f00
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75 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET                                    0x00000004
76 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_LSB                                       12
77 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MSB                                       31
78 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MASK                                      0xfffff000
79 
80 
81 
82 #endif
83