1 
2 /* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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25 
26 #ifndef _TX_RATE_STATS_INFO_H_
27 #define _TX_RATE_STATS_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_TX_RATE_STATS_INFO 2
32 
33 
34 struct tx_rate_stats_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t tx_rate_stats_info_valid                                :  1,
37                       transmit_bw                                             :  3,
38                       transmit_pkt_type                                       :  4,
39                       transmit_stbc                                           :  1,
40                       transmit_ldpc                                           :  1,
41                       transmit_sgi                                            :  2,
42                       transmit_mcs                                            :  4,
43                       ofdma_transmission                                      :  1,
44                       tones_in_ru                                             : 12,
45                       reserved_0a                                             :  3;
46              uint32_t ppdu_transmission_tsf                                   : 32;
47 #else
48              uint32_t reserved_0a                                             :  3,
49                       tones_in_ru                                             : 12,
50                       ofdma_transmission                                      :  1,
51                       transmit_mcs                                            :  4,
52                       transmit_sgi                                            :  2,
53                       transmit_ldpc                                           :  1,
54                       transmit_stbc                                           :  1,
55                       transmit_pkt_type                                       :  4,
56                       transmit_bw                                             :  3,
57                       tx_rate_stats_info_valid                                :  1;
58              uint32_t ppdu_transmission_tsf                                   : 32;
59 #endif
60 };
61 
62 
63 
64 
65 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_OFFSET                          0x00000000
66 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_LSB                             0
67 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_MSB                             0
68 #define TX_RATE_STATS_INFO_TX_RATE_STATS_INFO_VALID_MASK                            0x00000001
69 
70 
71 
72 
73 #define TX_RATE_STATS_INFO_TRANSMIT_BW_OFFSET                                       0x00000000
74 #define TX_RATE_STATS_INFO_TRANSMIT_BW_LSB                                          1
75 #define TX_RATE_STATS_INFO_TRANSMIT_BW_MSB                                          3
76 #define TX_RATE_STATS_INFO_TRANSMIT_BW_MASK                                         0x0000000e
77 
78 
79 
80 
81 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_OFFSET                                 0x00000000
82 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_LSB                                    4
83 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_MSB                                    7
84 #define TX_RATE_STATS_INFO_TRANSMIT_PKT_TYPE_MASK                                   0x000000f0
85 
86 
87 
88 
89 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_OFFSET                                     0x00000000
90 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_LSB                                        8
91 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_MSB                                        8
92 #define TX_RATE_STATS_INFO_TRANSMIT_STBC_MASK                                       0x00000100
93 
94 
95 
96 
97 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_OFFSET                                     0x00000000
98 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_LSB                                        9
99 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_MSB                                        9
100 #define TX_RATE_STATS_INFO_TRANSMIT_LDPC_MASK                                       0x00000200
101 
102 
103 
104 
105 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_OFFSET                                      0x00000000
106 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_LSB                                         10
107 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_MSB                                         11
108 #define TX_RATE_STATS_INFO_TRANSMIT_SGI_MASK                                        0x00000c00
109 
110 
111 
112 
113 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_OFFSET                                      0x00000000
114 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_LSB                                         12
115 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_MSB                                         15
116 #define TX_RATE_STATS_INFO_TRANSMIT_MCS_MASK                                        0x0000f000
117 
118 
119 
120 
121 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_OFFSET                                0x00000000
122 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_LSB                                   16
123 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_MSB                                   16
124 #define TX_RATE_STATS_INFO_OFDMA_TRANSMISSION_MASK                                  0x00010000
125 
126 
127 
128 
129 #define TX_RATE_STATS_INFO_TONES_IN_RU_OFFSET                                       0x00000000
130 #define TX_RATE_STATS_INFO_TONES_IN_RU_LSB                                          17
131 #define TX_RATE_STATS_INFO_TONES_IN_RU_MSB                                          28
132 #define TX_RATE_STATS_INFO_TONES_IN_RU_MASK                                         0x1ffe0000
133 
134 
135 
136 
137 #define TX_RATE_STATS_INFO_RESERVED_0A_OFFSET                                       0x00000000
138 #define TX_RATE_STATS_INFO_RESERVED_0A_LSB                                          29
139 #define TX_RATE_STATS_INFO_RESERVED_0A_MSB                                          31
140 #define TX_RATE_STATS_INFO_RESERVED_0A_MASK                                         0xe0000000
141 
142 
143 
144 
145 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_OFFSET                             0x00000004
146 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_LSB                                0
147 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_MSB                                31
148 #define TX_RATE_STATS_INFO_PPDU_TRANSMISSION_TSF_MASK                               0xffffffff
149 
150 
151 
152 #endif
153