1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _TX_FES_STATUS_START_H_ 27 #define _TX_FES_STATUS_START_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_TX_FES_STATUS_START 4 32 33 #define NUM_OF_QWORDS_TX_FES_STATUS_START 2 34 35 36 struct tx_fes_status_start { 37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 38 uint32_t schedule_id : 32; 39 uint32_t reserved_1a : 8, 40 transmit_start_reason : 3, 41 disabled_user_bitmap_36_32 : 5, 42 schedule_cmd_ring_id : 5, 43 fes_control_mode : 2, 44 schedule_try : 4, 45 medium_prot_type : 3, 46 reserved_1b : 2; 47 uint32_t optimal_bw_try_count : 4, 48 number_of_users : 7, 49 coex_nack_count : 5, 50 cca_ed0 : 16; 51 uint32_t disabled_user_bitmap_31_0 : 32; 52 #else 53 uint32_t schedule_id : 32; 54 uint32_t reserved_1b : 2, 55 medium_prot_type : 3, 56 schedule_try : 4, 57 fes_control_mode : 2, 58 schedule_cmd_ring_id : 5, 59 disabled_user_bitmap_36_32 : 5, 60 transmit_start_reason : 3, 61 reserved_1a : 8; 62 uint32_t cca_ed0 : 16, 63 coex_nack_count : 5, 64 number_of_users : 7, 65 optimal_bw_try_count : 4; 66 uint32_t disabled_user_bitmap_31_0 : 32; 67 #endif 68 }; 69 70 71 72 73 #define TX_FES_STATUS_START_SCHEDULE_ID_OFFSET 0x0000000000000000 74 #define TX_FES_STATUS_START_SCHEDULE_ID_LSB 0 75 #define TX_FES_STATUS_START_SCHEDULE_ID_MSB 31 76 #define TX_FES_STATUS_START_SCHEDULE_ID_MASK 0x00000000ffffffff 77 78 79 80 81 #define TX_FES_STATUS_START_RESERVED_1A_OFFSET 0x0000000000000000 82 #define TX_FES_STATUS_START_RESERVED_1A_LSB 32 83 #define TX_FES_STATUS_START_RESERVED_1A_MSB 39 84 #define TX_FES_STATUS_START_RESERVED_1A_MASK 0x000000ff00000000 85 86 87 88 89 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_OFFSET 0x0000000000000000 90 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_LSB 40 91 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MSB 42 92 #define TX_FES_STATUS_START_TRANSMIT_START_REASON_MASK 0x0000070000000000 93 94 95 96 97 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_OFFSET 0x0000000000000000 98 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_LSB 43 99 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MSB 47 100 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_36_32_MASK 0x0000f80000000000 101 102 103 104 105 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_OFFSET 0x0000000000000000 106 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_LSB 48 107 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MSB 52 108 #define TX_FES_STATUS_START_SCHEDULE_CMD_RING_ID_MASK 0x001f000000000000 109 110 111 112 113 #define TX_FES_STATUS_START_FES_CONTROL_MODE_OFFSET 0x0000000000000000 114 #define TX_FES_STATUS_START_FES_CONTROL_MODE_LSB 53 115 #define TX_FES_STATUS_START_FES_CONTROL_MODE_MSB 54 116 #define TX_FES_STATUS_START_FES_CONTROL_MODE_MASK 0x0060000000000000 117 118 119 120 121 #define TX_FES_STATUS_START_SCHEDULE_TRY_OFFSET 0x0000000000000000 122 #define TX_FES_STATUS_START_SCHEDULE_TRY_LSB 55 123 #define TX_FES_STATUS_START_SCHEDULE_TRY_MSB 58 124 #define TX_FES_STATUS_START_SCHEDULE_TRY_MASK 0x0780000000000000 125 126 127 128 129 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000 130 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_LSB 59 131 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MSB 61 132 #define TX_FES_STATUS_START_MEDIUM_PROT_TYPE_MASK 0x3800000000000000 133 134 135 136 137 #define TX_FES_STATUS_START_RESERVED_1B_OFFSET 0x0000000000000000 138 #define TX_FES_STATUS_START_RESERVED_1B_LSB 62 139 #define TX_FES_STATUS_START_RESERVED_1B_MSB 63 140 #define TX_FES_STATUS_START_RESERVED_1B_MASK 0xc000000000000000 141 142 143 144 145 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_OFFSET 0x0000000000000008 146 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_LSB 0 147 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MSB 3 148 #define TX_FES_STATUS_START_OPTIMAL_BW_TRY_COUNT_MASK 0x000000000000000f 149 150 151 152 153 #define TX_FES_STATUS_START_NUMBER_OF_USERS_OFFSET 0x0000000000000008 154 #define TX_FES_STATUS_START_NUMBER_OF_USERS_LSB 4 155 #define TX_FES_STATUS_START_NUMBER_OF_USERS_MSB 10 156 #define TX_FES_STATUS_START_NUMBER_OF_USERS_MASK 0x00000000000007f0 157 158 159 160 161 #define TX_FES_STATUS_START_COEX_NACK_COUNT_OFFSET 0x0000000000000008 162 #define TX_FES_STATUS_START_COEX_NACK_COUNT_LSB 11 163 #define TX_FES_STATUS_START_COEX_NACK_COUNT_MSB 15 164 #define TX_FES_STATUS_START_COEX_NACK_COUNT_MASK 0x000000000000f800 165 166 167 168 169 #define TX_FES_STATUS_START_CCA_ED0_OFFSET 0x0000000000000008 170 #define TX_FES_STATUS_START_CCA_ED0_LSB 16 171 #define TX_FES_STATUS_START_CCA_ED0_MSB 31 172 #define TX_FES_STATUS_START_CCA_ED0_MASK 0x00000000ffff0000 173 174 175 176 177 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_OFFSET 0x0000000000000008 178 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_LSB 32 179 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MSB 63 180 #define TX_FES_STATUS_START_DISABLED_USER_BITMAP_31_0_MASK 0xffffffff00000000 181 182 183 184 #endif 185