1  
2  /* Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved.
3   *
4   * Permission to use, copy, modify, and/or distribute this software for any
5   * purpose with or without fee is hereby granted, provided that the above
6   * copyright notice and this permission notice appear in all copies.
7   *
8   * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9   * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10   * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11   * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12   * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13   * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15   */
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25  
26  #ifndef _REO_ENTRANCE_RING_H_
27  #define _REO_ENTRANCE_RING_H_
28  #if !defined(__ASSEMBLER__)
29  #endif
30  
31  #include "rx_mpdu_details.h"
32  #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
33  
34  
35  struct reo_entrance_ring {
36  #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
37               struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
38               uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
39               uint32_t rx_reo_queue_desc_addr_39_32                            :  8,
40                        rounded_mpdu_byte_count                                 : 14,
41                        reo_destination_indication                              :  5,
42                        frameless_bar                                           :  1,
43                        reserved_5a                                             :  4;
44               uint32_t rxdma_push_reason                                       :  2,
45                        rxdma_error_code                                        :  5,
46                        mpdu_fragment_number                                    :  4,
47                        sw_exception                                            :  1,
48                        sw_exception_mpdu_delink                                :  1,
49                        sw_exception_destination_ring_valid                     :  1,
50                        sw_exception_destination_ring                           :  5,
51                        mpdu_sequence_number                                    : 12,
52                        reserved_6a                                             :  1;
53               uint32_t phy_ppdu_id                                             : 16,
54                        src_link_id                                             :  3,
55                        reserved_7a                                             :  1,
56                        ring_id                                                 :  8,
57                        looping_count                                           :  4;
58  #else
59               struct   rx_mpdu_details                                           reo_level_mpdu_frame_info;
60               uint32_t rx_reo_queue_desc_addr_31_0                             : 32;
61               uint32_t reserved_5a                                             :  4,
62                        frameless_bar                                           :  1,
63                        reo_destination_indication                              :  5,
64                        rounded_mpdu_byte_count                                 : 14,
65                        rx_reo_queue_desc_addr_39_32                            :  8;
66               uint32_t reserved_6a                                             :  1,
67                        mpdu_sequence_number                                    : 12,
68                        sw_exception_destination_ring                           :  5,
69                        sw_exception_destination_ring_valid                     :  1,
70                        sw_exception_mpdu_delink                                :  1,
71                        sw_exception                                            :  1,
72                        mpdu_fragment_number                                    :  4,
73                        rxdma_error_code                                        :  5,
74                        rxdma_push_reason                                       :  2;
75               uint32_t looping_count                                           :  4,
76                        ring_id                                                 :  8,
77                        reserved_7a                                             :  1,
78                        src_link_id                                             :  3,
79                        phy_ppdu_id                                             : 16;
80  #endif
81  };
82  
83  
84  
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88  
89  
90  
91  
92  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
93  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
94  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
95  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
96  
97  
98  
99  
100  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
101  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
102  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
103  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
104  
105  
106  
107  
108  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
109  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
110  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
111  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
112  
113  
114  
115  
116  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
117  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
118  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
119  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
120  
121  
122  
123  
124  
125  
126  
127  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
128  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
129  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7
130  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
131  
132  
133  
134  
135  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
136  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8
137  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8
138  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100
139  
140  
141  
142  
143  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
144  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9
145  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9
146  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200
147  
148  
149  
150  
151  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
152  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10
153  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10
154  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400
155  
156  
157  
158  
159  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
160  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11
161  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11
162  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800
163  
164  
165  
166  
167  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
168  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12
169  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12
170  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000
171  
172  
173  
174  
175  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
176  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13
177  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13
178  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000
179  
180  
181  
182  
183  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
184  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14
185  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14
186  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000
187  
188  
189  
190  
191  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008
192  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15
193  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26
194  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000
195  
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197  
198  
199  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008
200  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27
201  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27
202  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000
203  
204  
205  
206  
207  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008
208  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28
209  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31
210  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000
211  
212  
213  
214  
215  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
216  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
217  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31
218  #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
219  
220  
221  
222  
223  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET                        0x00000010
224  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB                           0
225  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB                           31
226  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK                          0xffffffff
227  
228  
229  
230  
231  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET                       0x00000014
232  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB                          0
233  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB                          7
234  #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK                         0x000000ff
235  
236  
237  
238  
239  #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET                            0x00000014
240  #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB                               8
241  #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB                               21
242  #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK                              0x003fff00
243  
244  
245  
246  
247  #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET                         0x00000014
248  #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB                            22
249  #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB                            26
250  #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK                           0x07c00000
251  
252  
253  
254  
255  #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET                                      0x00000014
256  #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB                                         27
257  #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB                                         27
258  #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK                                        0x08000000
259  
260  
261  
262  
263  #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET                                        0x00000014
264  #define REO_ENTRANCE_RING_RESERVED_5A_LSB                                           28
265  #define REO_ENTRANCE_RING_RESERVED_5A_MSB                                           31
266  #define REO_ENTRANCE_RING_RESERVED_5A_MASK                                          0xf0000000
267  
268  
269  
270  
271  #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET                                  0x00000018
272  #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB                                     0
273  #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB                                     1
274  #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK                                    0x00000003
275  
276  
277  
278  
279  #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET                                   0x00000018
280  #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB                                      2
281  #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB                                      6
282  #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK                                     0x0000007c
283  
284  
285  
286  
287  #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET                               0x00000018
288  #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB                                  7
289  #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB                                  10
290  #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK                                 0x00000780
291  
292  
293  
294  
295  #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET                                       0x00000018
296  #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB                                          11
297  #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB                                          11
298  #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK                                         0x00000800
299  
300  
301  
302  
303  #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET                           0x00000018
304  #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB                              12
305  #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB                              12
306  #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK                             0x00001000
307  
308  
309  
310  
311  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET                0x00000018
312  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB                   13
313  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB                   13
314  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK                  0x00002000
315  
316  
317  
318  
319  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET                      0x00000018
320  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB                         14
321  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB                         18
322  #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK                        0x0007c000
323  
324  
325  
326  
327  #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET                               0x00000018
328  #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB                                  19
329  #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB                                  30
330  #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK                                 0x7ff80000
331  
332  
333  
334  
335  #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET                                        0x00000018
336  #define REO_ENTRANCE_RING_RESERVED_6A_LSB                                           31
337  #define REO_ENTRANCE_RING_RESERVED_6A_MSB                                           31
338  #define REO_ENTRANCE_RING_RESERVED_6A_MASK                                          0x80000000
339  
340  
341  
342  
343  #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET                                        0x0000001c
344  #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB                                           0
345  #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB                                           15
346  #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK                                          0x0000ffff
347  
348  
349  
350  
351  #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET                                        0x0000001c
352  #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB                                           16
353  #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB                                           18
354  #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK                                          0x00070000
355  
356  
357  
358  
359  #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET                                        0x0000001c
360  #define REO_ENTRANCE_RING_RESERVED_7A_LSB                                           19
361  #define REO_ENTRANCE_RING_RESERVED_7A_MSB                                           19
362  #define REO_ENTRANCE_RING_RESERVED_7A_MASK                                          0x00080000
363  
364  
365  
366  
367  #define REO_ENTRANCE_RING_RING_ID_OFFSET                                            0x0000001c
368  #define REO_ENTRANCE_RING_RING_ID_LSB                                               20
369  #define REO_ENTRANCE_RING_RING_ID_MSB                                               27
370  #define REO_ENTRANCE_RING_RING_ID_MASK                                              0x0ff00000
371  
372  
373  
374  
375  #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET                                      0x0000001c
376  #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB                                         28
377  #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB                                         31
378  #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK                                        0xf0000000
379  
380  
381  
382  #endif
383