1 /*
2  * Copyright (c) 2019, The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _REO_GET_QUEUE_STATS_H_
18 #define _REO_GET_QUEUE_STATS_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #include "uniform_reo_cmd_header.h"
23 
24 // ################ START SUMMARY #################
25 //
26 //	Dword	Fields
27 //	0	struct uniform_reo_cmd_header cmd_header;
28 //	1	rx_reo_queue_desc_addr_31_0[31:0]
29 //	2	rx_reo_queue_desc_addr_39_32[7:0], clear_stats[8], reserved_2a[31:9]
30 //	3	reserved_3a[31:0]
31 //	4	reserved_4a[31:0]
32 //	5	reserved_5a[31:0]
33 //	6	reserved_6a[31:0]
34 //	7	reserved_7a[31:0]
35 //	8	reserved_8a[31:0]
36 //
37 // ################ END SUMMARY #################
38 
39 #define NUM_OF_DWORDS_REO_GET_QUEUE_STATS 9
40 
41 struct reo_get_queue_stats {
42     struct            uniform_reo_cmd_header                       cmd_header;
43              uint32_t rx_reo_queue_desc_addr_31_0     : 32; //[31:0]
44              uint32_t rx_reo_queue_desc_addr_39_32    :  8, //[7:0]
45                       clear_stats                     :  1, //[8]
46                       reserved_2a                     : 23; //[31:9]
47              uint32_t reserved_3a                     : 32; //[31:0]
48              uint32_t reserved_4a                     : 32; //[31:0]
49              uint32_t reserved_5a                     : 32; //[31:0]
50              uint32_t reserved_6a                     : 32; //[31:0]
51              uint32_t reserved_7a                     : 32; //[31:0]
52              uint32_t reserved_8a                     : 32; //[31:0]
53 };
54 
55 /*
56 
57 struct uniform_reo_cmd_header cmd_header
58 
59 			Consumer: REO
60 
61 			Producer: SW
62 
63 
64 
65 			Details for command execution tracking purposes.
66 
67 rx_reo_queue_desc_addr_31_0
68 
69 			Consumer: REO
70 
71 			Producer: SW
72 
73 
74 
75 			Address (lower 32 bits) of the REO queue descriptor
76 
77 			<legal all>
78 
79 rx_reo_queue_desc_addr_39_32
80 
81 			Consumer: REO
82 
83 			Producer: SW
84 
85 
86 
87 			Address (upper 8 bits) of the REO queue descriptor
88 
89 			<legal all>
90 
91 clear_stats
92 
93 			Clear stat settings....
94 
95 
96 
97 			<enum 0 no_clear> Do NOT clear the stats after
98 			generating the status
99 
100 			<enum 1 clear_the_stats> Clear the stats after
101 			generating the status.
102 
103 
104 
105 			The stats actually cleared are:
106 
107 			Timeout_count
108 
109 			Forward_due_to_bar_count
110 
111 			Duplicate_count
112 
113 			Frames_in_order_count
114 
115 			BAR_received_count
116 
117 			MPDU_Frames_processed_count
118 
119 			MSDU_Frames_processed_count
120 
121 			Total_processed_byte_count
122 
123 			Late_receive_MPDU_count
124 
125 			window_jump_2k
126 
127 			Hole_count
128 
129 			<legal 0-1>
130 
131 reserved_2a
132 
133 			<legal 0>
134 
135 reserved_3a
136 
137 			<legal 0>
138 
139 reserved_4a
140 
141 			<legal 0>
142 
143 reserved_5a
144 
145 			<legal 0>
146 
147 reserved_6a
148 
149 			<legal 0>
150 
151 reserved_7a
152 
153 			<legal 0>
154 
155 reserved_8a
156 
157 			<legal 0>
158 */
159 
160 
161  /* EXTERNAL REFERENCE : struct uniform_reo_cmd_header cmd_header */
162 
163 
164 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER
165 
166 			Consumer: REO/SW/DEBUG
167 
168 			Producer: SW
169 
170 
171 
172 			This number can be used by SW to track, identify and
173 			link the created commands with the command statusses
174 
175 
176 
177 
178 
179 			<legal all>
180 */
181 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_OFFSET       0x00000000
182 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_LSB          0
183 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_CMD_NUMBER_MASK         0x0000ffff
184 
185 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED
186 
187 			Consumer: REO
188 
189 			Producer: SW
190 
191 
192 
193 			<enum 0 NoStatus> REO does not need to generate a status
194 			TLV for the execution of this command
195 
196 			<enum 1 StatusRequired> REO shall generate a status TLV
197 			for the execution of this command
198 
199 
200 
201 			<legal all>
202 */
203 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET  0x00000000
204 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_LSB     16
205 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_REO_STATUS_REQUIRED_MASK    0x00010000
206 
207 /* Description		REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A
208 
209 			<legal 0>
210 */
211 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_OFFSET          0x00000000
212 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_LSB             17
213 #define REO_GET_QUEUE_STATS_0_CMD_HEADER_RESERVED_0A_MASK            0xfffe0000
214 
215 /* Description		REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0
216 
217 			Consumer: REO
218 
219 			Producer: SW
220 
221 
222 
223 			Address (lower 32 bits) of the REO queue descriptor
224 
225 			<legal all>
226 */
227 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET     0x00000004
228 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_LSB        0
229 #define REO_GET_QUEUE_STATS_1_RX_REO_QUEUE_DESC_ADDR_31_0_MASK       0xffffffff
230 
231 /* Description		REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32
232 
233 			Consumer: REO
234 
235 			Producer: SW
236 
237 
238 
239 			Address (upper 8 bits) of the REO queue descriptor
240 
241 			<legal all>
242 */
243 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET    0x00000008
244 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_LSB       0
245 #define REO_GET_QUEUE_STATS_2_RX_REO_QUEUE_DESC_ADDR_39_32_MASK      0x000000ff
246 
247 /* Description		REO_GET_QUEUE_STATS_2_CLEAR_STATS
248 
249 			Clear stat settings....
250 
251 
252 
253 			<enum 0 no_clear> Do NOT clear the stats after
254 			generating the status
255 
256 			<enum 1 clear_the_stats> Clear the stats after
257 			generating the status.
258 
259 
260 
261 			The stats actually cleared are:
262 
263 			Timeout_count
264 
265 			Forward_due_to_bar_count
266 
267 			Duplicate_count
268 
269 			Frames_in_order_count
270 
271 			BAR_received_count
272 
273 			MPDU_Frames_processed_count
274 
275 			MSDU_Frames_processed_count
276 
277 			Total_processed_byte_count
278 
279 			Late_receive_MPDU_count
280 
281 			window_jump_2k
282 
283 			Hole_count
284 
285 			<legal 0-1>
286 */
287 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_OFFSET                     0x00000008
288 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_LSB                        8
289 #define REO_GET_QUEUE_STATS_2_CLEAR_STATS_MASK                       0x00000100
290 
291 /* Description		REO_GET_QUEUE_STATS_2_RESERVED_2A
292 
293 			<legal 0>
294 */
295 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_OFFSET                     0x00000008
296 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_LSB                        9
297 #define REO_GET_QUEUE_STATS_2_RESERVED_2A_MASK                       0xfffffe00
298 
299 /* Description		REO_GET_QUEUE_STATS_3_RESERVED_3A
300 
301 			<legal 0>
302 */
303 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_OFFSET                     0x0000000c
304 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_LSB                        0
305 #define REO_GET_QUEUE_STATS_3_RESERVED_3A_MASK                       0xffffffff
306 
307 /* Description		REO_GET_QUEUE_STATS_4_RESERVED_4A
308 
309 			<legal 0>
310 */
311 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_OFFSET                     0x00000010
312 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_LSB                        0
313 #define REO_GET_QUEUE_STATS_4_RESERVED_4A_MASK                       0xffffffff
314 
315 /* Description		REO_GET_QUEUE_STATS_5_RESERVED_5A
316 
317 			<legal 0>
318 */
319 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_OFFSET                     0x00000014
320 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_LSB                        0
321 #define REO_GET_QUEUE_STATS_5_RESERVED_5A_MASK                       0xffffffff
322 
323 /* Description		REO_GET_QUEUE_STATS_6_RESERVED_6A
324 
325 			<legal 0>
326 */
327 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_OFFSET                     0x00000018
328 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_LSB                        0
329 #define REO_GET_QUEUE_STATS_6_RESERVED_6A_MASK                       0xffffffff
330 
331 /* Description		REO_GET_QUEUE_STATS_7_RESERVED_7A
332 
333 			<legal 0>
334 */
335 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_OFFSET                     0x0000001c
336 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_LSB                        0
337 #define REO_GET_QUEUE_STATS_7_RESERVED_7A_MASK                       0xffffffff
338 
339 /* Description		REO_GET_QUEUE_STATS_8_RESERVED_8A
340 
341 			<legal 0>
342 */
343 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_OFFSET                     0x00000020
344 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_LSB                        0
345 #define REO_GET_QUEUE_STATS_8_RESERVED_8A_MASK                       0xffffffff
346 
347 
348 #endif // _REO_GET_QUEUE_STATS_H_
349