1 /* 2 * Copyright (c) 2019, The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _PHYRX_ABORT_REQUEST_INFO_H_ 18 #define _PHYRX_ABORT_REQUEST_INFO_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 23 // ################ START SUMMARY ################# 24 // 25 // Dword Fields 26 // 0 phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16] 27 // 28 // ################ END SUMMARY ################# 29 30 #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1 31 32 struct phyrx_abort_request_info { 33 uint32_t phyrx_abort_reason : 8, //[7:0] 34 phy_enters_nap_state : 1, //[8] 35 phy_enters_defer_state : 1, //[9] 36 reserved_0 : 6, //[15:10] 37 receive_duration : 16; //[31:16] 38 }; 39 40 /* 41 42 phyrx_abort_reason 43 44 <enum 0 phyrx_err_phy_off> Reception aborted due to 45 receiving a PHY_OFF TLV 46 47 <enum 1 phyrx_err_synth_off> 48 49 <enum 2 phyrx_err_ofdma_timing> 50 51 <enum 3 phyrx_err_ofdma_signal_parity> 52 53 <enum 4 phyrx_err_ofdma_rate_illegal> 54 55 <enum 5 phyrx_err_ofdma_length_illegal> 56 57 <enum 6 phyrx_err_ofdma_restart> 58 59 <enum 7 phyrx_err_ofdma_service> 60 61 <enum 8 phyrx_err_ppdu_ofdma_power_drop> 62 63 64 65 <enum 9 phyrx_err_cck_blokker> 66 67 <enum 10 phyrx_err_cck_timing> 68 69 <enum 11 phyrx_err_cck_header_crc> 70 71 <enum 12 phyrx_err_cck_rate_illegal> 72 73 <enum 13 phyrx_err_cck_length_illegal> 74 75 <enum 14 phyrx_err_cck_restart> 76 77 <enum 15 phyrx_err_cck_service> 78 79 <enum 16 phyrx_err_cck_power_drop> 80 81 82 83 <enum 17 phyrx_err_ht_crc_err> 84 85 <enum 18 phyrx_err_ht_length_illegal> 86 87 <enum 19 phyrx_err_ht_rate_illegal> 88 89 <enum 20 phyrx_err_ht_zlf> 90 91 <enum 21 phyrx_err_false_radar_ext> 92 93 94 95 <enum 22 phyrx_err_green_field> 96 97 98 99 <enum 23 phyrx_err_bw_gt_dyn_bw> 100 101 <enum 24 phyrx_err_leg_ht_mismatch> 102 103 <enum 25 phyrx_err_vht_crc_error> 104 105 <enum 26 phyrx_err_vht_siga_unsupported> 106 107 <enum 27 phyrx_err_vht_lsig_len_invalid> 108 109 <enum 28 phyrx_err_vht_ndp_or_zlf> 110 111 <enum 29 phyrx_err_vht_nsym_lt_zero> 112 113 <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 114 115 <enum 31 phyrx_err_vht_rx_skip_group_id0> 116 117 <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 118 119 <enum 33 phyrx_err_vht_rx_skip_group_id63> 120 121 <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 122 123 <enum 35 phyrx_err_defer_nap> 124 125 <enum 36 phyrx_err_fdomain_timeout> 126 127 <enum 37 phyrx_err_lsig_rel_check> 128 129 <enum 38 phyrx_err_bt_collision> 130 131 <enum 39 phyrx_err_unsupported_mu_feedback> 132 133 <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 134 135 <enum 41 phyrx_err_unsupported_cbf> 136 137 138 139 <enum 42 phyrx_err_other> Should not really be used. If 140 needed, ask for documentation update 141 142 143 144 <enum 43 phyrx_err_he_siga_unsupported > <enum 44 145 phyrx_err_he_crc_error > <enum 45 146 phyrx_err_he_sigb_unsupported > <enum 46 147 phyrx_err_he_mu_mode_unsupported > <enum 47 148 phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 149 > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 150 phyrx_err_he_num_users_unsupported ><enum 51 151 phyrx_err_he_sounding_params_unsupported > 152 153 154 155 <enum 52 phyrx_err_MU_UL_no_power_detected> 156 157 <enum 53 phyrx_err_MU_UL_not_for_me> 158 159 160 161 <legal 0 - 53> 162 163 phy_enters_nap_state 164 165 When set, PHY enters PHY NAP state after sending this 166 abort 167 168 169 170 Note that nap and defer state are mutually exclusive. 171 172 173 174 Field put pro-actively in place....usage still to be 175 agreed upon. 176 177 <legal all> 178 179 phy_enters_defer_state 180 181 When set, PHY enters PHY defer state after sending this 182 abort 183 184 185 186 Note that nap and defer state are mutually exclusive. 187 188 189 190 Field put pro-actively in place....usage still to be 191 agreed upon. 192 193 <legal all> 194 195 reserved_0 196 197 <legal 0> 198 199 receive_duration 200 201 The remaining receive duration of this PPDU in the 202 medium (in us). When PHY does not know this duration when 203 this TLV is generated, the field will be set to 0. 204 205 The timing reference point is the reception by the MAC 206 of this TLV. The value shall be accurate to within 2us. 207 208 209 210 In case Phy_enters_nap_state and/or 211 Phy_enters_defer_state is set, there is a possibility that 212 MAC PMM can also decide to go into a low(er) power state. 213 214 <legal all> 215 */ 216 217 218 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON 219 220 <enum 0 phyrx_err_phy_off> Reception aborted due to 221 receiving a PHY_OFF TLV 222 223 <enum 1 phyrx_err_synth_off> 224 225 <enum 2 phyrx_err_ofdma_timing> 226 227 <enum 3 phyrx_err_ofdma_signal_parity> 228 229 <enum 4 phyrx_err_ofdma_rate_illegal> 230 231 <enum 5 phyrx_err_ofdma_length_illegal> 232 233 <enum 6 phyrx_err_ofdma_restart> 234 235 <enum 7 phyrx_err_ofdma_service> 236 237 <enum 8 phyrx_err_ppdu_ofdma_power_drop> 238 239 240 241 <enum 9 phyrx_err_cck_blokker> 242 243 <enum 10 phyrx_err_cck_timing> 244 245 <enum 11 phyrx_err_cck_header_crc> 246 247 <enum 12 phyrx_err_cck_rate_illegal> 248 249 <enum 13 phyrx_err_cck_length_illegal> 250 251 <enum 14 phyrx_err_cck_restart> 252 253 <enum 15 phyrx_err_cck_service> 254 255 <enum 16 phyrx_err_cck_power_drop> 256 257 258 259 <enum 17 phyrx_err_ht_crc_err> 260 261 <enum 18 phyrx_err_ht_length_illegal> 262 263 <enum 19 phyrx_err_ht_rate_illegal> 264 265 <enum 20 phyrx_err_ht_zlf> 266 267 <enum 21 phyrx_err_false_radar_ext> 268 269 270 271 <enum 22 phyrx_err_green_field> 272 273 274 275 <enum 23 phyrx_err_bw_gt_dyn_bw> 276 277 <enum 24 phyrx_err_leg_ht_mismatch> 278 279 <enum 25 phyrx_err_vht_crc_error> 280 281 <enum 26 phyrx_err_vht_siga_unsupported> 282 283 <enum 27 phyrx_err_vht_lsig_len_invalid> 284 285 <enum 28 phyrx_err_vht_ndp_or_zlf> 286 287 <enum 29 phyrx_err_vht_nsym_lt_zero> 288 289 <enum 30 phyrx_err_vht_rx_extra_symbol_mismatch> 290 291 <enum 31 phyrx_err_vht_rx_skip_group_id0> 292 293 <enum 32 phyrx_err_vht_rx_skip_group_id1to62> 294 295 <enum 33 phyrx_err_vht_rx_skip_group_id63> 296 297 <enum 34 phyrx_err_ofdm_ldpc_decoder_disabled> 298 299 <enum 35 phyrx_err_defer_nap> 300 301 <enum 36 phyrx_err_fdomain_timeout> 302 303 <enum 37 phyrx_err_lsig_rel_check> 304 305 <enum 38 phyrx_err_bt_collision> 306 307 <enum 39 phyrx_err_unsupported_mu_feedback> 308 309 <enum 40 phyrx_err_ppdu_tx_interrupt_rx> 310 311 <enum 41 phyrx_err_unsupported_cbf> 312 313 314 315 <enum 42 phyrx_err_other> Should not really be used. If 316 needed, ask for documentation update 317 318 319 320 <enum 43 phyrx_err_he_siga_unsupported > <enum 44 321 phyrx_err_he_crc_error > <enum 45 322 phyrx_err_he_sigb_unsupported > <enum 46 323 phyrx_err_he_mu_mode_unsupported > <enum 47 324 phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero 325 > <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50 326 phyrx_err_he_num_users_unsupported ><enum 51 327 phyrx_err_he_sounding_params_unsupported > 328 329 330 331 <enum 52 phyrx_err_MU_UL_no_power_detected> 332 333 <enum 53 phyrx_err_MU_UL_not_for_me> 334 335 336 337 <legal 0 - 53> 338 */ 339 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET 0x00000000 340 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB 0 341 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK 0x000000ff 342 343 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE 344 345 When set, PHY enters PHY NAP state after sending this 346 abort 347 348 349 350 Note that nap and defer state are mutually exclusive. 351 352 353 354 Field put pro-actively in place....usage still to be 355 agreed upon. 356 357 <legal all> 358 */ 359 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET 0x00000000 360 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB 8 361 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK 0x00000100 362 363 /* Description PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE 364 365 When set, PHY enters PHY defer state after sending this 366 abort 367 368 369 370 Note that nap and defer state are mutually exclusive. 371 372 373 374 Field put pro-actively in place....usage still to be 375 agreed upon. 376 377 <legal all> 378 */ 379 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET 0x00000000 380 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB 9 381 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK 0x00000200 382 383 /* Description PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0 384 385 <legal 0> 386 */ 387 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET 0x00000000 388 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB 10 389 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK 0x0000fc00 390 391 /* Description PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION 392 393 The remaining receive duration of this PPDU in the 394 medium (in us). When PHY does not know this duration when 395 this TLV is generated, the field will be set to 0. 396 397 The timing reference point is the reception by the MAC 398 of this TLV. The value shall be accurate to within 2us. 399 400 401 402 In case Phy_enters_nap_state and/or 403 Phy_enters_defer_state is set, there is a possibility that 404 MAC PMM can also decide to go into a low(er) power state. 405 406 <legal all> 407 */ 408 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET 0x00000000 409 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB 16 410 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK 0xffff0000 411 412 413 #endif // _PHYRX_ABORT_REQUEST_INFO_H_ 414