1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _RX_TIMING_OFFSET_INFO_H_
18 #define _RX_TIMING_OFFSET_INFO_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
23 
24 
25 struct rx_timing_offset_info {
26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
27              uint32_t residual_phase_offset                                   : 12, // [11:0]
28                       reserved                                                : 20; // [31:12]
29 #else
30              uint32_t reserved                                                : 20, // [31:12]
31                       residual_phase_offset                                   : 12; // [11:0]
32 #endif
33 };
34 
35 
36 /* Description		RESIDUAL_PHASE_OFFSET
37 
38 			Cumulative reference frequency error at end of RX packet,
39 			expressed as the phase offset measured over 0.8us.
40 			<legal all>
41 */
42 
43 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_OFFSET                          0x00000000
44 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_LSB                             0
45 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MSB                             11
46 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MASK                            0x00000fff
47 
48 
49 /* Description		RESERVED
50 
51 			<legal 0>
52 */
53 
54 #define RX_TIMING_OFFSET_INFO_RESERVED_OFFSET                                       0x00000000
55 #define RX_TIMING_OFFSET_INFO_RESERVED_LSB                                          12
56 #define RX_TIMING_OFFSET_INFO_RESERVED_MSB                                          31
57 #define RX_TIMING_OFFSET_INFO_RESERVED_MASK                                         0xfffff000
58 
59 
60 
61 #endif   // RX_TIMING_OFFSET_INFO
62