1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _RECEIVE_RSSI_INFO_H_ 18 #define _RECEIVE_RSSI_INFO_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #define NUM_OF_DWORDS_RECEIVE_RSSI_INFO 16 23 24 25 struct receive_rssi_info { 26 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 27 uint32_t rssi_pri20_chain0 : 8, // [7:0] 28 rssi_ext20_chain0 : 8, // [15:8] 29 rssi_ext40_low20_chain0 : 8, // [23:16] 30 rssi_ext40_high20_chain0 : 8; // [31:24] 31 uint32_t rssi_ext80_low20_chain0 : 8, // [7:0] 32 rssi_ext80_low_high20_chain0 : 8, // [15:8] 33 rssi_ext80_high_low20_chain0 : 8, // [23:16] 34 rssi_ext80_high20_chain0 : 8; // [31:24] 35 uint32_t rssi_ext160_0_chain0 : 8, // [7:0] 36 rssi_ext160_1_chain0 : 8, // [15:8] 37 rssi_ext160_2_chain0 : 8, // [23:16] 38 rssi_ext160_3_chain0 : 8; // [31:24] 39 uint32_t rssi_ext160_4_chain0 : 8, // [7:0] 40 rssi_ext160_5_chain0 : 8, // [15:8] 41 rssi_ext160_6_chain0 : 8, // [23:16] 42 rssi_ext160_7_chain0 : 8; // [31:24] 43 uint32_t rssi_pri20_chain1 : 8, // [7:0] 44 rssi_ext20_chain1 : 8, // [15:8] 45 rssi_ext40_low20_chain1 : 8, // [23:16] 46 rssi_ext40_high20_chain1 : 8; // [31:24] 47 uint32_t rssi_ext80_low20_chain1 : 8, // [7:0] 48 rssi_ext80_low_high20_chain1 : 8, // [15:8] 49 rssi_ext80_high_low20_chain1 : 8, // [23:16] 50 rssi_ext80_high20_chain1 : 8; // [31:24] 51 uint32_t rssi_ext160_0_chain1 : 8, // [7:0] 52 rssi_ext160_1_chain1 : 8, // [15:8] 53 rssi_ext160_2_chain1 : 8, // [23:16] 54 rssi_ext160_3_chain1 : 8; // [31:24] 55 uint32_t rssi_ext160_4_chain1 : 8, // [7:0] 56 rssi_ext160_5_chain1 : 8, // [15:8] 57 rssi_ext160_6_chain1 : 8, // [23:16] 58 rssi_ext160_7_chain1 : 8; // [31:24] 59 uint32_t rssi_pri20_chain2 : 8, // [7:0] 60 rssi_ext20_chain2 : 8, // [15:8] 61 rssi_ext40_low20_chain2 : 8, // [23:16] 62 rssi_ext40_high20_chain2 : 8; // [31:24] 63 uint32_t rssi_ext80_low20_chain2 : 8, // [7:0] 64 rssi_ext80_low_high20_chain2 : 8, // [15:8] 65 rssi_ext80_high_low20_chain2 : 8, // [23:16] 66 rssi_ext80_high20_chain2 : 8; // [31:24] 67 uint32_t rssi_ext160_0_chain2 : 8, // [7:0] 68 rssi_ext160_1_chain2 : 8, // [15:8] 69 rssi_ext160_2_chain2 : 8, // [23:16] 70 rssi_ext160_3_chain2 : 8; // [31:24] 71 uint32_t rssi_ext160_4_chain2 : 8, // [7:0] 72 rssi_ext160_5_chain2 : 8, // [15:8] 73 rssi_ext160_6_chain2 : 8, // [23:16] 74 rssi_ext160_7_chain2 : 8; // [31:24] 75 uint32_t rssi_pri20_chain3 : 8, // [7:0] 76 rssi_ext20_chain3 : 8, // [15:8] 77 rssi_ext40_low20_chain3 : 8, // [23:16] 78 rssi_ext40_high20_chain3 : 8; // [31:24] 79 uint32_t rssi_ext80_low20_chain3 : 8, // [7:0] 80 rssi_ext80_low_high20_chain3 : 8, // [15:8] 81 rssi_ext80_high_low20_chain3 : 8, // [23:16] 82 rssi_ext80_high20_chain3 : 8; // [31:24] 83 uint32_t rssi_ext160_0_chain3 : 8, // [7:0] 84 rssi_ext160_1_chain3 : 8, // [15:8] 85 rssi_ext160_2_chain3 : 8, // [23:16] 86 rssi_ext160_3_chain3 : 8; // [31:24] 87 uint32_t rssi_ext160_4_chain3 : 8, // [7:0] 88 rssi_ext160_5_chain3 : 8, // [15:8] 89 rssi_ext160_6_chain3 : 8, // [23:16] 90 rssi_ext160_7_chain3 : 8; // [31:24] 91 #else 92 uint32_t rssi_ext40_high20_chain0 : 8, // [31:24] 93 rssi_ext40_low20_chain0 : 8, // [23:16] 94 rssi_ext20_chain0 : 8, // [15:8] 95 rssi_pri20_chain0 : 8; // [7:0] 96 uint32_t rssi_ext80_high20_chain0 : 8, // [31:24] 97 rssi_ext80_high_low20_chain0 : 8, // [23:16] 98 rssi_ext80_low_high20_chain0 : 8, // [15:8] 99 rssi_ext80_low20_chain0 : 8; // [7:0] 100 uint32_t rssi_ext160_3_chain0 : 8, // [31:24] 101 rssi_ext160_2_chain0 : 8, // [23:16] 102 rssi_ext160_1_chain0 : 8, // [15:8] 103 rssi_ext160_0_chain0 : 8; // [7:0] 104 uint32_t rssi_ext160_7_chain0 : 8, // [31:24] 105 rssi_ext160_6_chain0 : 8, // [23:16] 106 rssi_ext160_5_chain0 : 8, // [15:8] 107 rssi_ext160_4_chain0 : 8; // [7:0] 108 uint32_t rssi_ext40_high20_chain1 : 8, // [31:24] 109 rssi_ext40_low20_chain1 : 8, // [23:16] 110 rssi_ext20_chain1 : 8, // [15:8] 111 rssi_pri20_chain1 : 8; // [7:0] 112 uint32_t rssi_ext80_high20_chain1 : 8, // [31:24] 113 rssi_ext80_high_low20_chain1 : 8, // [23:16] 114 rssi_ext80_low_high20_chain1 : 8, // [15:8] 115 rssi_ext80_low20_chain1 : 8; // [7:0] 116 uint32_t rssi_ext160_3_chain1 : 8, // [31:24] 117 rssi_ext160_2_chain1 : 8, // [23:16] 118 rssi_ext160_1_chain1 : 8, // [15:8] 119 rssi_ext160_0_chain1 : 8; // [7:0] 120 uint32_t rssi_ext160_7_chain1 : 8, // [31:24] 121 rssi_ext160_6_chain1 : 8, // [23:16] 122 rssi_ext160_5_chain1 : 8, // [15:8] 123 rssi_ext160_4_chain1 : 8; // [7:0] 124 uint32_t rssi_ext40_high20_chain2 : 8, // [31:24] 125 rssi_ext40_low20_chain2 : 8, // [23:16] 126 rssi_ext20_chain2 : 8, // [15:8] 127 rssi_pri20_chain2 : 8; // [7:0] 128 uint32_t rssi_ext80_high20_chain2 : 8, // [31:24] 129 rssi_ext80_high_low20_chain2 : 8, // [23:16] 130 rssi_ext80_low_high20_chain2 : 8, // [15:8] 131 rssi_ext80_low20_chain2 : 8; // [7:0] 132 uint32_t rssi_ext160_3_chain2 : 8, // [31:24] 133 rssi_ext160_2_chain2 : 8, // [23:16] 134 rssi_ext160_1_chain2 : 8, // [15:8] 135 rssi_ext160_0_chain2 : 8; // [7:0] 136 uint32_t rssi_ext160_7_chain2 : 8, // [31:24] 137 rssi_ext160_6_chain2 : 8, // [23:16] 138 rssi_ext160_5_chain2 : 8, // [15:8] 139 rssi_ext160_4_chain2 : 8; // [7:0] 140 uint32_t rssi_ext40_high20_chain3 : 8, // [31:24] 141 rssi_ext40_low20_chain3 : 8, // [23:16] 142 rssi_ext20_chain3 : 8, // [15:8] 143 rssi_pri20_chain3 : 8; // [7:0] 144 uint32_t rssi_ext80_high20_chain3 : 8, // [31:24] 145 rssi_ext80_high_low20_chain3 : 8, // [23:16] 146 rssi_ext80_low_high20_chain3 : 8, // [15:8] 147 rssi_ext80_low20_chain3 : 8; // [7:0] 148 uint32_t rssi_ext160_3_chain3 : 8, // [31:24] 149 rssi_ext160_2_chain3 : 8, // [23:16] 150 rssi_ext160_1_chain3 : 8, // [15:8] 151 rssi_ext160_0_chain3 : 8; // [7:0] 152 uint32_t rssi_ext160_7_chain3 : 8, // [31:24] 153 rssi_ext160_6_chain3 : 8, // [23:16] 154 rssi_ext160_5_chain3 : 8, // [15:8] 155 rssi_ext160_4_chain3 : 8; // [7:0] 156 #endif 157 }; 158 159 160 /* Description RSSI_PRI20_CHAIN0 161 162 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 163 164 Value of 0x80 indicates invalid. 165 */ 166 167 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_OFFSET 0x00000000 168 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_LSB 0 169 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_MSB 7 170 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN0_MASK 0x000000ff 171 172 173 /* Description RSSI_EXT20_CHAIN0 174 175 RSSI of RX PPDU on chain 0 of extension 20 MHz bandwidth. 176 177 Value of 0x80 indicates invalid. 178 */ 179 180 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_OFFSET 0x00000000 181 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_LSB 8 182 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_MSB 15 183 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 184 185 186 /* Description RSSI_EXT40_LOW20_CHAIN0 187 188 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz bandwidth. 189 190 Value of 0x80 indicates invalid. 191 */ 192 193 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x00000000 194 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_LSB 16 195 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_MSB 23 196 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 197 198 199 /* Description RSSI_EXT40_HIGH20_CHAIN0 200 201 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 202 bandwidth. 203 Value of 0x80 indicates invalid. 204 */ 205 206 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x00000000 207 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 208 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_MSB 31 209 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 210 211 212 /* Description RSSI_EXT80_LOW20_CHAIN0 213 214 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz bandwidth. 215 216 Value of 0x80 indicates invalid. 217 */ 218 219 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000004 220 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_LSB 0 221 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_MSB 7 222 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 223 224 225 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN0 226 227 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 228 MHz bandwidth. 229 Value of 0x80 indicates invalid. 230 */ 231 232 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000004 233 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 234 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_MSB 15 235 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 236 237 238 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN0 239 240 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 241 MHz bandwidth. 242 Value of 0x80 indicates invalid. 243 */ 244 245 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000004 246 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 247 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_MSB 23 248 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 249 250 251 /* Description RSSI_EXT80_HIGH20_CHAIN0 252 253 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 254 bandwidth. 255 Value of 0x80 indicates invalid. 256 */ 257 258 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000004 259 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 260 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_MSB 31 261 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 262 263 264 /* Description RSSI_EXT160_0_CHAIN0 265 266 RSSI of RX PPDU on chain 0 of extension 160, lowest 20 MHz 267 bandwidth. 268 Value of 0x80 indicates invalid. 269 */ 270 271 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_OFFSET 0x00000008 272 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_LSB 0 273 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_MSB 7 274 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN0_MASK 0x000000ff 275 276 277 /* Description RSSI_EXT160_1_CHAIN0 278 279 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 280 bandwidth. 281 Value of 0x80 indicates invalid. 282 */ 283 284 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_OFFSET 0x00000008 285 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_LSB 8 286 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_MSB 15 287 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN0_MASK 0x0000ff00 288 289 290 /* Description RSSI_EXT160_2_CHAIN0 291 292 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 293 bandwidth. 294 Value of 0x80 indicates invalid. 295 */ 296 297 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_OFFSET 0x00000008 298 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_LSB 16 299 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_MSB 23 300 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN0_MASK 0x00ff0000 301 302 303 /* Description RSSI_EXT160_3_CHAIN0 304 305 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 306 bandwidth. 307 Value of 0x80 indicates invalid. 308 */ 309 310 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_OFFSET 0x00000008 311 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_LSB 24 312 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_MSB 31 313 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN0_MASK 0xff000000 314 315 316 /* Description RSSI_EXT160_4_CHAIN0 317 318 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 319 bandwidth. 320 Value of 0x80 indicates invalid. 321 */ 322 323 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_OFFSET 0x0000000c 324 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_LSB 0 325 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_MSB 7 326 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN0_MASK 0x000000ff 327 328 329 /* Description RSSI_EXT160_5_CHAIN0 330 331 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 332 bandwidth. 333 Value of 0x80 indicates invalid. 334 */ 335 336 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_OFFSET 0x0000000c 337 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_LSB 8 338 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_MSB 15 339 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN0_MASK 0x0000ff00 340 341 342 /* Description RSSI_EXT160_6_CHAIN0 343 344 RSSI of RX PPDU on chain 0 of extension 160, next 20 MHz 345 bandwidth. 346 Value of 0x80 indicates invalid. 347 */ 348 349 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_OFFSET 0x0000000c 350 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_LSB 16 351 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_MSB 23 352 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN0_MASK 0x00ff0000 353 354 355 /* Description RSSI_EXT160_7_CHAIN0 356 357 RSSI of RX PPDU on chain 0 of extension 160, highest 20 358 MHz bandwidth. 359 Value of 0x80 indicates invalid. 360 */ 361 362 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_OFFSET 0x0000000c 363 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_LSB 24 364 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_MSB 31 365 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN0_MASK 0xff000000 366 367 368 /* Description RSSI_PRI20_CHAIN1 369 370 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 371 372 Value of 0x80 indicates invalid. 373 */ 374 375 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_OFFSET 0x00000010 376 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_LSB 0 377 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_MSB 7 378 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN1_MASK 0x000000ff 379 380 381 /* Description RSSI_EXT20_CHAIN1 382 383 RSSI of RX PPDU on chain 1 of extension 20 MHz bandwidth. 384 385 Value of 0x80 indicates invalid. 386 */ 387 388 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_OFFSET 0x00000010 389 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_LSB 8 390 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_MSB 15 391 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 392 393 394 /* Description RSSI_EXT40_LOW20_CHAIN1 395 396 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz bandwidth. 397 398 Value of 0x80 indicates invalid. 399 */ 400 401 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000010 402 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_LSB 16 403 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_MSB 23 404 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 405 406 407 /* Description RSSI_EXT40_HIGH20_CHAIN1 408 409 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 410 bandwidth. 411 Value of 0x80 indicates invalid. 412 */ 413 414 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000010 415 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 416 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_MSB 31 417 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 418 419 420 /* Description RSSI_EXT80_LOW20_CHAIN1 421 422 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz bandwidth. 423 424 Value of 0x80 indicates invalid. 425 */ 426 427 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000014 428 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_LSB 0 429 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_MSB 7 430 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 431 432 433 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN1 434 435 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 436 MHz bandwidth. 437 Value of 0x80 indicates invalid. 438 */ 439 440 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000014 441 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 442 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_MSB 15 443 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 444 445 446 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN1 447 448 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 449 MHz bandwidth. 450 Value of 0x80 indicates invalid. 451 */ 452 453 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000014 454 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 455 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_MSB 23 456 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 457 458 459 /* Description RSSI_EXT80_HIGH20_CHAIN1 460 461 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 462 bandwidth. 463 Value of 0x80 indicates invalid. 464 */ 465 466 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000014 467 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 468 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_MSB 31 469 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 470 471 472 /* Description RSSI_EXT160_0_CHAIN1 473 474 RSSI of RX PPDU on chain 1 of extension 160, lowest 20 MHz 475 bandwidth. 476 Value of 0x80 indicates invalid. 477 */ 478 479 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_OFFSET 0x00000018 480 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_LSB 0 481 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_MSB 7 482 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN1_MASK 0x000000ff 483 484 485 /* Description RSSI_EXT160_1_CHAIN1 486 487 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 488 bandwidth. 489 Value of 0x80 indicates invalid. 490 */ 491 492 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_OFFSET 0x00000018 493 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_LSB 8 494 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_MSB 15 495 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN1_MASK 0x0000ff00 496 497 498 /* Description RSSI_EXT160_2_CHAIN1 499 500 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 501 bandwidth. 502 Value of 0x80 indicates invalid. 503 */ 504 505 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_OFFSET 0x00000018 506 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_LSB 16 507 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_MSB 23 508 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN1_MASK 0x00ff0000 509 510 511 /* Description RSSI_EXT160_3_CHAIN1 512 513 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 514 bandwidth. 515 Value of 0x80 indicates invalid. 516 */ 517 518 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_OFFSET 0x00000018 519 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_LSB 24 520 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_MSB 31 521 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN1_MASK 0xff000000 522 523 524 /* Description RSSI_EXT160_4_CHAIN1 525 526 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 527 bandwidth. 528 Value of 0x80 indicates invalid. 529 */ 530 531 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_OFFSET 0x0000001c 532 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_LSB 0 533 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_MSB 7 534 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN1_MASK 0x000000ff 535 536 537 /* Description RSSI_EXT160_5_CHAIN1 538 539 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 540 bandwidth. 541 Value of 0x80 indicates invalid. 542 */ 543 544 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_OFFSET 0x0000001c 545 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_LSB 8 546 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_MSB 15 547 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN1_MASK 0x0000ff00 548 549 550 /* Description RSSI_EXT160_6_CHAIN1 551 552 RSSI of RX PPDU on chain 1 of extension 160, next 20 MHz 553 bandwidth. 554 Value of 0x80 indicates invalid. 555 */ 556 557 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_OFFSET 0x0000001c 558 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_LSB 16 559 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_MSB 23 560 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN1_MASK 0x00ff0000 561 562 563 /* Description RSSI_EXT160_7_CHAIN1 564 565 RSSI of RX PPDU on chain 1 of extension 160, highest 20 566 MHz bandwidth. 567 Value of 0x80 indicates invalid. 568 */ 569 570 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_OFFSET 0x0000001c 571 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_LSB 24 572 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_MSB 31 573 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN1_MASK 0xff000000 574 575 576 /* Description RSSI_PRI20_CHAIN2 577 578 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 579 580 Value of 0x80 indicates invalid. 581 */ 582 583 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_OFFSET 0x00000020 584 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_LSB 0 585 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_MSB 7 586 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN2_MASK 0x000000ff 587 588 589 /* Description RSSI_EXT20_CHAIN2 590 591 RSSI of RX PPDU on chain 2 of extension 20 MHz bandwidth. 592 593 Value of 0x80 indicates invalid. 594 */ 595 596 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_OFFSET 0x00000020 597 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_LSB 8 598 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_MSB 15 599 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 600 601 602 /* Description RSSI_EXT40_LOW20_CHAIN2 603 604 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz bandwidth. 605 606 Value of 0x80 indicates invalid. 607 */ 608 609 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x00000020 610 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_LSB 16 611 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_MSB 23 612 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 613 614 615 /* Description RSSI_EXT40_HIGH20_CHAIN2 616 617 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 618 bandwidth. 619 Value of 0x80 indicates invalid. 620 */ 621 622 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x00000020 623 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 624 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_MSB 31 625 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 626 627 628 /* Description RSSI_EXT80_LOW20_CHAIN2 629 630 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz bandwidth. 631 632 Value of 0x80 indicates invalid. 633 */ 634 635 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000024 636 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_LSB 0 637 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_MSB 7 638 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 639 640 641 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN2 642 643 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 644 MHz bandwidth. 645 Value of 0x80 indicates invalid. 646 */ 647 648 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000024 649 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 650 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_MSB 15 651 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 652 653 654 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN2 655 656 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 657 MHz bandwidth. 658 Value of 0x80 indicates invalid. 659 */ 660 661 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000024 662 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 663 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_MSB 23 664 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 665 666 667 /* Description RSSI_EXT80_HIGH20_CHAIN2 668 669 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 670 bandwidth. 671 Value of 0x80 indicates invalid. 672 */ 673 674 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000024 675 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 676 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_MSB 31 677 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 678 679 680 /* Description RSSI_EXT160_0_CHAIN2 681 682 RSSI of RX PPDU on chain 2 of extension 160, lowest 20 MHz 683 bandwidth. 684 Value of 0x80 indicates invalid. 685 */ 686 687 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_OFFSET 0x00000028 688 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_LSB 0 689 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_MSB 7 690 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN2_MASK 0x000000ff 691 692 693 /* Description RSSI_EXT160_1_CHAIN2 694 695 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 696 bandwidth. 697 Value of 0x80 indicates invalid. 698 */ 699 700 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_OFFSET 0x00000028 701 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_LSB 8 702 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_MSB 15 703 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN2_MASK 0x0000ff00 704 705 706 /* Description RSSI_EXT160_2_CHAIN2 707 708 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 709 bandwidth. 710 Value of 0x80 indicates invalid. 711 */ 712 713 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_OFFSET 0x00000028 714 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_LSB 16 715 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_MSB 23 716 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN2_MASK 0x00ff0000 717 718 719 /* Description RSSI_EXT160_3_CHAIN2 720 721 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 722 bandwidth. 723 Value of 0x80 indicates invalid. 724 */ 725 726 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_OFFSET 0x00000028 727 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_LSB 24 728 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_MSB 31 729 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN2_MASK 0xff000000 730 731 732 /* Description RSSI_EXT160_4_CHAIN2 733 734 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 735 bandwidth. 736 Value of 0x80 indicates invalid. 737 */ 738 739 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_OFFSET 0x0000002c 740 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_LSB 0 741 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_MSB 7 742 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN2_MASK 0x000000ff 743 744 745 /* Description RSSI_EXT160_5_CHAIN2 746 747 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 748 bandwidth. 749 Value of 0x80 indicates invalid. 750 */ 751 752 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_OFFSET 0x0000002c 753 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_LSB 8 754 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_MSB 15 755 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN2_MASK 0x0000ff00 756 757 758 /* Description RSSI_EXT160_6_CHAIN2 759 760 RSSI of RX PPDU on chain 2 of extension 160, next 20 MHz 761 bandwidth. 762 Value of 0x80 indicates invalid. 763 */ 764 765 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_OFFSET 0x0000002c 766 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_LSB 16 767 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_MSB 23 768 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN2_MASK 0x00ff0000 769 770 771 /* Description RSSI_EXT160_7_CHAIN2 772 773 RSSI of RX PPDU on chain 2 of extension 80, highest 20 MHz 774 bandwidth. 775 Value of 0x80 indicates invalid. 776 */ 777 778 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_OFFSET 0x0000002c 779 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_LSB 24 780 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_MSB 31 781 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN2_MASK 0xff000000 782 783 784 /* Description RSSI_PRI20_CHAIN3 785 786 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 787 788 Value of 0x80 indicates invalid. 789 */ 790 791 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_OFFSET 0x00000030 792 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_LSB 0 793 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_MSB 7 794 #define RECEIVE_RSSI_INFO_RSSI_PRI20_CHAIN3_MASK 0x000000ff 795 796 797 /* Description RSSI_EXT20_CHAIN3 798 799 RSSI of RX PPDU on chain 3 of extension 20 MHz bandwidth. 800 801 Value of 0x80 indicates invalid. 802 */ 803 804 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_OFFSET 0x00000030 805 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_LSB 8 806 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_MSB 15 807 #define RECEIVE_RSSI_INFO_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 808 809 810 /* Description RSSI_EXT40_LOW20_CHAIN3 811 812 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz bandwidth. 813 814 Value of 0x80 indicates invalid. 815 */ 816 817 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000030 818 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_LSB 16 819 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_MSB 23 820 #define RECEIVE_RSSI_INFO_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 821 822 823 /* Description RSSI_EXT40_HIGH20_CHAIN3 824 825 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 826 bandwidth. 827 Value of 0x80 indicates invalid. 828 */ 829 830 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000030 831 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 832 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_MSB 31 833 #define RECEIVE_RSSI_INFO_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 834 835 836 /* Description RSSI_EXT80_LOW20_CHAIN3 837 838 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz bandwidth. 839 840 Value of 0x80 indicates invalid. 841 */ 842 843 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000034 844 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_LSB 0 845 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_MSB 7 846 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 847 848 849 /* Description RSSI_EXT80_LOW_HIGH20_CHAIN3 850 851 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 852 MHz bandwidth. 853 Value of 0x80 indicates invalid. 854 */ 855 856 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000034 857 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 858 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_MSB 15 859 #define RECEIVE_RSSI_INFO_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 860 861 862 /* Description RSSI_EXT80_HIGH_LOW20_CHAIN3 863 864 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 865 MHz bandwidth. 866 Value of 0x80 indicates invalid. 867 */ 868 869 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000034 870 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 871 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_MSB 23 872 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 873 874 875 /* Description RSSI_EXT80_HIGH20_CHAIN3 876 877 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 878 bandwidth. 879 Value of 0x80 indicates invalid. 880 */ 881 882 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000034 883 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 884 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_MSB 31 885 #define RECEIVE_RSSI_INFO_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 886 887 888 /* Description RSSI_EXT160_0_CHAIN3 889 890 RSSI of RX PPDU on chain 3 of extension 160, lowest 20 MHz 891 bandwidth. 892 Value of 0x80 indicates invalid. 893 */ 894 895 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_OFFSET 0x00000038 896 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_LSB 0 897 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_MSB 7 898 #define RECEIVE_RSSI_INFO_RSSI_EXT160_0_CHAIN3_MASK 0x000000ff 899 900 901 /* Description RSSI_EXT160_1_CHAIN3 902 903 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 904 bandwidth. 905 Value of 0x80 indicates invalid. 906 */ 907 908 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_OFFSET 0x00000038 909 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_LSB 8 910 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_MSB 15 911 #define RECEIVE_RSSI_INFO_RSSI_EXT160_1_CHAIN3_MASK 0x0000ff00 912 913 914 /* Description RSSI_EXT160_2_CHAIN3 915 916 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 917 bandwidth. 918 Value of 0x80 indicates invalid. 919 */ 920 921 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_OFFSET 0x00000038 922 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_LSB 16 923 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_MSB 23 924 #define RECEIVE_RSSI_INFO_RSSI_EXT160_2_CHAIN3_MASK 0x00ff0000 925 926 927 /* Description RSSI_EXT160_3_CHAIN3 928 929 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 930 bandwidth. 931 Value of 0x80 indicates invalid. 932 */ 933 934 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_OFFSET 0x00000038 935 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_LSB 24 936 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_MSB 31 937 #define RECEIVE_RSSI_INFO_RSSI_EXT160_3_CHAIN3_MASK 0xff000000 938 939 940 /* Description RSSI_EXT160_4_CHAIN3 941 942 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 943 bandwidth. 944 Value of 0x80 indicates invalid. 945 */ 946 947 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_OFFSET 0x0000003c 948 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_LSB 0 949 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_MSB 7 950 #define RECEIVE_RSSI_INFO_RSSI_EXT160_4_CHAIN3_MASK 0x000000ff 951 952 953 /* Description RSSI_EXT160_5_CHAIN3 954 955 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 956 bandwidth. 957 Value of 0x80 indicates invalid. 958 */ 959 960 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_OFFSET 0x0000003c 961 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_LSB 8 962 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_MSB 15 963 #define RECEIVE_RSSI_INFO_RSSI_EXT160_5_CHAIN3_MASK 0x0000ff00 964 965 966 /* Description RSSI_EXT160_6_CHAIN3 967 968 RSSI of RX PPDU on chain 3 of extension 160, next 20 MHz 969 bandwidth. 970 Value of 0x80 indicates invalid. 971 */ 972 973 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_OFFSET 0x0000003c 974 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_LSB 16 975 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_MSB 23 976 #define RECEIVE_RSSI_INFO_RSSI_EXT160_6_CHAIN3_MASK 0x00ff0000 977 978 979 /* Description RSSI_EXT160_7_CHAIN3 980 981 RSSI of RX PPDU on chain 3 of extension 160, highest 20 982 MHz bandwidth. 983 Value of 0x80 indicates invalid. 984 */ 985 986 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_OFFSET 0x0000003c 987 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_LSB 24 988 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_MSB 31 989 #define RECEIVE_RSSI_INFO_RSSI_EXT160_7_CHAIN3_MASK 0xff000000 990 991 992 993 #endif // RECEIVE_RSSI_INFO 994