1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 #ifndef _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
18 #define _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
19 #if !defined(__ASSEMBLER__)
20 #endif
21 
22 #define NUM_OF_WORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 2
23 
24 #define NUM_OF_DWORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 1
25 
26 
27 struct phytx_ppdu_header_info_request {
28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
29              uint16_t request_type                                            :  5, // [4:0]
30                       reserved                                                : 11; // [15:5]
31              uint16_t tlv32_padding                                           : 16; // [15:0]
32 #else
33              uint16_t reserved                                                : 11, // [15:5]
34                       request_type                                            :  5; // [4:0]
35              uint16_t tlv32_padding                                           : 16; // [15:0]
36 #endif
37 };
38 
39 
40 /* Description		REQUEST_TYPE
41 
42 			Reason for the request by PHY
43 			<enum 0 request_L_SIG_B>
44 			<enum 1  request_L_SIG_A>
45 			<enum 2 request_USER_DESC>
46 			<enum 3  request_HT_SIG>
47 			<enum 4  request_VHT_SIG_A>
48 			<enum 5  request_VHT_SIG_B >
49 			<enum 6 request_TX_SERVICE>
50 			<enum 7 request_HE_SIG_A>
51 			<enum 8 request_HE_SIG_B>
52 			<enum 9 request_U_SIG>
53 			<enum 10 request_EHT_SIG>
54 
55 			<legal 0-10>
56 */
57 
58 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_OFFSET                          0x00000000
59 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_LSB                             0
60 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MSB                             4
61 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MASK                            0x0000001f
62 
63 
64 /* Description		RESERVED
65 
66 			<legal 0>
67 */
68 
69 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_OFFSET                              0x00000000
70 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_LSB                                 5
71 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MSB                                 15
72 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MASK                                0x0000ffe0
73 
74 
75 /* Description		TLV32_PADDING
76 
77 			Automatic WORD padding inserted while converting TLV16 to
78 			 TLV32 for 64 bit ARCH
79 			<legal 0>
80 */
81 
82 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_OFFSET                         0x00000002
83 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_LSB                            0
84 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MSB                            15
85 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MASK                           0x0000ffff
86 
87 
88 
89 #endif   // PHYTX_PPDU_HEADER_INFO_REQUEST
90